extract out shared gpu_array_requires_device_allocation
[ppcg.git] / gpu.c
blobe353f4c6c7a9d30b2a5325d42e8276723cbd7413
1 /*
2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012-2013 Ecole Normale Superieure
5 * Use of this software is governed by the MIT license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
9 * 91893 Orsay, France
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
13 #include <assert.h>
14 #include <stdlib.h>
15 #include <string.h>
17 #include <isl/polynomial.h>
18 #include <isl/union_set.h>
19 #include <isl/aff.h>
20 #include <isl/ilp.h>
21 #include <isl/flow.h>
22 #include <isl/schedule.h>
23 #include <isl/schedule_node.h>
24 #include <isl/options.h>
25 #include <isl/ast_build.h>
27 #include "cpu.h"
28 #include "gpu.h"
29 #include "gpu_array_tile.h"
30 #include "gpu_group.h"
31 #include "gpu_tree.h"
32 #include "schedule.h"
33 #include "ppcg_options.h"
34 #include "print.h"
35 #include "util.h"
37 struct gpu_array_info;
39 /* Return the name of the outer array (of structs) accessed by "access".
41 static const char *get_outer_array_name(__isl_keep isl_map *access)
43 isl_space *space;
44 const char *name;
46 space = isl_space_range(isl_map_get_space(access));
47 while (space && isl_space_is_wrapping(space))
48 space = isl_space_domain(isl_space_unwrap(space));
49 name = isl_space_get_tuple_name(space, isl_dim_set);
50 isl_space_free(space);
52 return name;
55 /* Collect all references to the given array and store pointers to them
56 * in array->refs.
58 static void collect_references(struct gpu_prog *prog,
59 struct gpu_array_info *array)
61 int i;
62 int n;
64 n = 0;
65 for (i = 0; i < prog->n_stmts; ++i) {
66 struct gpu_stmt *stmt = &prog->stmts[i];
67 struct gpu_stmt_access *access;
69 for (access = stmt->accesses; access; access = access->next) {
70 const char *name;
71 name = get_outer_array_name(access->access);
72 if (name && !strcmp(array->name, name))
73 n++;
77 array->n_ref = n;
78 array->refs = isl_alloc_array(prog->ctx, struct gpu_stmt_access *, n);
79 assert(array->refs);
81 n = 0;
82 for (i = 0; i < prog->n_stmts; ++i) {
83 struct gpu_stmt *stmt = &prog->stmts[i];
84 struct gpu_stmt_access *access;
86 for (access = stmt->accesses; access; access = access->next) {
87 const char *name;
88 name = get_outer_array_name(access->access);
89 if (!name || strcmp(array->name, name))
90 continue;
92 array->refs[n++] = access;
97 /* Compute and return the extent of "array", taking into account the set of
98 * accessed elements.
100 * In particular, the extent in the outer dimension is taken
101 * from "accessed", while the extents in the remaining dimensions
102 * are taken from array->extent.
104 * The extent in the outer dimension cannot be taken from array->extent
105 * because that may be unbounded. Furthermore, even if it is bounded,
106 * it may be larger than the piece of the array that is being accessed.
108 static __isl_give isl_set *compute_extent(struct pet_array *array,
109 __isl_keep isl_set *accessed)
111 int n_index;
112 isl_id *id;
113 isl_set *outer;
114 isl_set *extent;
116 extent = isl_set_copy(array->extent);
118 n_index = isl_set_dim(accessed, isl_dim_set);
119 if (n_index == 0)
120 return extent;
122 extent = isl_set_project_out(extent, isl_dim_set, 0, 1);
123 outer = isl_set_copy(accessed);
124 outer = isl_set_project_out(outer, isl_dim_set, 1, n_index - 1);
125 extent = isl_set_flat_product(outer, extent);
126 id = isl_set_get_tuple_id(accessed);
127 extent = isl_set_set_tuple_id(extent, id);
129 return extent;
132 /* Is the array "array" being extracted a read-only scalar?
134 * That is, is "array" a scalar that is never possibly written to.
135 * An array containing structures is never considered to be a scalar.
137 static int is_read_only_scalar(struct gpu_array_info *array,
138 struct gpu_prog *prog)
140 isl_set *space;
141 isl_union_map *write;
142 int empty;
144 if (array->has_compound_element)
145 return 0;
146 if (array->n_index != 0)
147 return 0;
149 write = isl_union_map_copy(prog->may_write);
150 space = isl_set_universe(isl_space_copy(array->space));
151 write = isl_union_map_intersect_range(write,
152 isl_union_set_from_set(space));
153 empty = isl_union_map_is_empty(write);
154 isl_union_map_free(write);
156 return empty;
159 /* Compute bounds on the host array "pa" based on the corresponding
160 * accessed elements in "arrays"
161 * and collect all references to the array.
162 * Store the results in "info".
164 * If the array is zero-dimensional and does not contain structures,
165 * i.e., if the array is a scalar, we check whether it is read-only.
166 * We also check whether the array is accessed at all.
168 static int extract_array_info(struct gpu_prog *prog,
169 struct gpu_array_info *info, struct pet_array *pa,
170 __isl_keep isl_union_set *arrays)
172 int i, empty;
173 const char *name;
174 int n_index;
175 isl_pw_aff **bounds;
176 isl_set *accessed, *extent;
178 n_index = isl_set_dim(pa->extent, isl_dim_set);
179 name = isl_set_get_tuple_name(pa->extent);
180 bounds = isl_alloc_array(prog->ctx, isl_pw_aff *, n_index);
181 if (!bounds)
182 return -1;
184 info->space = isl_set_get_space(pa->extent);
185 info->name = strdup(name);
186 info->n_index = n_index;
187 info->bound = bounds;
188 info->linearize = prog->scop->options->linearize_device_arrays;
190 info->type = strdup(pa->element_type);
191 info->size = pa->element_size;
192 info->local = pa->declared && !pa->exposed;
193 info->has_compound_element = pa->element_is_record;
194 info->read_only_scalar = is_read_only_scalar(info, prog);
196 accessed = isl_union_set_extract_set(arrays,
197 isl_space_copy(info->space));
198 empty = isl_set_is_empty(accessed);
199 extent = compute_extent(pa, accessed);
200 isl_set_free(accessed);
201 info->extent = extent;
202 if (empty < 0)
203 return -1;
204 info->accessed = !empty;
205 for (i = 0; i < n_index; ++i) {
206 isl_set *dom;
207 isl_local_space *ls;
208 isl_aff *one;
209 isl_pw_aff *bound;
211 dom = isl_set_copy(extent);
212 dom = isl_set_project_out(dom, isl_dim_set, i + 1,
213 n_index - (i + 1));
214 dom = isl_set_project_out(dom, isl_dim_set, 0, i);
215 if (!isl_set_dim_has_upper_bound(dom, isl_dim_set, 0)) {
216 fprintf(stderr, "unable to determine extent of '%s' "
217 "in dimension %d\n", info->name, i);
218 dom = isl_set_free(dom);
220 bound = isl_set_dim_max(dom, 0);
221 dom = isl_pw_aff_domain(isl_pw_aff_copy(bound));
222 ls = isl_local_space_from_space(isl_set_get_space(dom));
223 one = isl_aff_zero_on_domain(ls);
224 one = isl_aff_add_constant_si(one, 1);
225 bound = isl_pw_aff_add(bound, isl_pw_aff_alloc(dom, one));
226 bound = isl_pw_aff_gist(bound, isl_set_copy(prog->context));
228 bounds[i] = bound;
229 if (!isl_pw_aff_is_cst(bound))
230 info->linearize = 1;
233 collect_references(prog, info);
235 return 0;
238 /* Remove independence from the order constraints "order" on array "array".
239 * Since the pairs of iterations in the filter relation of an independence
240 * are guaranteed to be completely independent by the user, there is
241 * no need to ensure that live ranges are ordered along thong pairs.
242 * We make an exception for local variables, though, as the independence
243 * guarantee does not apply to those.
245 * The order constraints are used in two places.
246 * Those on scalars are used in check_scalar_live_ranges to check if
247 * we need to force the scalar to be private. Any non-local scalar
248 * should not be forced scalar if it only appears in independent loops.
249 * Those on non-scalars are added to the coincidence constraints
250 * in compute_schedule because we do not support any array expansion.
251 * Accesses to non-local arrays should not prevent a loop from being
252 * considered coincident so we should indeed remove those constraints
253 * from the order constraints.
255 static __isl_give isl_union_map *remove_independences(struct gpu_prog *prog,
256 struct gpu_array_info *array, __isl_take isl_union_map *order)
258 int i;
260 for (i = 0; i < prog->scop->pet->n_independence; ++i) {
261 struct pet_independence *pi = prog->scop->pet->independences[i];
262 if (isl_union_set_contains(pi->local, array->space))
263 continue;
265 order = isl_union_map_subtract(order,
266 isl_union_map_copy(pi->filter));
269 return order;
272 /* For each array in "prog", store the (untagged) order dependences
273 * derived from the array in array->dep_order.
274 * In particular, consider all references that access the given array
275 * and take the order dependences that have one of these references
276 * as source. (Since an order dependence relates two references to
277 * the same array, the target of these order dependences will also
278 * be one of these references.)
279 * Additionally, store the union of these array->dep_order relations
280 * for all non-scalar arrays in prog->array_order.
282 void collect_order_dependences(struct gpu_prog *prog)
284 int i;
285 isl_space *space;
286 isl_union_map *accesses;
288 space = isl_union_map_get_space(prog->read);
289 prog->array_order = isl_union_map_empty(space);
291 accesses = isl_union_map_copy(prog->scop->tagged_reads);
292 accesses = isl_union_map_union(accesses,
293 isl_union_map_copy(prog->scop->tagged_may_writes));
294 accesses = isl_union_map_universe(accesses);
295 accesses = isl_union_map_apply_range(accesses,
296 isl_union_map_copy(prog->to_outer));
298 for (i = 0; i < prog->n_array; ++i) {
299 struct gpu_array_info *array = &prog->array[i];
300 isl_set *set;
301 isl_union_set *uset;
302 isl_union_map *order;
304 set = isl_set_universe(isl_space_copy(array->space));
305 uset = isl_union_set_from_set(set);
306 uset = isl_union_map_domain(
307 isl_union_map_intersect_range(isl_union_map_copy(accesses),
308 uset));
309 order = isl_union_map_copy(prog->scop->tagged_dep_order);
310 order = isl_union_map_intersect_domain(order, uset);
311 order = isl_union_map_zip(order);
312 order = isl_union_set_unwrap(isl_union_map_domain(order));
313 order = remove_independences(prog, array, order);
314 array->dep_order = order;
316 if (gpu_array_is_scalar(array) && !array->has_compound_element)
317 continue;
319 prog->array_order = isl_union_map_union(prog->array_order,
320 isl_union_map_copy(array->dep_order));
323 isl_union_map_free(accesses);
326 /* Construct a gpu_array_info for each array referenced by prog->scop and
327 * collect them in prog->array.
329 * The sizes are based on the extents and the set of possibly accessed
330 * elements by "prog".
331 * If there are any member accesses involved, then they are first mapped
332 * to the outer arrays of structs.
334 * If we are allowing live range reordering, then also set
335 * the dep_order field. Otherwise leave it NULL.
337 static int collect_array_info(struct gpu_prog *prog)
339 int i;
340 int r = 0;
341 isl_union_set *arrays;
343 arrays = isl_union_map_range(isl_union_map_copy(prog->read));
344 arrays = isl_union_set_union(arrays,
345 isl_union_map_range(isl_union_map_copy(prog->may_write)));
347 arrays = isl_union_set_apply(arrays,
348 isl_union_map_copy(prog->to_outer));
350 arrays = isl_union_set_coalesce(arrays);
352 prog->n_array = prog->scop->pet->n_array;
353 prog->array = isl_calloc_array(prog->ctx,
354 struct gpu_array_info, prog->n_array);
355 assert(prog->array);
356 for (i = 0; i < prog->scop->pet->n_array; ++i)
357 if (extract_array_info(prog, &prog->array[i],
358 prog->scop->pet->arrays[i], arrays) < 0)
359 r = -1;
361 isl_union_set_free(arrays);
363 if (prog->scop->options->live_range_reordering)
364 collect_order_dependences(prog);
366 return r;
369 static void free_array_info(struct gpu_prog *prog)
371 int i, j;
373 for (i = 0; i < prog->n_array; ++i) {
374 int n_index = prog->array[i].n_index;
375 free(prog->array[i].type);
376 free(prog->array[i].name);
377 for (j = 0; j < n_index; ++j)
378 isl_pw_aff_free(prog->array[i].bound[j]);
379 isl_space_free(prog->array[i].space);
380 isl_set_free(prog->array[i].extent);
381 free(prog->array[i].bound);
382 free(prog->array[i].refs);
383 isl_union_map_free(prog->array[i].dep_order);
385 free(prog->array);
388 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
389 * as an array or through a pointer reference, but as a single data element.
390 * At the moment, scalars are represented as zero-dimensional arrays.
391 * Note that the single data element may be an entire structure.
393 int gpu_array_is_scalar(struct gpu_array_info *array)
395 return array->n_index == 0;
398 /* Is "array" a read-only scalar?
400 int gpu_array_is_read_only_scalar(struct gpu_array_info *array)
402 return array->read_only_scalar;
405 /* Does "array" need to be allocated on the device?
406 * If it is a read-only scalar, then it will be passed as an argument
407 * to the kernel and therefore does not require any allocation.
408 * If it is not accessed at all, then it does not require any allocation
409 * either.
411 int gpu_array_requires_device_allocation(struct gpu_array_info *array)
413 if (gpu_array_is_read_only_scalar(array))
414 return 0;
415 if (!array->accessed)
416 return 0;
417 return 1;
420 /* Return the set of parameter values for which the array has a positive
421 * size in all dimensions.
422 * If the sizes are only valid for some parameter values, then those
423 * constraints are also taken into account.
425 __isl_give isl_set *gpu_array_positive_size_guard(struct gpu_array_info *array)
427 int i;
428 isl_space *space;
429 isl_set *guard;
431 if (!array)
432 return NULL;
434 space = isl_space_params(isl_space_copy(array->space));
435 guard = isl_set_universe(space);
437 for (i = 0; i < array->n_index; ++i) {
438 isl_pw_aff *bound;
439 isl_set *guard_i, *zero;
441 bound = isl_pw_aff_copy(array->bound[i]);
442 guard_i = isl_pw_aff_nonneg_set(isl_pw_aff_copy(bound));
443 zero = isl_pw_aff_zero_set(bound);
444 guard_i = isl_set_subtract(guard_i, zero);
445 guard = isl_set_intersect(guard, guard_i);
448 return guard;
451 /* Internal data structure for extract_size_of_type.
452 * "type" specifies the name of the space that we want to extract.
453 * "res" is used to store the subset of that space.
455 struct ppcg_extract_size_data {
456 const char *type;
457 isl_set *res;
460 /* This function is called for each set in a union_set.
461 * If the name of the set matches data->type, we store the
462 * set in data->res.
464 static int extract_size_of_type(__isl_take isl_set *size, void *user)
466 struct ppcg_extract_size_data *data = user;
467 const char *name;
469 name = isl_set_get_tuple_name(size);
470 if (name && !strcmp(name, data->type)) {
471 data->res = size;
472 return -1;
475 isl_set_free(size);
476 return 0;
479 /* Given a union map { kernel[i] -> *[...] },
480 * return the range in the space called "type" for the kernel with
481 * sequence number "id".
483 static __isl_give isl_set *extract_sizes(__isl_keep isl_union_map *sizes,
484 const char *type, int id)
486 isl_space *space;
487 isl_set *dom;
488 isl_union_set *local_sizes;
489 struct ppcg_extract_size_data data = { type, NULL };
491 if (!sizes)
492 return NULL;
494 space = isl_union_map_get_space(sizes);
495 space = isl_space_set_from_params(space);
496 space = isl_space_add_dims(space, isl_dim_set, 1);
497 space = isl_space_set_tuple_name(space, isl_dim_set, "kernel");
498 dom = isl_set_universe(space);
499 dom = isl_set_fix_si(dom, isl_dim_set, 0, id);
501 local_sizes = isl_union_set_apply(isl_union_set_from_set(dom),
502 isl_union_map_copy(sizes));
503 isl_union_set_foreach_set(local_sizes, &extract_size_of_type, &data);
504 isl_union_set_free(local_sizes);
505 return data.res;
508 /* Given a singleton set, extract the first (at most *len) elements
509 * of the single integer tuple into *sizes and update *len if needed.
511 static void read_sizes_from_set(__isl_take isl_set *set, int *sizes, int *len)
513 int i;
514 int dim;
516 if (!set)
517 return;
519 dim = isl_set_dim(set, isl_dim_set);
520 if (dim < *len)
521 *len = dim;
523 for (i = 0; i < *len; ++i) {
524 isl_val *v;
526 v = isl_set_plain_get_val_if_fixed(set, isl_dim_set, i);
527 assert(v);
529 sizes[i] = isl_val_get_num_si(v);
530 isl_val_free(v);
533 isl_set_free(set);
536 /* Add the map { kernel[id] -> type[sizes] } to gen->used_sizes,
537 * if the option debug->dump_sizes is set.
539 static void set_used_sizes(struct gpu_gen *gen, const char *type, int id,
540 int *sizes, int len)
542 int i;
543 isl_space *space;
544 isl_map *map;
546 if (!gen->options->debug->dump_sizes)
547 return;
549 space = isl_union_map_get_space(gen->used_sizes);
550 space = isl_space_set_from_params(space);
551 space = isl_space_add_dims(space, isl_dim_set, 1);
552 space = isl_space_set_tuple_name(space, isl_dim_set, "kernel");
553 space = isl_space_from_domain(space);
554 space = isl_space_add_dims(space, isl_dim_out, len);
555 space = isl_space_set_tuple_name(space, isl_dim_out, type);
557 map = isl_map_universe(space);
558 map = isl_map_fix_si(map, isl_dim_in, 0, id);
559 for (i = 0; i < len; ++i)
560 map = isl_map_fix_si(map, isl_dim_out, i, sizes[i]);
562 gen->used_sizes = isl_union_map_add_map(gen->used_sizes, map);
565 /* Extract user specified "tile" sizes from the "sizes" command line option,
566 * defaulting to option->tile_size in each dimension.
567 * *tile_len contains the maximum number of tile sizes needed.
568 * Update *tile_len to the number of specified tile sizes, if any, and
569 * return a pointer to the tile sizes (or NULL on error).
570 * Add the effectively used sizes to gen->used_sizes.
572 static int *read_tile_sizes(struct gpu_gen *gen, int *tile_len)
574 int n;
575 int *tile_size;
576 isl_set *size;
578 tile_size = isl_alloc_array(gen->ctx, int, *tile_len);
579 if (!tile_size)
580 return NULL;
581 for (n = 0; n < *tile_len; ++n)
582 tile_size[n] = gen->options->tile_size;
584 size = extract_sizes(gen->sizes, "tile", gen->kernel_id);
585 read_sizes_from_set(size, tile_size, tile_len);
586 set_used_sizes(gen, "tile", gen->kernel_id, tile_size, *tile_len);
588 return tile_size;
591 /* Extract user specified "block" sizes from the "sizes" command line option,
592 * after filling in some potentially useful defaults.
594 static void read_block_sizes(struct ppcg_kernel *kernel,
595 __isl_keep isl_union_map *sizes)
597 isl_set *size;
599 if (kernel->n_block > 3)
600 kernel->n_block = 3;
601 switch (kernel->n_block) {
602 case 1:
603 kernel->block_dim[0] = 512;
604 break;
605 case 2:
606 kernel->block_dim[0] = 32;
607 kernel->block_dim[1] = 16;
608 break;
609 default:
610 kernel->block_dim[0] = 32;
611 kernel->block_dim[1] = 4;
612 kernel->block_dim[2] = 4;
613 break;
616 size = extract_sizes(sizes, "block", kernel->id);
617 read_sizes_from_set(size, kernel->block_dim, &kernel->n_block);
620 /* Extract user specified "grid" sizes from the "sizes" command line option,
621 * after filling in some potentially useful defaults.
623 static void read_grid_sizes(struct ppcg_kernel *kernel,
624 __isl_keep isl_union_map *sizes)
626 isl_set *size;
628 if (kernel->n_grid > 2)
629 kernel->n_grid = 2;
630 switch (kernel->n_grid) {
631 case 1:
632 kernel->grid_dim[0] = 32768;
633 break;
634 default:
635 kernel->grid_dim[0] = 256;
636 kernel->grid_dim[1] = 256;
637 break;
640 size = extract_sizes(sizes, "grid", kernel->id);
641 read_sizes_from_set(size, kernel->grid_dim, &kernel->n_grid);
644 /* Extract user specified grid and block sizes from the gen->sizes
645 * command line option after filling in some potentially useful defaults.
646 * Store the extracted sizes in "kernel".
647 * Add the effectively used sizes to gen->used_sizes.
649 static void read_grid_and_block_sizes(struct ppcg_kernel *kernel,
650 struct gpu_gen *gen)
652 read_block_sizes(kernel, gen->sizes);
653 read_grid_sizes(kernel, gen->sizes);
654 set_used_sizes(gen, "block", kernel->id,
655 kernel->block_dim, kernel->n_block);
656 set_used_sizes(gen, "grid", kernel->id,
657 kernel->grid_dim, kernel->n_grid);
660 static void *free_stmts(struct gpu_stmt *stmts, int n)
662 int i;
664 if (!stmts)
665 return NULL;
667 for (i = 0; i < n; ++i) {
668 struct gpu_stmt_access *access, *next;
670 for (access = stmts[i].accesses; access; access = next) {
671 next = access->next;
672 isl_id_free(access->ref_id);
673 isl_map_free(access->access);
674 isl_map_free(access->tagged_access);
675 free(access);
678 isl_id_free(stmts[i].id);
680 free(stmts);
682 return NULL;
685 /* Add parameters p[i] with identifiers "ids" to "set",
686 * with bounds to 0 <= p[i] < size[i].
688 __isl_give isl_set *add_bounded_parameters(__isl_take isl_set *set,
689 int *size, __isl_keep isl_id_list *ids)
691 int i, len;
692 unsigned nparam;
694 len = isl_id_list_n_id(ids);
695 nparam = isl_set_dim(set, isl_dim_param);
696 set = isl_set_add_dims(set, isl_dim_param, len);
698 for (i = 0; i < len; ++i) {
699 isl_id *id;
701 id = isl_id_list_get_id(ids, i);
702 set = isl_set_set_dim_id(set, isl_dim_param, nparam + i, id);
703 set = isl_set_lower_bound_si(set, isl_dim_param, nparam + i, 0);
704 set = isl_set_upper_bound_si(set, isl_dim_param,
705 nparam + i, size[i] - 1);
708 return set;
711 /* Add "len" parameters p[i] with identifiers "ids" and intersect "set"
712 * with
714 * { : 0 <= p[i] < size[i] }
716 * or an overapproximation.
718 static __isl_give isl_set *add_bounded_parameters_dynamic(
719 __isl_take isl_set *set, __isl_keep isl_multi_pw_aff *size,
720 __isl_keep isl_id_list *ids)
722 int i, len;
723 unsigned nparam;
724 isl_space *space;
725 isl_local_space *ls;
727 len = isl_multi_pw_aff_dim(size, isl_dim_out);
728 nparam = isl_set_dim(set, isl_dim_param);
729 set = isl_set_add_dims(set, isl_dim_param, len);
731 for (i = 0; i < len; ++i) {
732 isl_id *id;
734 id = isl_id_list_get_id(ids, i);
735 set = isl_set_set_dim_id(set, isl_dim_param, nparam + i, id);
738 space = isl_space_params(isl_set_get_space(set));
739 ls = isl_local_space_from_space(space);
740 for (i = 0; i < len; ++i) {
741 isl_pw_aff *param, *size_i, *zero;
742 isl_set *bound;
744 param = isl_pw_aff_var_on_domain(isl_local_space_copy(ls),
745 isl_dim_param, nparam + i);
747 size_i = isl_multi_pw_aff_get_pw_aff(size, i);
748 bound = isl_pw_aff_lt_set(isl_pw_aff_copy(param), size_i);
749 bound = isl_set_from_basic_set(isl_set_simple_hull(bound));
750 set = isl_set_intersect_params(set, bound);
752 zero = isl_pw_aff_zero_on_domain(isl_local_space_copy(ls));
753 bound = isl_pw_aff_ge_set(param, zero);
754 set = isl_set_intersect_params(set, bound);
756 isl_local_space_free(ls);
758 return set;
761 /* Return the union of all tagged access relations in the group.
763 static __isl_give isl_union_map *group_tagged_access_relation(
764 struct gpu_array_ref_group *group)
766 int i;
767 isl_union_map *access;
769 access = isl_union_map_empty(isl_map_get_space(group->access));
770 for (i = 0; i < group->n_ref; ++i) {
771 isl_map *map_i;
773 map_i = isl_map_copy(group->refs[i]->tagged_access);
774 access = isl_union_map_union(access,
775 isl_union_map_from_map(map_i));
778 return access;
781 /* Return the extent of "array", recomputed from the bounds.
782 * The recomputed extent may be simpler than the original extent.
784 static __isl_give isl_set *array_extent(struct gpu_array_info *array)
786 int i;
787 isl_id *id;
788 isl_space *space;
789 isl_local_space *ls;
790 isl_set *extent;
792 id = isl_set_get_tuple_id(array->extent);
793 space = isl_set_get_space(array->extent);
794 extent = isl_set_universe(isl_space_copy(space));
795 ls = isl_local_space_from_space(space);
796 for (i = 0; i < array->n_index; ++i) {
797 isl_pw_aff *bound;
798 isl_aff *aff;
799 isl_pw_aff *index;
800 isl_set *lt;
802 extent = isl_set_lower_bound_si(extent, isl_dim_set, i, 0);
804 aff = isl_aff_var_on_domain(isl_local_space_copy(ls),
805 isl_dim_set, i);
806 index = isl_pw_aff_from_aff(aff);
807 bound = isl_pw_aff_copy(array->bound[i]);
808 bound = isl_pw_aff_from_range(bound);
809 bound = isl_pw_aff_add_dims(bound, isl_dim_in, array->n_index);
810 bound = isl_pw_aff_set_tuple_id(bound, isl_dim_in,
811 isl_id_copy(id));
812 lt = isl_pw_aff_lt_set(index, bound);
813 extent = isl_set_intersect(extent, lt);
815 isl_local_space_free(ls);
816 isl_id_free(id);
818 return extent;
821 /* Return a map from the first group->depth dimensions of the computed
822 * schedule to the array tile in
823 * global memory that corresponds to the shared memory copy.
825 * In particular, return a map
827 * { D[i] -> A[a] }
829 * with constraints
831 * tile_offset(i) <= a <= tile_offset(i) + tile_size - 1 (1)
833 * and
835 * 0 <= a <= array_size - 1 (2)
837 * Note that if some stride has been detected (i.e., when
838 * group->shared_tile->bound[i].shift is set), then a in (1) refers
839 * to the shifted and scaled down version.
841 * Constraints (1) are obtained by mapping the size constraints on the
842 * shared/private memory tile back to the access relation.
843 * Constraints (2) are obtained from the (recomputed) extent.
845 static __isl_give isl_map *group_tile(struct gpu_array_ref_group *group)
847 int i;
848 int n_index = group->array->n_index;
849 isl_map *tile;
850 isl_space *space;
851 isl_set *local;
852 isl_set *extent;
854 space = isl_multi_aff_get_space(group->shared_tile->tiling);
855 space = isl_space_range(space);
856 local = isl_set_universe(space);
857 for (i = 0; i < n_index; ++i) {
858 isl_val *bound;
860 local = isl_set_lower_bound_si(local, isl_dim_set, i, 0);
861 bound = isl_val_copy(group->shared_tile->bound[i].size);
862 bound = isl_val_sub_ui(bound, 1);
863 local = isl_set_upper_bound_val(local, isl_dim_set, i, bound);
865 local = isl_set_preimage_multi_aff(local,
866 isl_multi_aff_copy(group->shared_tile->tiling));
867 tile = isl_set_unwrap(local);
868 extent = array_extent(group->array);
869 tile = isl_map_intersect_range(tile, extent);
871 return tile;
874 /* Given a mapping "iterator_map" from the AST schedule to a domain,
875 * return the corresponding mapping from the AST schedule to
876 * to the outer kernel->shared_schedule_dim dimensions of
877 * the schedule computed by PPCG for this kernel.
879 * Note that kernel->shared_schedule_dim is at least as large as
880 * the largest depth of any array reference group associated to the kernel.
881 * This is needed as the returned schedule is used to extract a mapping
882 * to the outer group->depth dimensions in transform_index.
884 static __isl_give isl_pw_multi_aff *compute_sched_to_shared(
885 struct ppcg_kernel *kernel, __isl_take isl_pw_multi_aff *iterator_map)
887 isl_union_pw_multi_aff *upma;
888 isl_pw_multi_aff *pma;
889 isl_space *space;
891 space = isl_space_range(isl_pw_multi_aff_get_space(iterator_map));
892 space = isl_space_from_domain(space);
893 space = isl_space_add_dims(space, isl_dim_out,
894 kernel->shared_schedule_dim);
896 upma = isl_union_pw_multi_aff_copy(kernel->shared_schedule);
897 pma = isl_union_pw_multi_aff_extract_pw_multi_aff(upma, space);
898 isl_union_pw_multi_aff_free(upma);
900 return isl_pw_multi_aff_pullback_pw_multi_aff(pma, iterator_map);
903 /* If max_shared_memory is not set to infinity (-1), then make
904 * sure that the total amount of shared memory required by the
905 * array reference groups mapped to shared memory by "kernel"
906 * is no larger than this maximum.
908 * We apply a greedy approach and discard (keep in global memory)
909 * those groups that would result in a total memory size that
910 * is larger than the maximum.
912 * This function should be called after any function that may
913 * affect the decision on whether to place a reference group
914 * in private, shared or global memory.
916 static void check_shared_memory_bound(struct ppcg_kernel *kernel)
918 int i, j;
919 isl_val *left, *size;
921 if (kernel->options->max_shared_memory < 0)
922 return;
924 left = isl_val_int_from_si(kernel->ctx,
925 kernel->options->max_shared_memory);
927 for (i = 0; i < kernel->n_array; ++i) {
928 struct gpu_local_array_info *local = &kernel->array[i];
930 for (j = 0; j < local->n_group; ++j) {
931 struct gpu_array_ref_group *group;
933 group = local->groups[j];
934 if (group->private_tile)
935 continue;
936 if (!group->shared_tile)
937 continue;
939 size = gpu_array_tile_size(group->shared_tile);
940 size = isl_val_mul_ui(size, local->array->size);
942 if (isl_val_le(size, left)) {
943 left = isl_val_sub(left, size);
944 continue;
946 isl_val_free(size);
948 group->shared_tile =
949 gpu_array_tile_free(group->shared_tile);
953 isl_val_free(left);
956 /* Mark all arrays of "kernel" that have an array reference group
957 * that is not mapped to private or shared memory as
958 * accessing the corresponding global device memory.
960 static void mark_global_arrays(struct ppcg_kernel *kernel)
962 int i, j;
964 for (i = 0; i < kernel->n_array; ++i) {
965 struct gpu_local_array_info *local = &kernel->array[i];
967 if (local->global)
968 continue;
969 for (j = 0; j < local->n_group; ++j) {
970 if (gpu_array_ref_group_tile(local->groups[j]))
971 continue;
973 local->global = 1;
974 break;
979 /* Compute a tiling for all the array reference groups in "kernel".
981 static void compute_group_tilings(struct ppcg_kernel *kernel)
983 int i, j;
985 for (i = 0; i < kernel->n_array; ++i) {
986 struct gpu_local_array_info *array = &kernel->array[i];
988 for (j = 0; j < array->n_group; ++j)
989 gpu_array_ref_group_compute_tiling(array->groups[j]);
993 /* Compute the size of a bounding box around the origin and "set",
994 * where "set" is assumed to contain only non-negative elements.
995 * In particular, compute the maximal value of "set" in each direction
996 * and add one.
998 static __isl_give isl_multi_pw_aff *extract_size(__isl_take isl_set *set,
999 __isl_take isl_set *context)
1001 int i, n;
1002 isl_multi_pw_aff *mpa;
1004 context = isl_set_params(context);
1005 n = isl_set_dim(set, isl_dim_set);
1006 mpa = isl_multi_pw_aff_zero(isl_set_get_space(set));
1007 for (i = 0; i < n; ++i) {
1008 isl_space *space;
1009 isl_aff *one;
1010 isl_pw_aff *bound;
1012 bound = isl_set_dim_max(isl_set_copy(set), i);
1013 bound = isl_pw_aff_coalesce(bound);
1014 bound = isl_pw_aff_gist(bound, isl_set_copy(context));
1016 space = isl_pw_aff_get_domain_space(bound);
1017 one = isl_aff_zero_on_domain(isl_local_space_from_space(space));
1018 one = isl_aff_add_constant_si(one, 1);
1019 bound = isl_pw_aff_add(bound, isl_pw_aff_from_aff(one));
1020 mpa = isl_multi_pw_aff_set_pw_aff(mpa, i, bound);
1022 isl_set_free(set);
1023 isl_set_free(context);
1025 return mpa;
1028 /* Compute the effective grid size as a list of the sizes in each dimension.
1030 * The grid size specified by the user or set by default
1031 * in read_grid_sizes() and applied by the block filter,
1032 * may be too large for the given code in the sense that
1033 * it may contain blocks that don't need to execute anything.
1034 * We therefore don't return this grid size, but instead the
1035 * smallest grid size that ensures that all blocks that actually
1036 * execute code are included in the grid.
1038 * We first extract a description of the grid, i.e., the possible values
1039 * of the block ids, from the domain elements in "domain" and
1040 * kernel->block_filter.
1041 * The block ids are parameters in kernel->block_filter.
1042 * We simply need to change them into set dimensions.
1044 * Then, for each block dimension, we compute the maximal value of the block id
1045 * and add one.
1047 static __isl_give isl_multi_pw_aff *extract_grid_size(
1048 struct ppcg_kernel *kernel, __isl_take isl_union_set *domain)
1050 int i;
1051 isl_set *grid;
1053 domain = isl_union_set_intersect(domain,
1054 isl_union_set_copy(kernel->block_filter));
1055 grid = isl_union_set_params(domain);
1056 grid = isl_set_from_params(grid);
1057 grid = isl_set_add_dims(grid, isl_dim_set, kernel->n_grid);
1058 for (i = 0; i < kernel->n_grid; ++i) {
1059 int pos;
1060 isl_id *id;
1062 id = isl_id_list_get_id(kernel->block_ids, i);
1063 pos = isl_set_find_dim_by_id(grid, isl_dim_param, id);
1064 isl_id_free(id);
1065 assert(pos >= 0);
1066 grid = isl_set_equate(grid, isl_dim_param, pos, isl_dim_set, i);
1067 grid = isl_set_project_out(grid, isl_dim_param, pos, 1);
1070 return extract_size(grid, isl_set_copy(kernel->context));
1073 /* Compute the size of a fixed bounding box around the origin and "set",
1074 * where "set" is assumed to contain only non-negative elements,
1075 * and store the results in "size".
1076 * In particular, compute the maximal value of "set" in each direction
1077 * and add one.
1079 static void extract_fixed_size(__isl_take isl_set *set, int *size)
1081 int i, n;
1082 isl_local_space *ls;
1083 isl_aff *obj;
1085 n = isl_set_dim(set, isl_dim_set);
1086 ls = isl_local_space_from_space(isl_set_get_space(set));
1087 obj = isl_aff_zero_on_domain(ls);
1088 for (i = 0; i < n; ++i) {
1089 isl_val *max;
1091 obj = isl_aff_set_coefficient_si(obj, isl_dim_in, i, 1);
1092 max = isl_set_max_val(set, obj);
1093 size[i] = isl_val_get_num_si(max) + 1;
1094 isl_val_free(max);
1095 obj = isl_aff_set_coefficient_si(obj, isl_dim_in, i, 0);
1097 isl_aff_free(obj);
1098 isl_set_free(set);
1101 /* Compute the effective block size as a list of the sizes in each dimension
1102 * and store the sizes in kernel->block_dim.
1104 * The block size specified by the user or set by default
1105 * in read_block_sizes() and applied by the thread filter,
1106 * may be too large for the given code in the sense that
1107 * it may contain threads that don't need to execute anything.
1108 * We therefore update this block size in kernel->block_dim
1109 * to the smallest block size that ensures that all threads
1110 * that actually execute code are included in the block.
1112 * The possible values of the thread ids is obtained from
1113 * the domain elements "domain" and kernel->thread_filter.
1114 * The current implementation eliminates all parameters, ensuring
1115 * that the size is a fixed constant in each dimension.
1116 * In principle we could also compute parametric sizes.
1117 * We would have to make sure to project out all b%d and t%d parameters,
1118 * however.
1120 static void extract_block_size(struct ppcg_kernel *kernel,
1121 __isl_take isl_union_set *domain)
1123 int i;
1124 int nparam;
1125 isl_set *block;
1127 domain = isl_union_set_intersect(domain,
1128 isl_union_set_copy(kernel->thread_filter));
1129 block = isl_union_set_params(domain);
1130 block = isl_set_from_params(block);
1131 block = isl_set_add_dims(block, isl_dim_set, kernel->n_block);
1132 for (i = 0; i < kernel->n_block; ++i) {
1133 int pos;
1134 isl_id *id;
1136 id = isl_id_list_get_id(kernel->thread_ids, i);
1137 pos = isl_set_find_dim_by_id(block, isl_dim_param, id);
1138 isl_id_free(id);
1139 assert(pos >= 0);
1140 block = isl_set_equate(block, isl_dim_param, pos,
1141 isl_dim_set, i);
1143 nparam = isl_set_dim(block, isl_dim_param);
1144 block = isl_set_project_out(block, isl_dim_param, 0, nparam);
1146 extract_fixed_size(block, kernel->block_dim);
1149 struct ppcg_kernel *ppcg_kernel_free(struct ppcg_kernel *kernel)
1151 int i, j;
1153 if (!kernel)
1154 return NULL;
1156 isl_id_list_free(kernel->block_ids);
1157 isl_id_list_free(kernel->thread_ids);
1158 isl_multi_pw_aff_free(kernel->grid_size);
1159 isl_set_free(kernel->context);
1160 isl_union_set_free(kernel->core);
1161 isl_union_set_free(kernel->arrays);
1162 isl_space_free(kernel->space);
1163 isl_ast_node_free(kernel->tree);
1164 isl_union_set_free(kernel->block_filter);
1165 isl_union_set_free(kernel->thread_filter);
1166 isl_union_pw_multi_aff_free(kernel->shared_schedule);
1167 isl_union_set_free(kernel->sync_writes);
1169 for (i = 0; i < kernel->n_array; ++i) {
1170 struct gpu_local_array_info *array = &kernel->array[i];
1172 for (j = 0; j < array->n_group; ++j)
1173 gpu_array_ref_group_free(array->groups[j]);
1174 free(array->groups);
1176 isl_pw_aff_list_free(array->bound);
1178 free(kernel->array);
1180 for (i = 0; i < kernel->n_var; ++i) {
1181 free(kernel->var[i].name);
1182 isl_vec_free(kernel->var[i].size);
1184 free(kernel->var);
1186 free(kernel);
1188 return NULL;
1191 /* Wrapper around ppcg_kernel_free for use as a isl_id_set_free_user callback.
1193 static void ppcg_kernel_free_wrap(void *user)
1195 struct ppcg_kernel *kernel = user;
1197 ppcg_kernel_free(kernel);
1200 static void create_kernel_var(isl_ctx *ctx, struct gpu_array_ref_group *group,
1201 struct ppcg_kernel_var *var)
1203 int j;
1204 struct gpu_array_tile *tile;
1205 isl_printer *p;
1206 char *name;
1208 var->array = group->array;
1210 tile = group->private_tile;
1211 var->type = ppcg_access_private;
1212 if (!tile) {
1213 tile = group->shared_tile;
1214 var->type = ppcg_access_shared;
1217 p = isl_printer_to_str(ctx);
1218 p = gpu_array_ref_group_print_name(group, p);
1219 var->name = isl_printer_get_str(p);
1220 isl_printer_free(p);
1222 var->size = isl_vec_alloc(ctx, group->array->n_index);
1224 for (j = 0; j < group->array->n_index; ++j)
1225 var->size = isl_vec_set_element_val(var->size, j,
1226 isl_val_copy(tile->bound[j].size));
1229 static int create_kernel_vars(struct ppcg_kernel *kernel)
1231 int i, j, n;
1233 n = 0;
1234 for (i = 0; i < kernel->n_array; ++i) {
1235 struct gpu_local_array_info *array = &kernel->array[i];
1237 for (j = 0; j < array->n_group; ++j) {
1238 struct gpu_array_ref_group *group = array->groups[j];
1239 if (group->private_tile || group->shared_tile)
1240 ++n;
1244 kernel->n_var = n;
1245 kernel->var = isl_calloc_array(kernel->ctx, struct ppcg_kernel_var, n);
1246 if (!kernel->var)
1247 return -1;
1249 n = 0;
1250 for (i = 0; i < kernel->n_array; ++i) {
1251 struct gpu_local_array_info *array = &kernel->array[i];
1253 for (j = 0; j < array->n_group; ++j) {
1254 struct gpu_array_ref_group *group = array->groups[j];
1255 if (!group->private_tile && !group->shared_tile)
1256 continue;
1257 create_kernel_var(kernel->ctx, group, &kernel->var[n]);
1258 ++n;
1262 return 0;
1265 /* Replace "pa" by the zero function defined over the universe domain
1266 * in the space of "pa".
1268 static __isl_give isl_pw_aff *set_universally_zero(__isl_take isl_pw_aff *pa)
1270 isl_space *space;
1271 isl_aff *zero;
1273 space = isl_space_domain(isl_pw_aff_get_space(pa));
1274 isl_pw_aff_free(pa);
1275 zero = isl_aff_zero_on_domain(isl_local_space_from_space(space));
1277 return isl_pw_aff_from_aff(zero);
1280 /* The sizes of the arrays on the host that have been computed by
1281 * extract_array_info may depend on the parameters. Use the extra
1282 * constraints on the parameters that are valid at "host_domain"
1283 * to simplify these expressions and store the results in kernel->array.
1285 * We only need these localized bounds for arrays that are accessed
1286 * by the current kernel. If we have found at least one reference group
1287 * then the array is accessed by the kernel.
1289 * The resulting sizes may be functions that are nowhere defined
1290 * in case the access function cannot possibly access anything inside
1291 * the kernel for some reason. If so, they are replaced by the zero
1292 * function. Since the access function cannot actually access anything,
1293 * there is no harm in printing the array sizes as zero.
1295 static void localize_bounds(struct ppcg_kernel *kernel,
1296 __isl_keep isl_set *host_domain)
1298 int i, j;
1299 isl_set *context;
1301 context = isl_set_copy(host_domain);
1302 context = isl_set_params(context);
1304 for (i = 0; i < kernel->n_array; ++i) {
1305 struct gpu_local_array_info *local = &kernel->array[i];
1306 isl_pw_aff_list *bound;
1307 int n_index;
1309 if (local->n_group == 0)
1310 continue;
1312 n_index = local->array->n_index;
1313 bound = isl_pw_aff_list_alloc(kernel->ctx, n_index);
1315 for (j = 0; j < n_index; ++j) {
1316 isl_pw_aff *pwaff;
1317 int empty;
1319 pwaff = isl_pw_aff_copy(local->array->bound[j]);
1320 pwaff = isl_pw_aff_gist(pwaff, isl_set_copy(context));
1321 empty = isl_pw_aff_is_empty(pwaff);
1322 if (empty < 0)
1323 pwaff = isl_pw_aff_free(pwaff);
1324 else if (empty)
1325 pwaff = set_universally_zero(pwaff);
1326 bound = isl_pw_aff_list_add(bound, pwaff);
1329 local->n_index = n_index;
1330 local->bound = bound;
1332 isl_set_free(context);
1335 /* Create the array of gpu_local_array_info structures "array"
1336 * inside "kernel". The number of elements in this array is
1337 * the same as the number of arrays in "prog".
1338 * Initialize the "array" field of each local array to point
1339 * to the corresponding array in "prog".
1341 static struct ppcg_kernel *ppcg_kernel_create_local_arrays(
1342 struct ppcg_kernel *kernel, struct gpu_prog *prog)
1344 int i;
1345 isl_ctx *ctx;
1347 ctx = isl_set_get_ctx(prog->context);
1348 kernel->array = isl_calloc_array(ctx,
1349 struct gpu_local_array_info, prog->n_array);
1350 if (!kernel->array)
1351 return ppcg_kernel_free(kernel);
1352 kernel->n_array = prog->n_array;
1354 for (i = 0; i < prog->n_array; ++i)
1355 kernel->array[i].array = &prog->array[i];
1357 return kernel;
1360 /* Does "kernel" need to be passed an argument corresponding to array "i"?
1362 * The argument is only needed if the kernel accesses this device memory.
1364 int ppcg_kernel_requires_array_argument(struct ppcg_kernel *kernel, int i)
1366 return kernel->array[i].global;
1369 /* Find the element in gen->stmt that has the given "id".
1370 * Return NULL if no such gpu_stmt can be found.
1372 static struct gpu_stmt *find_stmt(struct gpu_prog *prog, __isl_keep isl_id *id)
1374 int i;
1376 for (i = 0; i < prog->n_stmts; ++i) {
1377 if (id == prog->stmts[i].id)
1378 break;
1381 return i < prog->n_stmts ? &prog->stmts[i] : NULL;
1384 void ppcg_kernel_stmt_free(void *user)
1386 int i;
1387 struct ppcg_kernel_stmt *stmt = user;
1389 if (!stmt)
1390 return;
1392 switch (stmt->type) {
1393 case ppcg_kernel_copy:
1394 isl_ast_expr_free(stmt->u.c.index);
1395 isl_ast_expr_free(stmt->u.c.local_index);
1396 break;
1397 case ppcg_kernel_domain:
1398 isl_id_to_ast_expr_free(stmt->u.d.ref2expr);
1399 break;
1400 case ppcg_kernel_sync:
1401 break;
1404 free(stmt);
1407 /* Return the gpu_stmt_access in the list "accesses" that corresponds
1408 * to "ref_id".
1410 static struct gpu_stmt_access *find_access(struct gpu_stmt_access *accesses,
1411 __isl_keep isl_id *ref_id)
1413 struct gpu_stmt_access *access;
1415 for (access = accesses; access; access = access->next)
1416 if (access->ref_id == ref_id)
1417 return access;
1419 return NULL;
1422 /* Return the index of the array called "name" in the list of arrays.
1424 static int find_array_index(struct ppcg_kernel *kernel, const char *name)
1426 int i;
1428 for (i = 0; i < kernel->n_array; ++i)
1429 if (!strcmp(name, kernel->array[i].array->name))
1430 return i;
1432 return -1;
1435 /* Internal data structure for the index and AST expression transformation
1436 * callbacks for pet_stmt_build_ast_exprs.
1438 * "kernel" is the kernel for which are computing AST expressions and
1439 * may be NULL if we are not inside a kernel.
1440 * "accesses" is the list of gpu_stmt_access in the statement.
1441 * "iterator_map" expresses the statement iterators in terms of
1442 * the AST loop iterators.
1443 * "sched2shared" expresses the outer shared_schedule_dim dimensions of
1444 * the kernel schedule in terms of the AST loop iterators and
1445 * may be NULL if we are not inside a kernel.
1447 * The following fields are set in transform_index and used in transform_expr.
1448 * "array" is the array that is being accessed.
1449 * "global" is set if the global array is accessed (rather than
1450 * shared/private memory).
1451 * "local_array" refers to information on the array specialized
1452 * to the current kernel.
1454 struct ppcg_transform_data {
1455 struct ppcg_kernel *kernel;
1456 struct gpu_stmt_access *accesses;
1457 isl_pw_multi_aff *iterator_map;
1458 isl_pw_multi_aff *sched2shared;
1460 struct gpu_array_info *array;
1461 int global;
1462 struct gpu_local_array_info *local_array;
1465 /* Return a pointer to the gpu_array_ref_group in "local"
1466 * that contains the reference "access".
1467 * Return NULL if no such group can be found.
1469 static struct gpu_array_ref_group *find_ref_group(
1470 struct gpu_local_array_info *local, struct gpu_stmt_access *access)
1472 int i, j;
1474 for (i = 0; i < local->n_group; ++i) {
1475 struct gpu_array_ref_group *group = local->groups[i];
1477 for (j = 0; j < group->n_ref; ++j)
1478 if (group->refs[j] == access)
1479 return group;
1482 return NULL;
1485 /* Index transformation callback for pet_stmt_build_ast_exprs.
1487 * "index" expresses the array indices in terms of statement iterators
1489 * We first reformulate "index" in terms of the AST loop iterators.
1490 * Then we check if we are accessing the global array or
1491 * a shared/private copy. In particular, if we are not inside a kernel
1492 * then we must be accessing a global array.
1493 * In the former case, we simply return
1494 * the updated index. If "index" is an affine expression rather
1495 * than an array access, then we also return the updated index here.
1497 * If no reference groups have been computed for the array,
1498 * then we can only be accessing the global array.
1500 * Otherwise, we apply the tiling to the index.
1501 * This tiling is of the form
1503 * [D -> A] -> T
1505 * where D corresponds to the outer group->depth dimensions of
1506 * the kernel schedule.
1507 * The index is of the form
1509 * L -> A
1511 * We update the tiling to refer to the AST loop iterators
1513 * [L -> A] -> T
1515 * and modify index to keep track of those iterators
1517 * L -> [L -> A]
1519 * Combining these two yields a tiled index expression in terms
1520 * of the AST loop iterators
1522 * L -> T
1524 static __isl_give isl_multi_pw_aff *transform_index(
1525 __isl_take isl_multi_pw_aff *index, __isl_keep isl_id *ref_id,
1526 void *user)
1528 struct ppcg_transform_data *data = user;
1529 struct gpu_stmt_access *access;
1530 struct gpu_array_ref_group *group;
1531 struct gpu_array_tile *tile;
1532 isl_pw_multi_aff *iterator_map;
1533 int i;
1534 int dim;
1535 const char *name;
1536 isl_space *space;
1537 isl_multi_pw_aff *tiling;
1538 isl_pw_multi_aff *pma;
1539 isl_multi_pw_aff *mpa;
1540 isl_pw_multi_aff *sched2depth;
1542 data->array = NULL;
1544 iterator_map = isl_pw_multi_aff_copy(data->iterator_map);
1545 index = isl_multi_pw_aff_pullback_pw_multi_aff(index, iterator_map);
1547 if (!data->kernel)
1548 return index;
1550 access = find_access(data->accesses, ref_id);
1551 if (!access)
1552 return index;
1553 if (!isl_map_has_tuple_name(access->access, isl_dim_out))
1554 return index;
1556 name = get_outer_array_name(access->access);
1557 i = find_array_index(data->kernel, name);
1558 if (i < 0)
1559 isl_die(isl_multi_pw_aff_get_ctx(index), isl_error_internal,
1560 "cannot find array",
1561 return isl_multi_pw_aff_free(index));
1562 data->local_array = &data->kernel->array[i];
1563 data->array = data->local_array->array;
1565 group = find_ref_group(data->local_array, access);
1566 if (!group) {
1567 data->global = 1;
1568 return index;
1571 tile = group->private_tile;
1572 if (!tile)
1573 tile = group->shared_tile;
1574 data->global = !tile;
1575 if (!tile)
1576 return index;
1578 space = isl_space_range(isl_multi_pw_aff_get_space(index));
1579 space = isl_space_map_from_set(space);
1580 pma = isl_pw_multi_aff_identity(space);
1581 sched2depth = isl_pw_multi_aff_copy(data->sched2shared);
1582 dim = isl_pw_multi_aff_dim(sched2depth, isl_dim_out);
1583 sched2depth = isl_pw_multi_aff_drop_dims(sched2depth, isl_dim_out,
1584 group->depth, dim - group->depth);
1585 pma = isl_pw_multi_aff_product(sched2depth, pma);
1586 tiling = isl_multi_pw_aff_from_multi_aff(
1587 isl_multi_aff_copy(tile->tiling));
1588 tiling = isl_multi_pw_aff_pullback_pw_multi_aff(tiling, pma);
1590 space = isl_space_domain(isl_multi_pw_aff_get_space(index));
1591 space = isl_space_map_from_set(space);
1592 mpa = isl_multi_pw_aff_identity(space);
1593 index = isl_multi_pw_aff_range_product(mpa, index);
1594 index = isl_multi_pw_aff_pullback_multi_pw_aff(tiling, index);
1596 return index;
1599 /* Dereference "expr" by adding an index [0].
1600 * The original "expr" is assumed not to have any indices.
1602 * If "expr" is a member access, then the dereferencing needs
1603 * to be applied to the structure argument of this member access.
1605 static __isl_give isl_ast_expr *dereference(__isl_take isl_ast_expr *expr)
1607 isl_ctx *ctx;
1608 isl_ast_expr *arg0, *res;
1609 isl_ast_expr_list *list;
1611 arg0 = isl_ast_expr_get_op_arg(expr, 0);
1612 if (!arg0)
1613 return isl_ast_expr_free(expr);
1614 if (isl_ast_expr_get_type(arg0) == isl_ast_expr_op &&
1615 isl_ast_expr_get_op_type(arg0) == isl_ast_op_member) {
1616 isl_ast_expr *arg;
1618 arg = isl_ast_expr_get_op_arg(arg0, 0);
1619 arg = dereference(arg);
1620 arg0 = isl_ast_expr_set_op_arg(arg0, 0, arg);
1621 expr = isl_ast_expr_set_op_arg(expr, 0, arg0);
1623 return expr;
1625 isl_ast_expr_free(arg0);
1627 ctx = isl_ast_expr_get_ctx(expr);
1628 res = isl_ast_expr_from_val(isl_val_zero(ctx));
1629 list = isl_ast_expr_list_from_ast_expr(res);
1630 res = isl_ast_expr_get_op_arg(expr, 0);
1631 res = isl_ast_expr_access(res, list);
1632 isl_ast_expr_free(expr);
1634 return res;
1637 /* Linearize the index expression "expr" based on the array bounds
1638 * of "array".
1640 * That is, transform expression
1642 * A[i_0][i_1]...[i_n]
1644 * to
1646 * A[(..((i_0 * b_1 + i_1) ... ) * b_n + i_n]
1648 * where b_0, b_1, ..., b_n are the bounds on the array.
1650 * If the base of "expr" is a member access, then the linearization needs
1651 * to be applied to the structure argument of this member access.
1653 * In the base case, if "expr" has no arguments (other than the name of
1654 * the array), then we are passing an entire array to a function.
1655 * In this case, there is nothing to linearize.
1656 * Note that at this point an expression with no arguments can
1657 * only be an entire array because the scalar case and
1658 * the case of single struct are handled by the caller.
1660 * If the number of specified index expressions in "expr"
1661 * is smaller than the dimension of the accessed array,
1662 * then the missing i_j also do not appear in the linearized expression.
1663 * Furthermore, since such an expression does not refer to a single
1664 * element while the default linearized expression would refer to
1665 * a single element, we return the expression
1667 * A + (..((i_0 * b_1 + i_1) ... ) * b_n]
1669 * instead. Note that because of the special case handling above,
1670 * we can assume here that here that there is at least one index expression.
1672 __isl_give isl_ast_expr *gpu_local_array_info_linearize_index(
1673 struct gpu_local_array_info *array, __isl_take isl_ast_expr *expr)
1675 int i, n;
1676 isl_ctx *ctx;
1677 isl_set *context;
1678 isl_ast_expr *arg0;
1679 isl_ast_expr *res;
1680 isl_ast_expr_list *list;
1681 isl_ast_build *build;
1683 arg0 = isl_ast_expr_get_op_arg(expr, 0);
1684 if (isl_ast_expr_get_type(arg0) == isl_ast_expr_op &&
1685 isl_ast_expr_get_op_type(arg0) == isl_ast_op_member) {
1686 isl_ast_expr *arg;
1688 arg = isl_ast_expr_get_op_arg(arg0, 0);
1689 arg = gpu_local_array_info_linearize_index(array, arg);
1690 arg0 = isl_ast_expr_set_op_arg(arg0, 0, arg);
1691 expr = isl_ast_expr_set_op_arg(expr, 0, arg0);
1693 return expr;
1695 isl_ast_expr_free(arg0);
1697 if (isl_ast_expr_get_op_n_arg(expr) == 1)
1698 return expr;
1700 ctx = isl_ast_expr_get_ctx(expr);
1701 context = isl_set_universe(isl_space_params_alloc(ctx, 0));
1702 build = isl_ast_build_from_context(context);
1704 n = isl_ast_expr_get_op_n_arg(expr);
1705 res = isl_ast_expr_get_op_arg(expr, 1);
1706 for (i = 1; i < array->n_index; ++i) {
1707 isl_pw_aff *bound_i;
1708 isl_ast_expr *expr_i;
1710 bound_i = isl_pw_aff_list_get_pw_aff(array->bound, i);
1711 expr_i = isl_ast_build_expr_from_pw_aff(build, bound_i);
1712 res = isl_ast_expr_mul(res, expr_i);
1714 if (i + 1 >= n)
1715 continue;
1716 expr_i = isl_ast_expr_get_op_arg(expr, i + 1);
1717 res = isl_ast_expr_add(res, expr_i);
1720 isl_ast_build_free(build);
1722 if (1 + array->n_index > n) {
1723 res = isl_ast_expr_add(isl_ast_expr_get_op_arg(expr, 0), res);
1724 } else {
1725 list = isl_ast_expr_list_from_ast_expr(res);
1726 res = isl_ast_expr_get_op_arg(expr, 0);
1727 res = isl_ast_expr_access(res, list);
1730 isl_ast_expr_free(expr);
1732 return res;
1735 /* AST expression transformation callback for pet_stmt_build_ast_exprs.
1737 * If the AST expression refers to an array that is not accessed
1738 * at all, then this means the value of the expression is not used,
1739 * so we might as well print zero (NULL pointer) instead.
1741 * If the AST expression refers to a global scalar that is not
1742 * a read-only scalar, then its address was passed to the kernel and
1743 * we need to dereference it.
1745 * If the AST expression refers to an access to a global array,
1746 * then we linearize the access exploiting the bounds in data->local_array.
1748 static __isl_give isl_ast_expr *transform_expr(__isl_take isl_ast_expr *expr,
1749 __isl_keep isl_id *id, void *user)
1751 struct ppcg_transform_data *data = user;
1753 if (!data->array)
1754 return expr;
1755 if (!data->array->accessed) {
1756 isl_ctx *ctx;
1758 ctx = isl_ast_expr_get_ctx(expr);
1759 isl_ast_expr_free(expr);
1760 return isl_ast_expr_from_val(isl_val_zero(ctx));
1762 if (gpu_array_is_read_only_scalar(data->array))
1763 return expr;
1764 if (!data->global)
1765 return expr;
1766 if (data->array->n_index == 0)
1767 return dereference(expr);
1768 if (!data->array->linearize)
1769 return expr;
1771 return gpu_local_array_info_linearize_index(data->local_array, expr);
1774 /* This function is called for each instance of a user statement
1775 * in the kernel "kernel", identified by "gpu_stmt".
1776 * "kernel" may be NULL if we are not inside a kernel.
1778 * We attach a struct ppcg_kernel_stmt to the "node", containing
1779 * a computed AST expression for each access, through an annotation
1780 * with name "user".
1781 * These AST expressions are computed from iterator_map,
1782 * which expresses the domain
1783 * elements in terms of the generated loops, and sched2shared,
1784 * which expresses the outer shared_schedule_dim dimensions of
1785 * the kernel schedule computed by PPCG in terms of the generated loops.
1787 static __isl_give isl_ast_node *create_domain_leaf(
1788 struct ppcg_kernel *kernel, __isl_take isl_ast_node *node,
1789 __isl_keep isl_ast_build *build, struct gpu_stmt *gpu_stmt)
1791 struct ppcg_transform_data data;
1792 struct ppcg_kernel_stmt *stmt;
1793 isl_ctx *ctx;
1794 isl_id *id;
1795 isl_pw_multi_aff *sched2shared;
1796 isl_map *map;
1797 isl_pw_multi_aff *iterator_map;
1798 isl_union_map *schedule;
1800 if (!node)
1801 return NULL;
1802 ctx = isl_ast_node_get_ctx(node);
1804 stmt = isl_calloc_type(ctx, struct ppcg_kernel_stmt);
1805 if (!stmt)
1806 return isl_ast_node_free(node);
1808 schedule = isl_ast_build_get_schedule(build);
1809 map = isl_map_reverse(isl_map_from_union_map(schedule));
1810 iterator_map = isl_pw_multi_aff_from_map(map);
1811 if (kernel)
1812 sched2shared = compute_sched_to_shared(kernel,
1813 isl_pw_multi_aff_copy(iterator_map));
1814 else
1815 sched2shared = NULL;
1817 stmt->type = ppcg_kernel_domain;
1818 stmt->u.d.stmt = gpu_stmt;
1820 data.kernel = kernel;
1821 data.accesses = stmt->u.d.stmt->accesses;
1822 data.iterator_map = iterator_map;
1823 data.sched2shared = sched2shared;
1824 stmt->u.d.ref2expr = pet_stmt_build_ast_exprs(stmt->u.d.stmt->stmt,
1825 build, &transform_index, &data,
1826 &transform_expr, &data);
1828 isl_pw_multi_aff_free(iterator_map);
1829 isl_pw_multi_aff_free(sched2shared);
1831 id = isl_id_alloc(ctx, "user", stmt);
1832 id = isl_id_set_free_user(id, &ppcg_kernel_stmt_free);
1833 return isl_ast_node_set_annotation(node, id);
1836 /* This function is called for each statement node in the AST
1837 * for copying to or from shared/private memory.
1838 * Attach a pointer to a ppcg_kernel_stmt representing the copy
1839 * statement to the node.
1840 * The statement name is "read" or "write", depending on whether we are
1841 * reading from global memory or writing to global memory.
1843 * The schedule is of the form
1845 * type[D -> A] -> L
1847 * where D corresponds to the outer group->depth dimensions of
1848 * the kernel schedule, A to the global array and L to the outer
1849 * generated AST schedule.
1850 * We compute the inverse and strip off the type, resulting in
1852 * L -> [D -> A]
1854 * We combine this mapping with on the one hand the projection
1856 * [D -> A] -> A
1858 * and on the other hand the group tiling
1860 * [D -> A] -> T
1862 * resulting in
1864 * L -> A and L -> T
1866 * and store the corresponding expressions in stmt->index and stmt->local_index,
1867 * where stmt points to the ppcg_kernel_stmt that is attached to the node.
1869 static __isl_give isl_ast_node *create_access_leaf(struct ppcg_kernel *kernel,
1870 struct gpu_array_ref_group *group, __isl_take isl_ast_node *node,
1871 __isl_keep isl_ast_build *build)
1873 struct ppcg_kernel_stmt *stmt;
1874 struct gpu_array_tile *tile;
1875 isl_id *id;
1876 isl_ast_expr *expr;
1877 isl_space *space;
1878 isl_map *access;
1879 isl_pw_multi_aff *pma, *pma2;
1880 const char *type;
1882 stmt = isl_calloc_type(kernel->ctx, struct ppcg_kernel_stmt);
1883 if (!stmt)
1884 return isl_ast_node_free(node);
1886 access = isl_map_from_union_map(isl_ast_build_get_schedule(build));
1887 type = isl_map_get_tuple_name(access, isl_dim_in);
1888 stmt->u.c.read = !strcmp(type, "read");
1889 access = isl_map_reverse(access);
1890 pma = isl_pw_multi_aff_from_map(access);
1891 pma = isl_pw_multi_aff_reset_tuple_id(pma, isl_dim_out);
1893 space = isl_space_range(isl_pw_multi_aff_get_space(pma));
1894 space = isl_space_unwrap(space);
1895 pma2 = isl_pw_multi_aff_range_map(space);
1896 pma2 = isl_pw_multi_aff_pullback_pw_multi_aff(pma2,
1897 isl_pw_multi_aff_copy(pma));
1898 expr = isl_ast_build_access_from_pw_multi_aff(build, pma2);
1899 stmt->u.c.index = expr;
1901 tile = gpu_array_ref_group_tile(group);
1902 pma2 = isl_pw_multi_aff_from_multi_aff(
1903 isl_multi_aff_copy(tile->tiling));
1904 pma2 = isl_pw_multi_aff_pullback_pw_multi_aff(pma2, pma);
1905 expr = isl_ast_build_access_from_pw_multi_aff(build, pma2);
1906 stmt->u.c.local_index = expr;
1908 stmt->u.c.array = group->array;
1909 stmt->u.c.local_array = group->local_array;
1910 stmt->type = ppcg_kernel_copy;
1912 id = isl_id_alloc(kernel->ctx, NULL, stmt);
1913 id = isl_id_set_free_user(id, &ppcg_kernel_stmt_free);
1914 return isl_ast_node_set_annotation(node, id);
1917 /* Create a synchronization ppcg_kernel_stmt and
1918 * attach it to the node "node" representing the synchronization.
1920 static __isl_give isl_ast_node *create_sync_leaf(
1921 struct ppcg_kernel *kernel, __isl_take isl_ast_node *node,
1922 __isl_keep isl_ast_build *build)
1924 struct ppcg_kernel_stmt *stmt;
1925 isl_id *id;
1927 stmt = isl_calloc_type(kernel->ctx, struct ppcg_kernel_stmt);
1928 if (!stmt)
1929 return isl_ast_node_free(node);
1931 stmt->type = ppcg_kernel_sync;
1932 id = isl_id_alloc(kernel->ctx, NULL, stmt);
1933 id = isl_id_set_free_user(id, &ppcg_kernel_stmt_free);
1934 return isl_ast_node_set_annotation(node, id);
1937 /* Internal data structure for at_domain.
1939 * "prog" represents the entire scop.
1940 * "kernel" points to the kernel to which the current schedule node
1941 * belongs. It is set by before_mark and reset by after_mark.
1942 * It may be NULL if we are outside any kernel.
1944 struct ppcg_at_domain_data {
1945 struct gpu_prog *prog;
1946 struct ppcg_kernel *kernel;
1949 /* This function is called for each instance of a user statement
1950 * in the kernel. This may be one of the original user statements
1951 * or a statement introduced by PPCG.
1953 * We assume that the original user statements only have a name
1954 * and no user pointer. The statements introduced by PPCG
1955 * on the other hand all have a user pointer.
1957 * If the user statement is one of the original user statements
1958 * (one with no user pointer), then we call create_domain_leaf. Otherwise,
1959 * we check if it is a copy or synchronization statement and
1960 * call the appropriate functions.
1961 * Statements that copy an array to/from the device do not need
1962 * any further treatment.
1964 static __isl_give isl_ast_node *at_domain(__isl_take isl_ast_node *node,
1965 __isl_keep isl_ast_build *build, void *user)
1967 struct ppcg_at_domain_data *data = user;
1968 isl_ast_expr *expr, *arg;
1969 isl_id *id;
1970 int is_sync;
1971 const char *name;
1972 void *p;
1974 expr = isl_ast_node_user_get_expr(node);
1975 arg = isl_ast_expr_get_op_arg(expr, 0);
1976 id = isl_ast_expr_get_id(arg);
1977 name = isl_id_get_name(id);
1978 p = isl_id_get_user(id);
1979 isl_ast_expr_free(expr);
1980 isl_ast_expr_free(arg);
1982 if (!p) {
1983 struct gpu_stmt *gpu_stmt;
1985 gpu_stmt = find_stmt(data->prog, id);
1986 isl_id_free(id);
1987 if (!gpu_stmt)
1988 isl_die(data->prog->ctx, isl_error_internal,
1989 "statement not found",
1990 return isl_ast_node_free(node));
1992 return create_domain_leaf(data->kernel, node, build, gpu_stmt);
1995 is_sync = gpu_tree_id_is_sync(id, data->kernel);
1996 isl_id_free(id);
1997 if (!prefixcmp(name, "to_device_") || !prefixcmp(name, "from_device_"))
1998 return node;
1999 if (is_sync < 0)
2000 return isl_ast_node_free(node);
2001 if (!strcmp(name, "read") || !strcmp(name, "write")) {
2002 struct gpu_array_ref_group *group = p;
2003 return create_access_leaf(data->kernel, group, node, build);
2005 if (!is_sync)
2006 isl_die(data->prog->ctx, isl_error_internal,
2007 "unknown statement type",
2008 return isl_ast_node_free(node));
2009 return create_sync_leaf(data->kernel, node, build);
2012 /* Given a set of wrapped references "ref", return the corresponding
2013 * access relations based on the tagged access relations "tagged".
2015 * The elements of "ref" are of the form
2017 * [D -> R]
2019 * with D an iteration domains and R a reference.
2020 * The elements of "tagged" are of the form
2022 * [D -> R] -> A
2024 * with A an array.
2026 * Extend "tagged" to include the iteration domain in the range, i.e.,
2028 * [D -> R] -> [D -> A]
2030 * apply the result to "ref" and then unwrap the resulting set
2031 * to obtain relations of the form
2033 * D -> A
2035 static __isl_give isl_union_map *wrapped_reference_to_access(
2036 __isl_take isl_union_set *ref, __isl_take isl_union_map *tagged)
2038 isl_union_map *tag2access;
2040 tag2access = isl_union_map_copy(tagged);
2041 tag2access = isl_union_map_universe(tag2access);
2042 tag2access = isl_union_set_unwrap(isl_union_map_domain(tag2access));
2043 tag2access = isl_union_map_domain_map(tag2access);
2044 tag2access = isl_union_map_range_product(tag2access, tagged);
2046 ref = isl_union_set_coalesce(ref);
2047 ref = isl_union_set_apply(ref, tag2access);
2049 return isl_union_set_unwrap(ref);
2052 /* Given an access relation "access" from one or more array reference groups,
2053 * remove those reads if ("read" is 1) or writes (if "read" is 0)
2054 * that are only needed to communicate data within
2055 * the same iteration of "sched".
2056 * "tagged" contains all tagged access relations to all
2057 * the array reference groups accessed by "access" from statement
2058 * instances scheduled by "sched".
2060 * If the access is a read then it is either an element of
2062 * live_in union (range flow)
2064 * where live_in and flow may be overapproximations, or
2065 * it reads an uninitialized value (that is not live-in because
2066 * there is an intermediate kill) or it reads a value that was
2067 * written within the same (compound) statement instance.
2068 * If the access is a write then it is either an element of
2070 * live_out union (domain flow)
2072 * or it writes a value that is never read (and is not live-out
2073 * because of an intermediate kill) or only
2074 * within the same (compound) statement instance.
2075 * In both cases, the access relation is also a subset of
2076 * the group access relation.
2078 * The cases where an uninitialized value is read or a value is written
2079 * that is never read or where the dataflow occurs within a statement
2080 * instance are also considered local and may also be removed.
2082 * Essentially, we compute the intersection of "access" with either
2084 * live_in union (range non-local-flow)
2086 * or
2088 * live_out union (domain non-local-flow)
2090 * We first construct a relation "local"
2092 * [[D -> R] -> [D' -> R']]
2094 * of pairs of domain iterations accessing the reference group
2095 * and references in the group that are coscheduled by "sched".
2097 * If this relation does not intersect the dataflow dependences,
2098 * then there is nothing we can possibly remove, unless the dataflow
2099 * dependences themselves only relate a subset of the accesses.
2100 * In particular, the accesses may not be involved in any dataflow
2101 * dependences, either because they are uninitialized reads/dead writes
2102 * or because the dataflow occurs inside a statement instance.
2104 * Since the computation below may break up the access relation
2105 * into smaller pieces, we only perform the intersection with
2106 * the non-local dependent accesses if the local pairs
2107 * intersect the dataflow dependences. Otherwise, we intersect
2108 * with the universe of the non-local dependent accesses.
2109 * This should at least remove accesses from statements that
2110 * do not participate in any dependences.
2112 * In particular, we remove the "local" dataflow dependences from
2113 * the set of all dataflow dependences.
2114 * Note that if the potential dataflow dependences are an overapproximation
2115 * of the actual dataflow dependences, then the result remains an
2116 * overapproximation of the non-local dataflow dependences.
2117 * Copying to/from global memory is only needed for the references
2118 * in the domain/range of the result or for accesses that are live out/in
2119 * for the entire scop.
2121 * We therefore map the domain/range of the "external" relation
2122 * to the corresponding access relation and take the union with
2123 * the live out/in relation.
2125 static __isl_give isl_union_map *remove_local_accesses(
2126 struct gpu_prog *prog, __isl_take isl_union_map *tagged,
2127 __isl_take isl_union_map *access, __isl_take isl_union_map *sched,
2128 int read)
2130 int empty;
2131 isl_union_pw_multi_aff *tagger;
2132 isl_union_set *domain;
2133 isl_union_map *local, *external;
2134 isl_union_set *tag_set;
2136 if (isl_union_map_is_empty(access)) {
2137 isl_union_map_free(sched);
2138 isl_union_map_free(tagged);
2139 return access;
2142 tagger = isl_union_pw_multi_aff_copy(prog->scop->tagger);
2143 domain = isl_union_map_domain(isl_union_map_copy(tagged));
2144 tagger = isl_union_pw_multi_aff_intersect_domain(tagger, domain);
2145 sched = isl_union_map_preimage_domain_union_pw_multi_aff(sched, tagger);
2147 local = isl_union_map_apply_range(sched,
2148 isl_union_map_reverse(isl_union_map_copy(sched)));
2149 local = isl_union_map_intersect(local,
2150 isl_union_map_copy(prog->scop->tagged_dep_flow));
2152 empty = isl_union_map_is_empty(local);
2154 external = isl_union_map_copy(prog->scop->tagged_dep_flow);
2155 external = isl_union_map_intersect_params(external,
2156 isl_set_copy(prog->scop->context));
2157 external = isl_union_map_subtract(external, local);
2159 if (read) {
2160 tag_set = isl_union_map_range(external);
2161 external = wrapped_reference_to_access(tag_set, tagged);
2162 external = isl_union_map_union(external,
2163 isl_union_map_copy(prog->scop->live_in));
2164 } else {
2165 tag_set = isl_union_map_domain(external);
2166 external = wrapped_reference_to_access(tag_set, tagged);
2167 external = isl_union_map_union(external,
2168 isl_union_map_copy(prog->scop->live_out));
2171 if (empty < 0)
2172 external = isl_union_map_free(external);
2173 else if (empty)
2174 external = isl_union_map_universe(external);
2176 access = isl_union_map_intersect(access, external);
2178 return access;
2181 /* Given an access relation "access" from "group", remove those reads
2182 * if ("read" is 1) or writes (if "read" is 0) that are only needed to
2183 * communicate data within the same iteration of the schedule at the
2184 * position where the copying of the group is inserted.
2185 * "node" points to this position, i.e., the depth at "node"
2186 * is equal to group->depth.
2188 * We extract a schedule that picks out the iterations of the outer
2189 * group->depth dimensions and call remove_local_accesses.
2191 static __isl_give isl_union_map *remove_local_accesses_group(
2192 struct ppcg_kernel *kernel, struct gpu_array_ref_group *group,
2193 __isl_take isl_union_map *access, __isl_keep isl_schedule_node *node,
2194 int read)
2196 isl_union_map *sched, *tagged;
2198 if (isl_union_map_is_empty(access))
2199 return access;
2201 tagged = group_tagged_access_relation(group);
2202 sched = isl_schedule_node_get_prefix_schedule_relation(node);
2204 return remove_local_accesses(kernel->prog, tagged, access, sched, read);
2207 /* This function is called before the AST generator starts traversing
2208 * the schedule subtree of a node with mark "mark".
2210 * If the mark is called "kernel", store the kernel pointer in data->kernel
2211 * for use in at_domain.
2213 static int before_mark(__isl_keep isl_id *mark,
2214 __isl_keep isl_ast_build *build, void *user)
2216 struct ppcg_at_domain_data *data = user;
2218 if (!mark)
2219 return -1;
2220 if (!strcmp(isl_id_get_name(mark), "kernel"))
2221 data->kernel = isl_id_get_user(mark);
2222 return 0;
2225 /* This function is called after the AST generator has finished traversing
2226 * the schedule subtree of a mark node. "node" points to the corresponding
2227 * mark AST node.
2229 * If the mark is called "kernel", then replace "node" by a user node
2230 * that "calls" the kernel, representing the launch of the kernel.
2231 * The original "node" is stored inside the kernel object so that
2232 * it can be used to print the device code.
2233 * Note that this assumes that a kernel is only launched once.
2234 * Also clear data->kernel.
2236 static __isl_give isl_ast_node *after_mark(__isl_take isl_ast_node *node,
2237 __isl_keep isl_ast_build *build, void *user)
2239 isl_ctx *ctx;
2240 isl_id *id;
2241 isl_ast_expr *expr;
2242 isl_ast_expr_list *list;
2243 struct ppcg_kernel *kernel;
2244 struct ppcg_at_domain_data *data = user;
2246 ctx = isl_ast_node_get_ctx(node);
2247 id = isl_ast_node_mark_get_id(node);
2248 if (!id)
2249 return isl_ast_node_free(node);
2250 if (strcmp(isl_id_get_name(id), "kernel") || !data->kernel) {
2251 isl_id_free(id);
2252 return node;
2254 kernel = data->kernel;
2255 data->kernel = NULL;
2256 kernel->space = isl_ast_build_get_schedule_space(build);
2257 kernel->tree = isl_ast_node_mark_get_node(node);
2258 isl_ast_node_free(node);
2260 expr = isl_ast_expr_from_id(isl_id_copy(id));
2261 list = isl_ast_expr_list_alloc(ctx, 0);
2262 expr = isl_ast_expr_call(expr, list);
2263 node = isl_ast_node_alloc_user(expr);
2264 node = isl_ast_node_set_annotation(node, id);
2266 return node;
2269 static int update_depth(__isl_keep isl_schedule_node *node, void *user)
2271 int *depth = user;
2272 int node_depth;
2274 if (isl_schedule_node_get_type(node) != isl_schedule_node_leaf)
2275 return 1;
2276 node_depth = isl_schedule_node_get_schedule_depth(node);
2277 if (node_depth > *depth)
2278 *depth = node_depth;
2280 return 0;
2283 /* Use isl to generate code for both the host and the device
2284 * from "schedule".
2285 * The device code is marked by "kernel" mark nodes in the schedule tree,
2286 * containing a pointer to a ppcg_kernel object.
2287 * The returned AST only contains the AST for the host code.
2288 * The ASTs for the device code are embedded in ppcg_kernel objects
2289 * attached to the leaf nodes that call "kernel".
2291 static __isl_give isl_ast_node *generate_code(struct gpu_gen *gen,
2292 __isl_take isl_schedule *schedule)
2294 struct ppcg_at_domain_data data;
2295 isl_ast_build *build;
2296 isl_ast_node *tree;
2297 isl_id_list *iterators;
2298 int depth;
2300 data.prog = gen->prog;
2301 data.kernel = NULL;
2303 depth = 0;
2304 if (isl_schedule_foreach_schedule_node(schedule, &update_depth,
2305 &depth) < 0)
2306 return NULL;
2307 build = isl_ast_build_alloc(gen->prog->ctx);
2308 iterators = ppcg_scop_generate_names(gen->prog->scop, depth, "c");
2309 build = isl_ast_build_set_iterators(build, iterators);
2310 build = isl_ast_build_set_at_each_domain(build, &at_domain, &data);
2311 build = isl_ast_build_set_before_each_mark(build, &before_mark, &data);
2312 build = isl_ast_build_set_after_each_mark(build, &after_mark, &data);
2313 if (gen->prog->scop->options->debug->dump_final_schedule)
2314 isl_schedule_dump(schedule);
2315 tree = isl_ast_build_node_from_schedule(build, schedule);
2316 isl_ast_build_free(build);
2318 return tree;
2321 __isl_give isl_union_map *extract_sizes_from_str(isl_ctx *ctx, const char *str)
2323 if (!str)
2324 return NULL;
2325 return isl_union_map_read_from_str(ctx, str);
2328 /* Can "node" be tiled and then mapped to block and thread identifiers?
2329 * That is, is it permutable with at least one coincident dimension?
2331 static int is_permutable(__isl_keep isl_schedule_node *node)
2333 if (!node)
2334 return -1;
2336 if (isl_schedule_node_get_type(node) != isl_schedule_node_band)
2337 return 0;
2338 if (!isl_schedule_node_band_get_permutable(node))
2339 return 0;
2340 if (isl_schedule_node_band_n_member(node) < 1)
2341 return 0;
2342 if (!isl_schedule_node_band_member_get_coincident(node, 0))
2343 return 0;
2345 return 1;
2348 /* A isl_schedule_foreach_schedule_node callback
2349 * for setting *any_permutable and aborting the search
2350 * if "node" is a permutable band with coincident dimensions.
2351 * Otherwise, continue searching.
2353 static int set_permutable(__isl_keep isl_schedule_node *node, void *user)
2355 int *any_permutable = user;
2356 int permutable;
2358 permutable = is_permutable(node);
2359 if (permutable < 0)
2360 return -1;
2361 if (!permutable)
2362 return 1;
2364 *any_permutable = 1;
2366 return -1;
2369 /* Does "schedule" contain any permutable band with at least one coincident
2370 * member?
2372 static int has_any_permutable_node(__isl_keep isl_schedule *schedule)
2374 int any_permutable = 0;
2376 if (isl_schedule_foreach_schedule_node(schedule, &set_permutable,
2377 &any_permutable) < 0 &&
2378 !any_permutable)
2379 return -1;
2381 return any_permutable;
2384 /* Is "node" a leaf or can it be tiled and then mapped to
2385 * block and thread identifiers?
2387 static int is_leaf_or_tilable(__isl_keep isl_schedule_node *node)
2389 if (isl_schedule_node_get_type(node) == isl_schedule_node_leaf)
2390 return 1;
2391 return is_permutable(node);
2394 /* Is "node" the outermost node in its branch that can be tiled
2395 * and then mapped to block and thread identifiers?
2396 * If there are no such nodes in the branch and if "node" is a leaf,
2397 * then it is accepted too.
2399 static int is_outer_tilable(__isl_keep isl_schedule_node *node)
2401 int tilable;
2402 isl_schedule_node *ancestor;
2404 tilable = is_leaf_or_tilable(node);
2405 if (tilable < 0)
2406 return -1;
2407 if (!tilable)
2408 return 0;
2410 tilable = 0;
2411 ancestor = isl_schedule_node_copy(node);
2412 while (isl_schedule_node_has_parent(ancestor)) {
2413 ancestor = isl_schedule_node_parent(ancestor);
2415 tilable = is_permutable(ancestor);
2416 if (tilable < 0 || tilable)
2417 break;
2420 isl_schedule_node_free(ancestor);
2421 return tilable < 0 ? -1 : !tilable;
2424 /* Collect the references to all writes in "group".
2425 * Each reference is represented by a universe set in a space
2427 * [S[i,j] -> R[]]
2429 * with S[i,j] the statement instance space and R[] the array reference.
2431 static __isl_give isl_union_set *group_tagged_writes(
2432 struct gpu_array_ref_group *group)
2434 int i;
2435 isl_space *space;
2436 isl_union_set *writes;
2438 space = isl_map_get_space(group->access);
2439 writes = isl_union_set_empty(space);
2440 for (i = 0; i < group->n_ref; ++i) {
2441 isl_space *space;
2442 isl_set *writes_i;
2444 if (!group->refs[i]->write)
2445 continue;
2447 space = isl_map_get_space(group->refs[i]->tagged_access);
2448 space = isl_space_domain(space);
2449 writes_i = isl_set_universe(space);
2450 writes = isl_union_set_add_set(writes, writes_i);
2453 return writes;
2456 /* Is there any write access in "group" that requires synchronization
2457 * on a write to global memory?
2458 * We currently take into account all writes that would require
2459 * synchronization at the thread level depth, but if the copying
2460 * for this group is performed at an outer level, then we do not
2461 * actually need to take into account dependences at intermediate levels.
2463 static int any_sync_writes_in_group(struct ppcg_kernel *kernel,
2464 struct gpu_array_ref_group *group)
2466 isl_union_set *writes;
2467 int empty, disjoint;
2469 empty = isl_union_set_is_empty(kernel->sync_writes);
2470 if (empty < 0)
2471 return -1;
2472 if (empty)
2473 return 0;
2475 writes = group_tagged_writes(group);
2476 disjoint = isl_union_set_is_disjoint(kernel->sync_writes, writes);
2477 isl_union_set_free(writes);
2479 return disjoint < 0 ? -1 : !disjoint;
2482 /* Collect the references to all writes in "kernel" that write directly
2483 * to global or shared memory, i.e., that are not mapped to private memory.
2484 * Each reference is represented by a universe set in a space
2486 * [S[i,j] -> R[]]
2488 * with S[i,j] the statement instance space and R[] the array reference.
2490 static __isl_give isl_union_set *collect_non_private_tagged_writes(
2491 struct ppcg_kernel *kernel)
2493 isl_union_set *writes;
2494 int i, j;
2496 writes = isl_union_set_empty(isl_union_set_get_space(kernel->arrays));
2498 for (i = 0; i < kernel->n_array; ++i) {
2499 struct gpu_local_array_info *array = &kernel->array[i];
2501 for (j = 0; j < array->n_group; ++j) {
2502 struct gpu_array_ref_group *group = array->groups[j];
2503 isl_union_set *writes_ij;
2505 if (!group->write)
2506 continue;
2507 if (group->private_tile)
2508 continue;
2509 writes_ij = group_tagged_writes(group);
2510 writes = isl_union_set_union(writes, writes_ij);
2514 return writes;
2517 /* Are there any direct writes to global memory that require
2518 * synchronization?
2520 static int any_global_or_shared_sync_writes(struct ppcg_kernel *kernel)
2522 isl_union_set *writes;
2523 int empty, disjoint;
2525 empty = isl_union_set_is_empty(kernel->sync_writes);
2526 if (empty < 0)
2527 return -1;
2528 if (empty)
2529 return 0;
2531 writes = collect_non_private_tagged_writes(kernel);
2532 disjoint = isl_union_set_is_disjoint(kernel->sync_writes, writes);
2533 isl_union_set_free(writes);
2535 return disjoint < 0 ? -1 : !disjoint;
2538 /* Construct an isl_multi_val for use as tile sizes for tiling "node"
2539 * from the elements in "tile_size".
2541 static __isl_give isl_multi_val *construct_band_tiles_sizes(
2542 __isl_keep isl_schedule_node *node, int *tile_size)
2544 int i, n;
2545 isl_ctx *ctx;
2546 isl_space *space;
2547 isl_multi_val *mv;
2549 if (!node)
2550 return NULL;
2552 ctx = isl_schedule_node_get_ctx(node);
2553 space = isl_schedule_node_band_get_space(node);
2554 n = isl_schedule_node_band_n_member(node);
2555 mv = isl_multi_val_zero(space);
2556 for (i = 0; i < n; ++i) {
2557 isl_val *v;
2559 v = isl_val_int_from_si(ctx, tile_size[i]);
2560 mv = isl_multi_val_set_val(mv, i, v);
2563 return mv;
2566 /* Replace the partial schedule S of the band node "node" by
2568 * floor(S/f)
2570 * or
2572 * f * floor(S/f)
2574 * if scale_tile_loops is set, with f the integers in "factor".
2575 * The list that "factor" points to is assumed to contain at least
2576 * as many elements as the number of members in the band.
2578 static __isl_give isl_schedule_node *snap_band_to_sizes(
2579 __isl_take isl_schedule_node *node, int *factor,
2580 struct ppcg_options *options)
2582 isl_multi_val *mv;
2584 mv = construct_band_tiles_sizes(node, factor);
2585 node = isl_schedule_node_band_scale_down(node, isl_multi_val_copy(mv));
2586 if (options->scale_tile_loops)
2587 node = isl_schedule_node_band_scale(node,
2588 isl_multi_val_copy(mv));
2589 isl_multi_val_free(mv);
2591 return node;
2594 /* Tile "band" with tile size specified by "sizes".
2596 * Since the tile loops will be mapped to block ids, we forcibly
2597 * turn off tile loop scaling. We may want to enable tile loop scaling
2598 * at some later point, but then we would have to support the detection
2599 * of strides during the mapping to block ids.
2600 * Similarly, since the point loops will be mapped to thread ids,
2601 * we forcibly shift the point loops so that they start at zero.
2603 static __isl_give isl_schedule_node *tile_band(
2604 __isl_take isl_schedule_node *node, __isl_take isl_multi_val *sizes)
2606 isl_ctx *ctx = isl_schedule_node_get_ctx(node);
2607 int scale_tile;
2608 int shift_point;
2610 scale_tile = isl_options_get_tile_scale_tile_loops(ctx);
2611 isl_options_set_tile_scale_tile_loops(ctx, 0);
2612 shift_point = isl_options_get_tile_shift_point_loops(ctx);
2613 isl_options_set_tile_shift_point_loops(ctx, 1);
2615 node = isl_schedule_node_band_tile(node, sizes);
2617 isl_options_set_tile_scale_tile_loops(ctx, scale_tile);
2618 isl_options_set_tile_shift_point_loops(ctx, shift_point);
2620 return node;
2623 /* Extract the set of parameter values and outer schedule dimensions
2624 * for which any statement instance
2625 * in the kernel inserted at "node" needs to be executed.
2626 * Intersect the set of parameter values derived from the host schedule
2627 * relation with the context of "prog".
2629 static __isl_give isl_set *extract_context(__isl_keep isl_schedule_node *node,
2630 struct gpu_prog *prog)
2632 isl_union_map *schedule;
2633 isl_union_set *schedule_domain;
2634 isl_set *context;
2635 int empty;
2637 schedule = isl_schedule_node_get_prefix_schedule_relation(node);
2638 schedule_domain = isl_union_map_range(schedule);
2639 empty = isl_union_set_is_empty(schedule_domain);
2640 if (empty < 0) {
2641 isl_union_set_free(schedule_domain);
2642 return NULL;
2644 if (empty) {
2645 int depth;
2646 isl_space *space;
2648 space = isl_union_set_get_space(schedule_domain);
2649 isl_union_set_free(schedule_domain);
2650 space = isl_space_set_from_params(space);
2651 depth = isl_schedule_node_get_schedule_depth(node);
2652 space = isl_space_add_dims(space, isl_dim_set, depth);
2653 context = isl_set_empty(space);
2654 } else {
2655 context = isl_set_from_union_set(schedule_domain);
2657 context = isl_set_intersect_params(context,
2658 isl_set_copy(prog->context));
2660 return context;
2663 /* Return the set of outer array elements accessed by
2664 * by the statement instance in "domain" in "prog".
2666 static __isl_give isl_union_set *accessed_by_domain(
2667 __isl_take isl_union_set *domain, struct gpu_prog *prog)
2669 isl_union_map *access;
2670 isl_union_set *arrays;
2672 access = isl_union_map_union(isl_union_map_copy(prog->read),
2673 isl_union_map_copy(prog->may_write));
2674 access = isl_union_map_intersect_domain(access, domain);
2675 arrays = isl_union_map_range(access);
2676 arrays = isl_union_set_apply(arrays,
2677 isl_union_map_copy(prog->to_outer));
2679 return arrays;
2682 /* Return the number of outer band members of the band node "node"
2683 * that are marked coincident.
2685 static int n_outer_coincidence(__isl_keep isl_schedule_node *node)
2687 int i, n;
2689 n = isl_schedule_node_band_n_member(node);
2691 for (i = 0; i < n; ++i)
2692 if (!isl_schedule_node_band_member_get_coincident(node, i))
2693 break;
2695 return i;
2698 /* If the band node "node" has more than "n" members, then split off
2699 * the first "n" of them.
2701 static __isl_give isl_schedule_node *split_band(
2702 __isl_take isl_schedule_node *node, int n)
2704 int dim;
2706 dim = isl_schedule_node_band_n_member(node);
2707 if (n < dim)
2708 node = isl_schedule_node_band_split(node, n);
2710 return node;
2713 /* Scale a band node that may have been split by split_band.
2714 * "sizes" are the scaling factors for the original node.
2715 * "node" either points to the original band node, or the outer
2716 * of the two pieces after splitting.
2718 * If the number of elements in "node" is smaller than the number of
2719 * elements in "sizes", then some splitting has occurred and we split
2720 * "sizes" in the same way.
2722 static __isl_give isl_schedule_node *scale_band(
2723 __isl_take isl_schedule_node *node, __isl_take isl_multi_val *sizes)
2725 int n, dim;
2727 n = isl_multi_val_dim(sizes, isl_dim_set);
2728 dim = isl_schedule_node_band_n_member(node);
2729 if (n > dim) {
2730 isl_multi_val *sizes2;
2732 sizes2 = isl_multi_val_copy(sizes);
2733 sizes = isl_multi_val_drop_dims(sizes,
2734 isl_dim_set, dim, n - dim);
2735 sizes2 = isl_multi_val_drop_dims(sizes2, isl_dim_set, 0, dim);
2736 node = isl_schedule_node_child(node, 0);
2737 node = isl_schedule_node_band_scale(node, sizes2);
2738 node = isl_schedule_node_parent(node);
2741 return isl_schedule_node_band_scale(node, sizes);
2744 /* Return an isl_multi_aff, with as elements the parameters in "space"
2745 * that have the names specified by the elements in "names".
2746 * If (some of) these parameters do not already appear in "space",
2747 * then they are added first.
2749 static __isl_give isl_multi_aff *parameter_vector(__isl_take isl_space *space,
2750 __isl_keep isl_id_list *names)
2752 int i, n;
2753 isl_local_space *ls;
2754 isl_multi_aff *ma;
2756 if (!names)
2757 space = isl_space_free(space);
2759 n = isl_id_list_n_id(names);
2760 for (i = 0; i < n; ++i) {
2761 int pos;
2762 isl_id *id;
2764 id = isl_id_list_get_id(names, i);
2765 pos = isl_space_find_dim_by_id(space, isl_dim_param, id);
2766 if (pos >= 0) {
2767 isl_id_free(id);
2768 continue;
2770 pos = isl_space_dim(space, isl_dim_param);
2771 space = isl_space_add_dims(space, isl_dim_param, 1);
2772 space = isl_space_set_dim_id(space, isl_dim_param, pos, id);
2774 ma = isl_multi_aff_zero(isl_space_copy(space));
2775 ls = isl_local_space_from_space(isl_space_domain(space));
2776 for (i = 0; i < n; ++i) {
2777 int pos;
2778 isl_id *id;
2779 isl_aff *aff;
2781 id = isl_id_list_get_id(names, i);
2782 pos = isl_space_find_dim_by_id(space, isl_dim_param, id);
2783 isl_id_free(id);
2784 aff = isl_aff_var_on_domain(isl_local_space_copy(ls),
2785 isl_dim_param, pos);
2786 ma = isl_multi_aff_set_aff(ma, i, aff);
2788 isl_local_space_free(ls);
2790 return ma;
2793 /* Return constraints on the domain elements that equate a sequence of
2794 * parameters called "names", to the partial schedule
2795 * of "node" modulo the integers in "size".
2796 * The number of elements in the array "size" should be equal
2797 * to the number of elements in "names".
2798 * The number of members of the band node "node" should be smaller
2799 * than or equal to this number. If it is smaller, then the first
2800 * elements of "names" are equated to zero.
2802 static __isl_give isl_union_set *set_schedule_modulo(
2803 __isl_keep isl_schedule_node *node, __isl_keep isl_id_list *names,
2804 int *size)
2806 int n, n_zero;
2807 isl_space *space;
2808 isl_multi_aff *ma;
2809 isl_multi_union_pw_aff *mupa, *mupa2;
2810 isl_multi_val *mv;
2811 isl_union_set *domain;
2813 if (!node)
2814 return NULL;
2815 n = isl_id_list_n_id(names);
2816 if (n == 0)
2817 return isl_schedule_node_get_universe_domain(node);
2818 n_zero = n - isl_schedule_node_band_n_member(node);
2820 mupa = isl_schedule_node_band_get_partial_schedule(node);
2821 mv = construct_band_tiles_sizes(node, size + n_zero);
2822 mupa = isl_multi_union_pw_aff_mod_multi_val(mupa, mv);
2824 space = isl_multi_union_pw_aff_get_space(mupa);
2825 space = isl_space_params(space);
2826 space = isl_space_set_from_params(space);
2827 space = isl_space_add_dims(space, isl_dim_set, n_zero);
2828 ma = isl_multi_aff_zero(space);
2830 domain = isl_schedule_node_get_universe_domain(node);
2831 mupa2 = isl_multi_union_pw_aff_multi_aff_on_domain(
2832 isl_union_set_copy(domain), ma);
2833 mupa = isl_multi_union_pw_aff_range_product(mupa2, mupa);
2835 space = isl_multi_union_pw_aff_get_space(mupa);
2836 ma = parameter_vector(space, names);
2838 mupa2 = isl_multi_union_pw_aff_multi_aff_on_domain(domain, ma);
2839 mupa = isl_multi_union_pw_aff_sub(mupa, mupa2);
2841 return isl_multi_union_pw_aff_zero_union_set(mupa);
2844 /* Insert a context node at "node" introducing the block and thread
2845 * identifiers along with their bounds, which are stored in kernel->grid_size
2846 * and kernel->block_dim.
2847 * Note that the bounds on the block identifiers may implicitly impose
2848 * constraints on the parameters. A guard needs to be inserted
2849 * in the schedule tree to ensure that those bounds hold at "node".
2850 * This guard is inserted in insert_guard.
2852 static __isl_give isl_schedule_node *insert_context(struct ppcg_kernel *kernel,
2853 __isl_take isl_schedule_node *node)
2855 isl_set *context;
2857 context = isl_set_universe(isl_set_get_space(kernel->context));
2859 context = add_bounded_parameters_dynamic(context,
2860 kernel->grid_size, kernel->block_ids);
2861 context = add_bounded_parameters(context,
2862 kernel->block_dim, kernel->thread_ids);
2864 node = isl_schedule_node_insert_context(node, context);
2866 return node;
2869 /* Insert a guard that eliminates kernel launches where the kernel
2870 * obviously does not have any work to do.
2872 * In particular, eliminate kernel launches where there are obviously
2873 * zero blocks.
2874 * Use the same block size constraints that are used to create the context
2875 * to ensure that all constraints implicit in the constructed context
2876 * are imposed by the guard.
2878 * Additionally, add other constraints that are valid
2879 * for each executed instance ("context"), as long as this does not result
2880 * in a disjunction.
2882 static __isl_give isl_schedule_node *insert_guard(
2883 __isl_take isl_schedule_node *node, __isl_keep isl_set *context,
2884 __isl_keep isl_multi_pw_aff *size, struct ppcg_scop *scop)
2886 unsigned nparam, n;
2887 isl_set *guard;
2888 isl_id_list *ids;
2890 guard = isl_set_copy(context);
2891 guard = isl_set_compute_divs(guard);
2892 guard = isl_set_from_basic_set(isl_set_simple_hull(guard));
2894 nparam = isl_set_dim(guard, isl_dim_param);
2895 n = isl_multi_pw_aff_dim(size, isl_dim_out);
2896 ids = ppcg_scop_generate_names(scop, n, "__ppcg_tmp");
2897 guard = add_bounded_parameters_dynamic(guard, size, ids);
2898 isl_id_list_free(ids);
2899 guard = isl_set_project_out(guard, isl_dim_param, nparam, n);
2901 node = isl_schedule_node_insert_guard(node, guard);
2903 return node;
2906 /* Does any array reference group mapping require the band that is mapped
2907 * to threads to be unrolled?
2909 static int kernel_requires_unroll(struct ppcg_kernel *kernel)
2911 int i, j;
2913 for (i = 0; i < kernel->n_array; ++i) {
2914 struct gpu_local_array_info *array = &kernel->array[i];
2916 for (j = 0; j < array->n_group; ++j) {
2917 struct gpu_array_ref_group *group = array->groups[j];
2918 if (gpu_array_ref_group_requires_unroll(group))
2919 return 1;
2923 return 0;
2926 /* Mark the given band node "node" for unrolling by the AST generator and
2927 * then sink it to the leaves of the schedule tree.
2928 * All dimensions of "node" are assumed to be coincident, such that this
2929 * sinking is a valid operation.
2931 static __isl_give isl_schedule_node *unroll(__isl_take isl_schedule_node *node)
2933 int i, n;
2935 n = isl_schedule_node_band_n_member(node);
2936 for (i = 0; i < n; ++i)
2937 node = isl_schedule_node_band_member_set_ast_loop_type(node, i,
2938 isl_ast_loop_unroll);
2940 node = isl_schedule_node_band_sink(node);
2942 return node;
2945 /* Insert a synchronization node in the schedule tree of "node"
2946 * after the core computation of "kernel" at the level of the band
2947 * that is mapped to threads, except if that level is equal to
2948 * that of the band that is mapped to blocks or if there are no writes
2949 * to global or shared memory in the core computation that require
2950 * synchronization.
2951 * If there are any writes to shared memory and the shared memory
2952 * copying is performed at the same level, then synchronization
2953 * is needed between the core and the copying anyway, so we might
2954 * as well add it here. If the copying is performed at a higher
2955 * level, then different iterations of intermediate schedule dimensions
2956 * may have a different mapping from between shared memory elements and
2957 * threads, such that synchronization is required after the core.
2958 * "node" is assumed to point to the kernel node.
2960 static __isl_give isl_schedule_node *add_sync(struct ppcg_kernel *kernel,
2961 __isl_take isl_schedule_node *node)
2963 int kernel_depth;
2964 int need_sync;
2966 need_sync = any_global_or_shared_sync_writes(kernel);
2967 if (need_sync < 0)
2968 return isl_schedule_node_free(node);
2969 if (!need_sync)
2970 return node;
2972 kernel_depth = isl_schedule_node_get_schedule_depth(node);
2974 node = gpu_tree_move_down_to_thread(node, kernel->core);
2975 if (kernel_depth == isl_schedule_node_get_schedule_depth(node))
2976 return gpu_tree_move_up_to_kernel(node);
2978 node = gpu_tree_ensure_following_sync(node, kernel);
2980 node = gpu_tree_move_up_to_kernel(node);
2982 return node;
2985 /* Return a read ("read" is 1) or write access relation for "group"
2986 * with those accesses removed that are only needed to communicate data
2987 * within the subtree of the schedule rooted at "node".
2988 * Furthermore, include the prefix schedule at "node".
2989 * That is, return a relation of the form
2991 * S -> [D -> A]
2993 * with D the outer schedule dimensions at "node".
2995 static __isl_give isl_union_map *anchored_non_local_accesses(
2996 struct ppcg_kernel *kernel, struct gpu_array_ref_group *group,
2997 __isl_take isl_schedule_node *node, int read)
2999 isl_union_map *access;
3000 isl_union_map *prefix;
3002 access = gpu_array_ref_group_access_relation(group, read, !read);
3003 access = remove_local_accesses_group(kernel, group, access, node, read);
3004 prefix = isl_schedule_node_get_prefix_schedule_relation(node);
3005 access = isl_union_map_range_product(prefix, access);
3007 return access;
3010 /* Given an array reference group "group", create a mapping
3012 * read[D -> A] -> [D -> A]
3014 * if "read" is set or
3016 * write[D -> A] -> [D -> A]
3018 * if "read" is not set.
3019 * D corresponds to the outer group->depth dimensions of
3020 * the kernel schedule.
3022 static __isl_give isl_multi_aff *create_from_access(isl_ctx *ctx,
3023 struct gpu_array_ref_group *group, int read)
3025 isl_space *space;
3026 isl_id *id;
3028 space = isl_space_copy(group->array->space);
3029 space = isl_space_from_range(space);
3030 space = isl_space_add_dims(space, isl_dim_in, group->depth);
3031 space = isl_space_wrap(space);
3032 space = isl_space_map_from_set(space);
3034 id = isl_id_alloc(ctx, read ? "read" : "write", group);
3035 space = isl_space_set_tuple_id(space, isl_dim_in, id);
3037 return isl_multi_aff_identity(space);
3040 /* If any writes in "group" require synchronization, then make sure
3041 * that there is a synchronization node for "kernel" after the node
3042 * following "node" in a sequence.
3044 * If "shared" is set and no synchronization is needed for
3045 * the writes to global memory, then add synchronization before
3046 * the kernel to protect shared memory from being overwritten
3047 * by the next iteration of the core computation.
3048 * No additional synchronization is needed to protect against
3049 * the next copy into shared memory because each element of
3050 * the shared memory tile is always copied by the same thread.
3052 static __isl_give isl_schedule_node *add_group_write_sync(
3053 __isl_take isl_schedule_node *node, struct ppcg_kernel *kernel,
3054 struct gpu_array_ref_group *group, int shared)
3056 int need_sync;
3058 need_sync = any_sync_writes_in_group(kernel, group);
3059 if (need_sync < 0)
3060 return isl_schedule_node_free(node);
3061 if (need_sync) {
3062 node = isl_schedule_node_parent(node);
3063 node = isl_schedule_node_next_sibling(node);
3064 node = isl_schedule_node_child(node, 0);
3065 node = gpu_tree_ensure_following_sync(node, kernel);
3066 } else if (shared) {
3067 node = isl_schedule_node_parent(node);
3068 node = isl_schedule_node_parent(node);
3069 node = gpu_tree_move_down_to_depth(node, group->depth,
3070 kernel->core);
3071 node = gpu_tree_move_left_to_sync(node, kernel);
3074 return node;
3077 /* Add copy statements to the schedule tree of "node"
3078 * for reading from global memory to private memory (if "read" is set) or
3079 * for writing back from private memory to global memory
3080 * (if "read" is not set) for the array reference group "group" that
3081 * is mapped to private memory.
3082 * On input, "node" points to the kernel node, and it is moved
3083 * back there on output.
3085 * The copies are performed in the order of the array elements.
3086 * The copy statement instances include a reference to the outer
3087 * group->depth dimensions of the kernel schedule for ease of
3088 * combining them with the group tiling.
3090 * That is, the extra schedule is of the form
3092 * type[D -> A] -> A
3094 * where D corresponds to the outer group->depth dimensions of
3095 * the kernel schedule and A to the global array.
3096 * This schedule is unrolled because registers are not addressable.
3098 * The copying is inserted in the schedule tree through an extension
3099 * of the form
3101 * D -> type[D -> A]
3103 * where the extra domain elements type[D -> A] are those accessed
3104 * by the group.
3105 * A filter is inserted on type[D -> A] to ensure that the element
3106 * is read/written by the same thread that needs the element.
3107 * This filter is obtained by applying
3109 * S -> type[D -> A]
3111 * to the thread filter for the core statements.
3113 * The extension is inserted before the core computation in case of a read
3114 * and after the core computation in case of a write.
3115 * In the latter case, we also make sure that there is a synchronization
3116 * node after the write to global memory, unless this write is performed
3117 * at the outer level of the kernel.
3118 * In principle, this synchronization could be inserted higher
3119 * in the schedule tree depending on where the corresponding reads
3120 * from global memory are performed.
3122 static __isl_give isl_schedule_node *add_copies_group_private(
3123 struct ppcg_kernel *kernel, struct gpu_array_ref_group *group,
3124 __isl_take isl_schedule_node *node, int read)
3126 isl_union_map *access;
3127 isl_union_map *prefix;
3128 isl_union_set *domain;
3129 isl_space *space;
3130 isl_multi_aff *from_access;
3131 isl_multi_pw_aff *mpa;
3132 isl_multi_union_pw_aff *mupa;
3133 isl_schedule_node *graft;
3134 isl_union_set *filter;
3135 int kernel_depth;
3136 int empty;
3138 kernel_depth = isl_schedule_node_get_schedule_depth(node);
3139 node = gpu_tree_move_down_to_depth(node, group->depth, kernel->core);
3141 access = anchored_non_local_accesses(kernel, group, node, read);
3142 empty = isl_union_map_is_empty(access);
3143 if (empty < 0 || empty) {
3144 isl_union_map_free(access);
3145 if (empty < 0)
3146 return isl_schedule_node_free(node);
3147 return gpu_tree_move_up_to_kernel(node);
3150 group->local_array->global = 1;
3152 from_access = create_from_access(kernel->ctx, group, read);
3153 space = isl_space_domain(isl_multi_aff_get_space(from_access));
3154 access = isl_union_map_preimage_range_multi_aff(access, from_access);
3156 filter = isl_union_set_copy(kernel->thread_filter);
3157 filter = isl_union_set_apply(filter, isl_union_map_copy(access));
3158 filter = isl_union_set_detect_equalities(filter);
3159 filter = isl_union_set_coalesce(filter);
3161 domain = isl_union_map_range(access);
3162 access = isl_union_set_wrapped_domain_map(domain);
3163 access = isl_union_map_reverse(access);
3164 access = isl_union_map_coalesce(access);
3165 graft = isl_schedule_node_from_extension(access);
3167 space = isl_space_map_from_set(space);
3168 mpa = isl_multi_pw_aff_identity(space);
3169 mpa = isl_multi_pw_aff_range_factor_range(mpa);
3170 mupa = isl_multi_union_pw_aff_from_multi_pw_aff(mpa);
3172 graft = isl_schedule_node_child(graft, 0);
3173 graft = isl_schedule_node_insert_partial_schedule(graft, mupa);
3174 graft = unroll(graft);
3176 graft = isl_schedule_node_insert_filter(graft, filter);
3178 graft = isl_schedule_node_parent(graft);
3180 if (read)
3181 node = isl_schedule_node_graft_before(node, graft);
3182 else {
3183 node = isl_schedule_node_graft_after(node, graft);
3184 if (kernel_depth < group->depth)
3185 node = add_group_write_sync(node, kernel, group, 0);
3188 node = gpu_tree_move_up_to_kernel(node);
3190 return node;
3193 /* Add copy statements to the schedule tree of "node"
3194 * for reading from global memory to shared memory (if "read" is set) or
3195 * for writing back from shared memory to global memory
3196 * (if "read" is not set) for the array reference group "group" that
3197 * is mapped to shared memory.
3198 * On input, "node" points to the kernel node, and it is moved
3199 * back there on output.
3201 * The copies are performed in the order of the corresponding shared
3202 * memory tile.
3203 * The copy statement instances include a reference to the outer
3204 * group->depth dimensions of the kernel schedule for ease of
3205 * combining them with the group tiling.
3207 * If we are performing a read from global memory to shared memory and
3208 * if the array involved is not a scalar, then we copy
3209 * the entire tile to shared memory. This may result in some extra
3210 * elements getting copied, but it should lead to simpler code
3211 * (which means that fewer registers may be needed) and less divergence.
3213 * Otherwise, we only copy the elements that will be read or have been written
3214 * in the kernel.
3216 * That is, the extra schedule is of the form
3218 * type[D -> A] -> T
3220 * where D corresponds to the outer group->depth dimensions of
3221 * the kernel schedule, A to the global array and T is the corresponding
3222 * shared memory tile.
3224 * The copying is inserted in the schedule tree through an extension
3225 * of the form
3227 * D -> type[D -> A]
3229 * where the extra domain elements type[D -> A] are those accessed
3230 * by the group. In the case of read from a non-scalar, this set
3231 * is replaced by the entire shared memory tile.
3233 * A filter is inserted on type[D -> A] to map the copy instances
3234 * to the threads. In particular, the thread identifiers are
3235 * equated to the position inside the shared memory tile (T)
3236 * modulo the block size.
3237 * We try to align the innermost tile dimension with the innermost
3238 * thread identifier (x) as a heuristic to improve coalescing.
3239 * In particular, if the dimension of the tile is greater than
3240 * the dimension of the block, then the schedule mapping to the tile
3241 * is broken up into two pieces and the filter is applied to the inner part.
3242 * If, on the other hand, the dimension of the tile is smaller than
3243 * the dimension of the block, then the initial thread identifiers
3244 * are equated to zero and the remaining thread identifiers are
3245 * matched to the memory tile.
3247 * The extension is inserted before the core computation in case of a read
3248 * and after the core computation in case of a write.
3249 * In the case of a read, we first need to make sure there is some
3250 * synchronization before the core computation such that we can put the read
3251 * from global memory to shared memory before that synchronization.
3252 * This ensures that all threads have finished copying into shared memory
3253 * before the shared memory is used.
3254 * We also need to make sure that there is a synchronization node after
3255 * the core computation to ensure that the next load into shared memory
3256 * only happens after all data has been used. There is no need for
3257 * this synchronization if we are at the outer level since then there
3258 * won't be a next load.
3259 * In the case of a write, we need to make sure there is some synchronization
3260 * after the core computation such taht we can put the write from shared
3261 * memory to global memory after that synchronization.
3262 * Unless we are at the outer level, we also need a synchronization node
3263 * after the write to ensure the data is saved to global memory
3264 * before the next iteration write to the same shared memory.
3265 * It also makes sure the data has arrived in global memory before
3266 * it is read in a subsequent iteration.
3268 static __isl_give isl_schedule_node *add_copies_group_shared(
3269 struct ppcg_kernel *kernel, struct gpu_array_ref_group *group,
3270 __isl_take isl_schedule_node *node, int read)
3272 struct gpu_array_tile *tile;
3273 isl_union_map *access;
3274 isl_union_set *domain;
3275 isl_union_set *sync;
3276 isl_multi_aff *ma;
3277 isl_multi_aff *from_access;
3278 isl_multi_pw_aff *mpa;
3279 isl_multi_union_pw_aff *mupa;
3280 isl_schedule_node *graft;
3281 isl_union_set *filter;
3282 int skip;
3283 int kernel_depth;
3284 int empty;
3286 kernel_depth = isl_schedule_node_get_schedule_depth(node);
3287 node = gpu_tree_move_down_to_depth(node, group->depth, kernel->core);
3289 access = anchored_non_local_accesses(kernel, group, node, read);
3290 empty = isl_union_map_is_empty(access);
3291 if (empty < 0 || empty) {
3292 isl_union_map_free(access);
3293 if (empty < 0)
3294 return isl_schedule_node_free(node);
3295 return gpu_tree_move_up_to_kernel(node);
3298 group->local_array->global = 1;
3300 from_access = create_from_access(kernel->ctx, group, read);
3302 tile = gpu_array_ref_group_tile(group);
3303 ma = isl_multi_aff_copy(tile->tiling);
3304 ma = isl_multi_aff_pullback_multi_aff(ma,
3305 isl_multi_aff_copy(from_access));
3306 mpa = isl_multi_pw_aff_from_multi_aff(ma);
3307 mupa = isl_multi_union_pw_aff_from_multi_pw_aff(mpa);
3309 domain = isl_union_map_range(access);
3311 if (read && !gpu_array_is_scalar(group->array)) {
3312 isl_map *map;
3313 isl_union_set_free(domain);
3314 map = group_tile(group);
3315 domain = isl_union_set_from_set(isl_map_wrap(map));
3318 domain = isl_union_set_preimage_multi_aff(domain, from_access);
3319 access = isl_union_set_wrapped_domain_map(domain);
3320 access = isl_union_map_reverse(access);
3321 access = isl_union_map_coalesce(access);
3322 graft = isl_schedule_node_from_extension(access);
3324 graft = isl_schedule_node_child(graft, 0);
3326 graft = isl_schedule_node_insert_partial_schedule(graft, mupa);
3328 if (tile->n > kernel->n_block && kernel->n_block > 0) {
3329 graft = isl_schedule_node_band_split(graft,
3330 tile->n - kernel->n_block);
3331 graft = isl_schedule_node_child(graft, 0);
3333 if (tile->n < kernel->n_block)
3334 skip = kernel->n_block - tile->n;
3335 else
3336 skip = 0;
3337 filter = set_schedule_modulo(graft, kernel->thread_ids,
3338 kernel->block_dim);
3339 if (!kernel->options->wrap)
3340 graft = snap_band_to_sizes(graft, kernel->block_dim + skip,
3341 kernel->options);
3342 if (tile->n > kernel->n_block && kernel->n_block > 0)
3343 graft = isl_schedule_node_parent(graft);
3344 graft = isl_schedule_node_insert_filter(graft, filter);
3346 while (graft && isl_schedule_node_has_parent(graft))
3347 graft = isl_schedule_node_parent(graft);
3349 if (read) {
3350 if (kernel_depth < group->depth)
3351 node = gpu_tree_ensure_sync_after_core(node, kernel);
3352 node = gpu_tree_move_left_to_sync(node, kernel);
3353 node = isl_schedule_node_graft_before(node, graft);
3354 } else {
3355 node = gpu_tree_move_right_to_sync(node, kernel);
3356 node = isl_schedule_node_graft_after(node, graft);
3357 if (kernel_depth < group->depth)
3358 node = add_group_write_sync(node, kernel, group, 1);
3361 node = gpu_tree_move_up_to_kernel(node);
3363 return node;
3366 /* Check whether the array reference group "group" is mapped to
3367 * private or shared memory and, if so,
3368 * add copy statements to the schedule tree of "node"
3369 * for reading from global memory to private or shared memory
3370 * (if "read" is set) or for writing back from private or shared memory
3371 * to global memory (if "read" is not set) for this group.
3372 * On input, "node" points to the kernel node, and it is moved
3373 * back there on output.
3375 static __isl_give isl_schedule_node *add_copies_group(
3376 struct ppcg_kernel *kernel, struct gpu_array_ref_group *group,
3377 __isl_take isl_schedule_node *node, int read)
3379 if (group->private_tile)
3380 return add_copies_group_private(kernel, group, node, read);
3381 if (group->shared_tile)
3382 return add_copies_group_shared(kernel, group, node, read);
3383 return node;
3386 /* For each array reference group that is mapped to private or shared memory,
3387 * add copy statements to the schedule tree of "node"
3388 * for reading from global memory to private or shared memory
3389 * and for writing back.
3390 * On input, "node" points to the kernel node, and it is moved
3391 * back there on output.
3393 static __isl_give isl_schedule_node *add_copies(struct ppcg_kernel *kernel,
3394 __isl_take isl_schedule_node *node)
3396 int i, j;
3398 for (i = 0; i < kernel->n_array; ++i) {
3399 struct gpu_local_array_info *array = &kernel->array[i];
3401 for (j = 0; j < array->n_group; ++j) {
3402 struct gpu_array_ref_group *group = array->groups[j];
3404 node = add_copies_group(kernel, group, node, 1);
3405 if (!node)
3406 return NULL;
3407 node = add_copies_group(kernel, group, node, 0);
3408 if (!node)
3409 return NULL;
3413 return node;
3416 /* Mark all dimensions in the current band node atomic.
3418 static __isl_give isl_schedule_node *atomic(__isl_take isl_schedule_node *node)
3420 int i, n;
3422 n = isl_schedule_node_band_n_member(node);
3423 for (i = 0; i < n; ++i)
3424 node = isl_schedule_node_band_member_set_ast_loop_type(node, i,
3425 isl_ast_loop_atomic);
3427 return node;
3430 /* Mark "node" atomic, if it is a band node.
3431 * Do the same for all ancestors.
3432 * Return a pointer to "node" (in the updated schedule tree).
3434 static __isl_give isl_schedule_node *atomic_ancestors(
3435 __isl_take isl_schedule_node *node)
3437 int pos;
3439 if (!node)
3440 return NULL;
3441 if (!isl_schedule_node_has_parent(node))
3442 return node;
3444 pos = isl_schedule_node_get_child_position(node);
3445 node = isl_schedule_node_parent(node);
3446 if (isl_schedule_node_get_type(node) == isl_schedule_node_band)
3447 node = atomic(node);
3448 node = atomic_ancestors(node);
3449 node = isl_schedule_node_child(node, pos);
3451 return node;
3454 /* Collect all write references that require synchronization.
3455 * "node" is assumed to point to the kernel node.
3456 * Each reference is represented by a universe set in a space
3458 * [S[i,j] -> R[]]
3460 * with S[i,j] the statement instance space and R[] the array reference.
3462 * This function should be called before block and thread filters are added.
3464 * Synchronization is needed after a write if there is a subsequent read
3465 * within the same block that may not be performed by the same thread.
3466 * There should not be any dependences between different blocks,
3467 * so we start with the flow dependences within the same kernel invocation
3468 * and we subtract from these those dependences that are mapped
3469 * to the same iteration of the bands where synchronization is inserted.
3470 * We do not remove pairs of instances that are known to map to
3471 * the same thread across different iterations of the intermediate
3472 * bands because the read may be performed by a different thread
3473 * than the one that needs the value if shared memory is involved.
3475 * We also consider all pairs of possible writes that access the same
3476 * memory location and that may be mapped to the same block but not
3477 * to the same iteration of the intermediate bands.
3478 * In theory, it would be possible for one thread to still be in
3479 * a previous iteration of a loop in these bands.
3480 * A write to global memory in this delayed thread could then overwrite
3481 * a write from another thread that has already moved on to
3482 * the next iteration.
3484 * After computing the above writes paired off with reads or writes
3485 * that depend on them, we project onto the domain writes.
3486 * Sychronization is needed after writes to global memory
3487 * through these references.
3489 static __isl_give isl_union_set *compute_sync_writes(
3490 struct ppcg_kernel *kernel, __isl_keep isl_schedule_node *node)
3492 isl_union_map *local;
3493 isl_union_map *may_writes, *shared_access;
3494 isl_union_map *kernel_prefix, *thread_prefix;
3495 isl_union_map *equal;
3496 isl_union_set *wrap;
3497 isl_union_set *domain;
3499 domain = isl_schedule_node_get_universe_domain(node);
3500 kernel_prefix = isl_schedule_node_get_prefix_schedule_union_map(node);
3501 node = isl_schedule_node_copy(node);
3502 node = gpu_tree_move_down_to_thread(node, kernel->core);
3503 thread_prefix = isl_schedule_node_get_prefix_schedule_union_map(node);
3504 isl_schedule_node_free(node);
3506 may_writes = isl_union_map_copy(kernel->prog->scop->tagged_may_writes);
3507 may_writes = isl_union_map_curry(may_writes);
3508 may_writes = isl_union_map_intersect_domain(may_writes, domain);
3509 may_writes = isl_union_map_uncurry(may_writes);
3510 shared_access = isl_union_map_copy(may_writes);
3511 shared_access = isl_union_map_apply_range(shared_access,
3512 isl_union_map_reverse(may_writes));
3514 local = isl_union_map_copy(kernel->prog->scop->tagged_dep_flow);
3515 local = isl_union_map_union(local, shared_access);
3516 local = isl_union_map_zip(local);
3518 equal = isl_union_map_apply_range(kernel_prefix,
3519 isl_union_map_reverse(isl_union_map_copy(kernel_prefix)));
3520 wrap = isl_union_map_wrap(equal);
3521 local = isl_union_map_intersect_domain(local, wrap);
3522 equal = isl_union_map_apply_range(thread_prefix,
3523 isl_union_map_reverse(isl_union_map_copy(thread_prefix)));
3524 wrap = isl_union_map_wrap(equal);
3525 local = isl_union_map_subtract_domain(local, wrap);
3527 local = isl_union_map_zip(local);
3528 local = isl_union_map_universe(local);
3530 return isl_union_map_domain(local);
3533 /* Group the domain elements into a single space, named kernelX,
3534 * with X the kernel sequence number "kernel_id".
3536 static __isl_give isl_schedule_node *group_statements(
3537 __isl_take isl_schedule_node *node, int kernel_id)
3539 char buffer[20];
3540 isl_id *id;
3542 if (!node)
3543 return NULL;
3545 snprintf(buffer, sizeof(buffer), "kernel%d", kernel_id);
3546 id = isl_id_alloc(isl_schedule_node_get_ctx(node), buffer, NULL);
3547 return isl_schedule_node_group(node, id);
3550 /* Create a ppcg_kernel representing the domain instances that reach "node"
3551 * and insert a mark node pointing to the ppcg_kernel before "node".
3552 * The band that "node" points to is the band that needs to be mapped
3553 * to block identifiers. The band that needs to be mapped to thread
3554 * identifiers should be marked by a "thread" mark by the caller.
3555 * This mark is removed by this function.
3556 * If "scale" is set, then the band that "node" points to is scaled
3557 * by "sizes".
3559 * Mark all outer band nodes as atomic to ensure each kernel is only
3560 * scheduled once.
3561 * If the domain elements that reach "node" live in more than one space,
3562 * then group the domain elements into a single space, named kernelX,
3563 * with X the kernel sequence number.
3565 * Insert a guard node governing the kernel node to ensure that
3566 * no kernels with zero blocks are launched.
3568 * Insert a context node describing the block and thread
3569 * identifiers inside the kernel mark.
3570 * The context node needs to be inserted after the effective block size
3571 * has been determined such that the bounds on the thread identifiers
3572 * would reflect the effective block size.
3573 * Insert a filter node inside the context node mapping the statement
3574 * instances to block identifiers. In particular, the block identifiers
3575 * are equated to the partial schedule of band that was marked for mapping
3576 * to blocks modulo the grid size.
3577 * Insert a filter node inside the "thread" mark mapping the statement
3578 * instances to thread identifiers. In particular, the thread identifiers
3579 * are equated to the partial schedule of band that was marked for mapping
3580 * to threads modulo the block size.
3582 * Compute array reference groups for all arrays, set the local
3583 * array bounds based on the set of domain instances that reach
3584 * the kernel node, check the total amount of shared memory used
3585 * and compute all group tilings.
3586 * The array reference groups are computed after the block filter
3587 * has been inserted because it affects the mapping to shared or
3588 * private memory. This computation also requires the thread filter
3589 * (in the ppcg_kernel object), but this thread filter should not
3590 * have been added to the schedule tree yet since the computation
3591 * requires the schedule of the band that needs to be mapped to
3592 * threads before the privatization is applied.
3594 * If any array reference group requires the band mapped to threads
3595 * to be unrolled, then we perform the required unrolling.
3597 * We save a copy of the schedule that may influence the mappings
3598 * to shared or private memory in kernel->shared_schedule.
3600 * Finally, we add synchronization and copy statements to the schedule tree,
3601 * remove the "thread" mark and create representations for the local
3602 * variables in the kernel.
3604 * We keep a copy of the isl_id that points to the kernel to ensure
3605 * that the kernel does not get destroyed if the schedule node
3606 * is freed due to some error condition.
3608 static __isl_give isl_schedule_node *create_kernel(struct gpu_gen *gen,
3609 __isl_take isl_schedule_node *node, int scale,
3610 __isl_keep isl_multi_val *sizes)
3612 struct ppcg_kernel *kernel;
3613 isl_id *id;
3614 isl_schedule_node *node_thread;
3615 isl_union_map *host_schedule;
3616 isl_set *host_domain;
3617 isl_union_set *domain;
3618 int single_statement;
3620 kernel = isl_calloc_type(gen->ctx, struct ppcg_kernel);
3621 kernel = ppcg_kernel_create_local_arrays(kernel, gen->prog);
3622 if (!kernel)
3623 return isl_schedule_node_free(node);
3625 domain = isl_schedule_node_get_domain(node);
3626 single_statement = isl_union_set_n_set(domain) == 1;
3628 kernel->ctx = gen->ctx;
3629 kernel->prog = gen->prog;
3630 kernel->options = gen->options;
3631 kernel->context = extract_context(node, gen->prog);
3632 kernel->core = isl_union_set_universe(isl_union_set_copy(domain));
3633 kernel->arrays = accessed_by_domain(isl_union_set_copy(domain),
3634 gen->prog);
3635 kernel->n_grid = n_outer_coincidence(node);
3636 node_thread = isl_schedule_node_copy(node);
3637 node_thread = gpu_tree_move_down_to_thread(node_thread, kernel->core);
3638 node_thread = isl_schedule_node_child(node_thread, 0);
3639 kernel->n_block = n_outer_coincidence(node_thread);
3640 isl_schedule_node_free(node_thread);
3641 kernel->id = gen->kernel_id++;
3642 read_grid_and_block_sizes(kernel, gen);
3644 kernel->sync_writes = compute_sync_writes(kernel, node);
3646 host_schedule = isl_schedule_node_get_prefix_schedule_union_map(node);
3647 host_domain = isl_set_from_union_set(isl_union_map_range(
3648 host_schedule));
3650 node = atomic_ancestors(node);
3652 id = isl_id_alloc(gen->ctx, "kernel", kernel);
3653 id = isl_id_set_free_user(id, &ppcg_kernel_free_wrap);
3654 node = isl_schedule_node_insert_mark(node, isl_id_copy(id));
3656 if (!single_statement)
3657 node = group_statements(node, kernel->id);
3659 node = isl_schedule_node_child(node, 0);
3660 node = split_band(node, kernel->n_grid);
3661 kernel->block_ids = ppcg_scop_generate_names(gen->prog->scop,
3662 kernel->n_grid, "b");
3663 kernel->block_filter = set_schedule_modulo(node, kernel->block_ids,
3664 kernel->grid_dim);
3665 kernel->grid_size = extract_grid_size(kernel,
3666 isl_union_set_copy(domain));
3667 if (!kernel->options->wrap)
3668 node = snap_band_to_sizes(node, kernel->grid_dim,
3669 kernel->options);
3670 if (scale)
3671 node = scale_band(node, isl_multi_val_copy(sizes));
3672 node = isl_schedule_node_parent(node);
3673 if (!single_statement)
3674 node = isl_schedule_node_parent(node);
3675 node = insert_guard(node, kernel->context, kernel->grid_size,
3676 gen->prog->scop);
3677 node = gpu_tree_move_down_to_thread(node, kernel->core);
3678 node = isl_schedule_node_child(node, 0);
3679 node = split_band(node, kernel->n_block);
3680 kernel->thread_ids = ppcg_scop_generate_names(gen->prog->scop,
3681 kernel->n_block, "t");
3682 kernel->thread_filter = set_schedule_modulo(node, kernel->thread_ids,
3683 kernel->block_dim);
3684 extract_block_size(kernel, domain);
3686 node = gpu_tree_move_up_to_kernel(node);
3687 node = isl_schedule_node_child(node, 0);
3688 node = insert_context(kernel, node);
3689 node = isl_schedule_node_child(node, 0);
3690 node = isl_schedule_node_insert_filter(node,
3691 isl_union_set_copy(kernel->block_filter));
3693 node = gpu_tree_move_up_to_kernel(node);
3695 if (gpu_group_references(kernel, node) < 0)
3696 node = isl_schedule_node_free(node);
3697 localize_bounds(kernel, host_domain);
3698 isl_set_free(host_domain);
3700 check_shared_memory_bound(kernel);
3701 mark_global_arrays(kernel);
3702 compute_group_tilings(kernel);
3704 node = gpu_tree_move_down_to_thread(node, kernel->core);
3705 node = isl_schedule_node_child(node, 0);
3706 if (!kernel->options->wrap)
3707 node = snap_band_to_sizes(node, kernel->block_dim,
3708 kernel->options);
3709 node = isl_schedule_node_insert_filter(node,
3710 isl_union_set_copy(kernel->thread_filter));
3711 if (kernel_requires_unroll(kernel)) {
3712 node = isl_schedule_node_child(node, 0);
3713 node = unroll(node);
3716 node = gpu_tree_move_up_to_thread(node);
3717 kernel->shared_schedule_dim =
3718 isl_schedule_node_get_schedule_depth(node);
3719 kernel->shared_schedule =
3720 isl_schedule_node_get_prefix_schedule_union_pw_multi_aff(node);
3722 node = gpu_tree_move_up_to_kernel(node);
3724 node = add_sync(kernel, node);
3725 node = add_copies(kernel, node);
3727 node = gpu_tree_move_down_to_thread(node, kernel->core);
3728 node = isl_schedule_node_delete(node);
3730 node = gpu_tree_move_up_to_kernel(node);
3732 if (create_kernel_vars(kernel) < 0)
3733 node = isl_schedule_node_free(node);
3735 if (!single_statement)
3736 node = isl_schedule_node_parent(node);
3737 node = isl_schedule_node_parent(node);
3739 isl_id_free(id);
3740 return node;
3743 /* Insert a zero-dimensional permutable band at "node".
3745 static __isl_give isl_schedule_node *insert_empty_permutable_band(
3746 __isl_take isl_schedule_node *node)
3748 isl_space *space;
3749 isl_schedule *schedule;
3750 isl_union_set *domain;
3751 isl_multi_union_pw_aff *mupa;
3753 schedule = isl_schedule_node_get_schedule(node);
3754 domain = isl_schedule_get_domain(schedule);
3755 space = isl_union_set_get_space(domain);
3756 isl_union_set_free(domain);
3757 isl_schedule_free(schedule);
3759 space = isl_space_set_from_params(space);
3760 mupa = isl_multi_union_pw_aff_zero(space);
3761 node = isl_schedule_node_insert_partial_schedule(node, mupa);
3762 node = isl_schedule_node_band_set_permutable(node, 1);
3764 return node;
3767 /* If "node" is the outermost permutable band that can be mapped to block and
3768 * thread identifiers in its branch (or a leaf with no such outer bands),
3769 * then mark the band as such, attaching a ppcg_kernel to the mark.
3771 * If "node" originally points to a leaf, then insert a zero-dimensional
3772 * permutable band such that we can assume that "node" always
3773 * points to a band node.
3775 * Tile "node" using user specified tile sizes, after splitting the band
3776 * if the number of specified tile sizes is smaller than the dimension
3777 * of the band. Mark the point band of this tiling as the band that
3778 * needs to be mapped to threads.
3779 * Create a kernel representing the domain instances that reach "node" and
3780 * insert a mark node pointing to the ppcg_kernel before the band node.
3782 static __isl_give isl_schedule_node *mark_outer_permutable(
3783 __isl_take isl_schedule_node *node, void *user)
3785 struct gpu_gen *gen = user;
3786 int outer;
3787 int scale;
3788 int tile_len;
3789 int *tile_size;
3790 isl_id *id;
3791 isl_multi_val *sizes;
3793 outer = is_outer_tilable(node);
3794 if (outer < 0)
3795 return isl_schedule_node_free(node);
3796 if (!outer)
3797 return node;
3799 if (isl_schedule_node_get_type(node) == isl_schedule_node_leaf)
3800 node = insert_empty_permutable_band(node);
3802 tile_len = isl_schedule_node_band_n_member(node);
3803 tile_size = read_tile_sizes(gen, &tile_len);
3804 if (!tile_size)
3805 return isl_schedule_node_free(node);
3806 if (tile_len < isl_schedule_node_band_n_member(node))
3807 node = isl_schedule_node_band_split(node, tile_len);
3808 sizes = construct_band_tiles_sizes(node, tile_size);
3809 node = tile_band(node, isl_multi_val_copy(sizes));
3810 node = isl_schedule_node_child(node, 0);
3811 id = isl_id_alloc(gen->ctx, "thread", NULL);
3812 node = isl_schedule_node_insert_mark(node, id);
3813 node = isl_schedule_node_parent(node);
3815 scale = gen->options->scale_tile_loops;
3816 node = create_kernel(gen, node, scale, sizes);
3817 isl_multi_val_free(sizes);
3818 free(tile_size);
3820 return node;
3823 /* Does the subtree rooted at "node" have any suitably permutable band nodes?
3824 * That is, does it have any nodes that are permutable and that
3825 * have a least one coincident dimension?
3827 static int subtree_has_permutable_bands(__isl_keep isl_schedule_node *node)
3829 int any_parallelism = 0;
3831 if (isl_schedule_node_foreach_descendant(node, &set_permutable,
3832 &any_parallelism) < 0 &&
3833 !any_parallelism)
3834 return -1;
3836 return any_parallelism;
3839 /* Mark all variables that are accessed by the statement instances in "domain"
3840 * and that are local to "prog" as requiring a declaration in the host code.
3842 static int declare_accessed_local_variables(struct gpu_prog *prog,
3843 __isl_keep isl_union_set *domain)
3845 isl_union_set *arrays;
3846 int i;
3848 if (!ppcg_scop_any_hidden_declarations(prog->scop))
3849 return 0;
3850 arrays = accessed_by_domain(isl_union_set_copy(domain), prog);
3852 for (i = 0; i < prog->n_array; ++i) {
3853 isl_space *space;
3854 isl_set *set;
3855 int empty;
3857 if (!prog->array[i].local)
3858 continue;
3859 space = isl_set_get_space(prog->array[i].extent);
3860 set = isl_union_set_extract_set(arrays, space);
3861 empty = isl_set_plain_is_empty(set);
3862 isl_set_free(set);
3863 if (empty < 0)
3864 goto error;
3865 if (!empty)
3866 prog->array[i].declare_local = 1;
3869 isl_union_set_free(arrays);
3870 return 0;
3871 error:
3872 isl_union_set_free(arrays);
3873 return -1;
3876 /* If "node" points to a set node, then separate its children
3877 * into subtrees that have suitably permutable bands and
3878 * those that do not.
3879 * Adjust the schedule tree in order to execute the second group
3880 * after the first group and return a pointer to the first group,
3881 * assuming there are any such subtrees.
3882 * Mark all local variables in "prog" that are accessed by
3883 * the second group as requiring a declaration on the host.
3885 static __isl_give isl_schedule_node *isolate_permutable_subtrees(
3886 __isl_take isl_schedule_node *node, struct gpu_prog *prog)
3888 isl_space *space;
3889 isl_union_set *filter;
3890 int i, n;
3892 if (!node)
3893 return NULL;
3894 if (isl_schedule_node_get_type(node) != isl_schedule_node_set)
3895 return node;
3897 n = isl_schedule_node_n_children(node);
3898 if (n < 0)
3899 return isl_schedule_node_free(node);
3901 node = isl_schedule_node_child(node, 0);
3902 filter = isl_schedule_node_filter_get_filter(node);
3903 node = isl_schedule_node_parent(node);
3904 space = isl_union_set_get_space(filter);
3905 isl_union_set_free(filter);
3906 filter = isl_union_set_empty(space);
3908 for (i = 0; i < n; ++i) {
3909 int parallelism;
3911 node = isl_schedule_node_child(node, i);
3912 parallelism = subtree_has_permutable_bands(node);
3913 if (parallelism < 0) {
3914 node = isl_schedule_node_free(node);
3915 } else if (!parallelism) {
3916 isl_union_set *filter_i;
3917 filter_i = isl_schedule_node_filter_get_filter(node);
3918 filter = isl_union_set_union(filter, filter_i);
3920 node = isl_schedule_node_parent(node);
3923 if (declare_accessed_local_variables(prog, filter) < 0)
3924 node = isl_schedule_node_free(node);
3925 node = isl_schedule_node_order_after(node, filter);
3927 return node;
3930 /* Replace any reference to an array element in the range of "copy"
3931 * by a reference to all array elements (defined by the extent of the array).
3933 static __isl_give isl_union_map *approximate_copy_out(
3934 __isl_take isl_union_map *copy, struct gpu_prog *prog)
3936 int i;
3937 isl_union_map *res;
3939 res = isl_union_map_empty(isl_union_map_get_space(copy));
3941 for (i = 0; i < prog->n_array; ++i) {
3942 isl_space *space;
3943 isl_set *set;
3944 isl_union_map *copy_i;
3945 isl_union_set *extent, *domain;
3947 space = isl_space_copy(prog->array[i].space);
3948 extent = isl_union_set_from_set(isl_set_universe(space));
3949 copy_i = isl_union_map_copy(copy);
3950 copy_i = isl_union_map_intersect_range(copy_i, extent);
3951 set = isl_set_copy(prog->array[i].extent);
3952 extent = isl_union_set_from_set(set);
3953 domain = isl_union_map_domain(copy_i);
3954 copy_i = isl_union_map_from_domain_and_range(domain, extent);
3955 res = isl_union_map_union(res, copy_i);
3958 isl_union_map_free(copy);
3960 return res;
3963 /* Insert "kernel" marks that point to a ppcg_kernel structure
3964 * in front of all outermost tilable band that (by construction)
3965 * have at least one parallel loop.
3967 static __isl_give isl_schedule_node *mark_kernels(struct gpu_gen *gen,
3968 __isl_take isl_schedule_node *node)
3970 return isl_schedule_node_map_descendant(node,
3971 &mark_outer_permutable, gen);
3974 /* Save the schedule "schedule" to a file called "filename".
3975 * The schedule is printed in block style.
3977 static void save_schedule(__isl_keep isl_schedule *schedule,
3978 const char *filename)
3980 FILE *file;
3981 isl_ctx *ctx;
3982 isl_printer *p;
3984 if (!schedule)
3985 return;
3987 file = fopen(filename, "w");
3988 if (!file) {
3989 fprintf(stderr, "Unable to open '%s' for writing\n", filename);
3990 return;
3992 ctx = isl_schedule_get_ctx(schedule);
3993 p = isl_printer_to_file(ctx, file);
3994 p = isl_printer_set_yaml_style(p, ISL_YAML_STYLE_BLOCK);
3995 p = isl_printer_print_schedule(p, schedule);
3996 isl_printer_free(p);
3997 fclose(file);
4000 /* Load and return a schedule from a file called "filename".
4002 static __isl_give isl_schedule *load_schedule(isl_ctx *ctx,
4003 const char *filename)
4005 FILE *file;
4006 isl_schedule *schedule;
4008 file = fopen(filename, "r");
4009 if (!file) {
4010 fprintf(stderr, "Unable to open '%s' for reading\n", filename);
4011 return NULL;
4013 schedule = isl_schedule_read_from_file(ctx, file);
4014 fclose(file);
4016 return schedule;
4019 /* Construct schedule constraints from the dependences in prog->scop and
4020 * the array order dependences in prog->array_order.
4022 * If live range reordering is allowed, then we need to make sure
4023 * that live ranges on arrays are not run in parallel since doing
4024 * so would require array expansion. We therefore add the array
4025 * order dependences to the coincidence dependences. Non-zero array
4026 * order dependences will then prevent a schedule dimension from being
4027 * considered parallel.
4028 * Live ranges derived from scalars are allowed to be run in parallel
4029 * since we force the scalars to be mapped to private memory in
4030 * check_scalar_live_ranges.
4031 * If live range reordering is allowed, then the false dependences
4032 * are not added to the validity constraints as that would prevent
4033 * reordering. Instead, the external false dependences that enforce that reads
4034 * from potentially live-in data precede any later write and
4035 * that writes of potentially live-out data follow any other earlier write
4036 * are added to the validity and the coincidence constraints.
4037 * The false dependences are still added to the proximity constraints
4038 * for consistency with the case where live range reordering is not allowed.
4039 * The coincidence constraints then consist of flow dependences,
4040 * external false dependences and array order dependences.
4041 * The independences can be filtered out from the first two sets.
4042 * They have already been filtered out from the array order dependences
4043 * on a per array basis in collect_order_dependences.
4044 * There is no need for a per array handling of the other two sets
4045 * as there should be no flow or external false dependence on local
4046 * variables that can be filtered out.
4048 static __isl_give isl_schedule_constraints *construct_schedule_constraints(
4049 struct gpu_prog *prog)
4051 isl_union_set *domain;
4052 isl_union_map *dep_raw, *dep;
4053 isl_union_map *validity, *proximity, *coincidence;
4054 isl_schedule_constraints *sc;
4056 domain = isl_union_set_copy(prog->scop->domain);
4057 sc = isl_schedule_constraints_on_domain(domain);
4058 sc = isl_schedule_constraints_set_context(sc,
4059 isl_set_copy(prog->scop->context));
4060 if (prog->scop->options->live_range_reordering) {
4061 sc = isl_schedule_constraints_set_conditional_validity(sc,
4062 isl_union_map_copy(prog->scop->tagged_dep_flow),
4063 isl_union_map_copy(prog->scop->tagged_dep_order));
4064 proximity = isl_union_map_copy(prog->scop->dep_flow);
4065 validity = isl_union_map_copy(proximity);
4066 validity = isl_union_map_union(validity,
4067 isl_union_map_copy(prog->scop->dep_forced));
4068 proximity = isl_union_map_union(proximity,
4069 isl_union_map_copy(prog->scop->dep_false));
4070 coincidence = isl_union_map_copy(validity);
4071 coincidence = isl_union_map_subtract(coincidence,
4072 isl_union_map_copy(prog->scop->independence));
4073 coincidence = isl_union_map_union(coincidence,
4074 isl_union_map_copy(prog->array_order));
4075 } else {
4076 dep_raw = isl_union_map_copy(prog->scop->dep_flow);
4077 dep = isl_union_map_copy(prog->scop->dep_false);
4078 dep = isl_union_map_union(dep, dep_raw);
4079 dep = isl_union_map_coalesce(dep);
4080 proximity = isl_union_map_copy(dep);
4081 coincidence = isl_union_map_copy(dep);
4082 validity = dep;
4084 sc = isl_schedule_constraints_set_validity(sc, validity);
4085 sc = isl_schedule_constraints_set_coincidence(sc, coincidence);
4086 sc = isl_schedule_constraints_set_proximity(sc, proximity);
4088 if (prog->scop->options->debug->dump_schedule_constraints)
4089 isl_schedule_constraints_dump(sc);
4090 return sc;
4093 /* Compute an appropriate schedule based on the accesses in
4094 * gen->read and gen->write.
4096 * We derive schedule constraints from the dependences in gen->prog->scop
4097 * and then use isl to compute a schedule that has a parallel loop
4098 * in each tilable band.
4100 static __isl_give isl_schedule *compute_schedule(struct gpu_gen *gen)
4102 isl_schedule_constraints *sc;
4103 isl_schedule *schedule;
4105 sc = construct_schedule_constraints(gen->prog);
4106 schedule = isl_schedule_constraints_compute_schedule(sc);
4108 return schedule;
4111 /* If the band node "node" has exactly one member then mark it permutable.
4113 static __isl_give isl_schedule_node *band_set_permutable(
4114 __isl_take isl_schedule_node *node,
4115 __isl_keep isl_schedule_constraints *sc)
4117 if (isl_schedule_node_band_n_member(node) == 1)
4118 node = isl_schedule_node_band_set_permutable(node, 1);
4120 return node;
4123 /* Return the coincidence constraints between pairs of instances
4124 * that are scheduled together by the ancestors of "node".
4125 * That is, select those coincidence constraints that relate
4126 * pairs of instances that have the same value for the prefix schedule.
4127 * If the schedule depth is zero, then the prefix schedule does not
4128 * contain any information, so we intersect domain and range
4129 * of the schedule constraints with the reaching domain elements instead.
4131 static __isl_give isl_union_map *get_local_coincidence(
4132 __isl_keep isl_schedule_node *node,
4133 __isl_keep isl_schedule_constraints *sc)
4135 isl_union_map *coincidence;
4136 isl_multi_union_pw_aff *prefix;
4137 isl_union_pw_multi_aff *contraction;
4139 coincidence = isl_schedule_constraints_get_coincidence(sc);
4140 contraction = isl_schedule_node_get_subtree_contraction(node);
4141 if (isl_schedule_node_get_schedule_depth(node) == 0) {
4142 isl_union_set *domain;
4144 domain = isl_schedule_node_get_domain(node);
4145 domain = isl_union_set_preimage_union_pw_multi_aff(domain,
4146 contraction);
4147 coincidence = isl_union_map_intersect_domain(coincidence,
4148 isl_union_set_copy(domain));
4149 coincidence = isl_union_map_intersect_range(coincidence,
4150 domain);
4151 return coincidence;
4154 prefix = isl_schedule_node_get_prefix_schedule_multi_union_pw_aff(node);
4155 prefix = isl_multi_union_pw_aff_pullback_union_pw_multi_aff(prefix,
4156 contraction);
4157 return isl_union_map_eq_at_multi_union_pw_aff(coincidence, prefix);
4160 /* For each member in the band node "node", determine whether
4161 * it is coincident with respect to the outer nodes and mark
4162 * it accordingly.
4164 * That is, for each coincidence constraint between pairs
4165 * of instances that are scheduled together by the outer nodes,
4166 * check that domain and range are assigned the same value
4167 * by the band member. This test is performed by checking
4168 * that imposing the same value for the band member does not
4169 * remove any elements from the set of coincidence constraints.
4171 static __isl_give isl_schedule_node *band_set_coincident(
4172 __isl_take isl_schedule_node *node,
4173 __isl_keep isl_schedule_constraints *sc)
4175 isl_union_map *coincidence;
4176 isl_union_pw_multi_aff *contraction;
4177 isl_multi_union_pw_aff *partial;
4178 int i, n;
4180 coincidence = get_local_coincidence(node, sc);
4182 partial = isl_schedule_node_band_get_partial_schedule(node);
4183 contraction = isl_schedule_node_get_subtree_contraction(node);
4184 partial = isl_multi_union_pw_aff_pullback_union_pw_multi_aff(partial,
4185 contraction);
4186 n = isl_schedule_node_band_n_member(node);
4187 for (i = 0; i < n; ++i) {
4188 isl_union_map *coincidence_i;
4189 isl_union_pw_aff *upa;
4190 isl_multi_union_pw_aff *partial_i;
4191 int subset;
4193 upa = isl_multi_union_pw_aff_get_union_pw_aff(partial, i);
4194 partial_i = isl_multi_union_pw_aff_from_union_pw_aff(upa);
4195 coincidence_i = isl_union_map_copy(coincidence);
4196 coincidence_i = isl_union_map_eq_at_multi_union_pw_aff(
4197 coincidence_i, partial_i);
4198 subset = isl_union_map_is_subset(coincidence, coincidence_i);
4199 isl_union_map_free(coincidence_i);
4201 if (subset < 0)
4202 break;
4203 node = isl_schedule_node_band_member_set_coincident(node, i,
4204 subset);
4206 if (i < n)
4207 node = isl_schedule_node_free(node);
4208 isl_multi_union_pw_aff_free(partial);
4209 isl_union_map_free(coincidence);
4211 return node;
4214 /* If "node" is a band, then set its properties.
4216 * In particular, if the band has exactly one member, then mark it permutable.
4217 * Mark the band member coincident based on the coincidence constraints
4218 * of "sc".
4220 static __isl_give isl_schedule_node *set_band_properties(
4221 __isl_take isl_schedule_node *node, void *user)
4223 isl_schedule_constraints *sc = user;
4225 if (isl_schedule_node_get_type(node) != isl_schedule_node_band)
4226 return node;
4227 if (isl_schedule_node_band_n_member(node) == 0)
4228 return node;
4230 node = band_set_permutable(node, sc);
4231 node = band_set_coincident(node, sc);
4233 return node;
4236 /* Return the original schedule with all bands marked permutable and
4237 * all band members marked coincident based on the coincidence constraints.
4238 * The bands are explicitly marked permutable so that they will be considered
4239 * by mark_outer_permutable.
4241 static __isl_give isl_schedule *determine_properties_original_schedule(
4242 struct gpu_gen *gen)
4244 isl_schedule *schedule;
4245 isl_schedule_constraints *sc;
4247 schedule = isl_schedule_copy(gen->prog->scop->schedule);
4248 sc = construct_schedule_constraints(gen->prog);
4249 schedule = isl_schedule_map_schedule_node(schedule,
4250 &set_band_properties, sc);
4251 isl_schedule_constraints_free(sc);
4253 return schedule;
4256 /* Obtain a schedule for the scop, by reading it from
4257 * a file, by computing one or by determining the properties
4258 * of the original schedule.
4260 static __isl_give isl_schedule *get_schedule(struct gpu_gen *gen)
4262 isl_schedule *schedule;
4264 if (gen->options->load_schedule_file) {
4265 schedule = load_schedule(gen->ctx,
4266 gen->options->load_schedule_file);
4267 } else {
4268 if (gen->options->reschedule)
4269 schedule = compute_schedule(gen);
4270 else
4271 schedule = determine_properties_original_schedule(gen);
4272 if (gen->options->save_schedule_file)
4273 save_schedule(schedule,
4274 gen->options->save_schedule_file);
4276 if (gen->options->debug->dump_schedule)
4277 isl_schedule_dump(schedule);
4279 return schedule;
4282 /* Construct the string "<a>_<b>".
4284 static char *concat(isl_ctx *ctx, const char *a, const char *b)
4286 isl_printer *p;
4287 char *s;
4289 p = isl_printer_to_str(ctx);
4290 p = isl_printer_print_str(p, a);
4291 p = isl_printer_print_str(p, "_");
4292 p = isl_printer_print_str(p, b);
4293 s = isl_printer_get_str(p);
4294 isl_printer_free(p);
4296 return s;
4299 /* For each array in "prog" of which an element appears in "accessed" and
4300 * that is not a read only scalar, create a zero-dimensional universe set
4301 * of which the tuple id has name "<prefix>_<name of array>" and a user
4302 * pointer pointing to the array (gpu_array_info).
4304 * If the array is local to "prog", then make sure it will be declared
4305 * in the host code.
4307 * Return the list of these universe sets.
4309 static __isl_give isl_union_set_list *create_copy_filters(struct gpu_prog *prog,
4310 const char *prefix, __isl_take isl_union_set *accessed)
4312 int i;
4313 isl_ctx *ctx;
4314 isl_union_set_list *filters;
4316 ctx = prog->ctx;
4317 filters = isl_union_set_list_alloc(ctx, 0);
4318 for (i = 0; i < prog->n_array; ++i) {
4319 struct gpu_array_info *array = &prog->array[i];
4320 isl_space *space;
4321 isl_set *accessed_i;
4322 int empty;
4323 char *name;
4324 isl_id *id;
4325 isl_union_set *uset;
4327 if (gpu_array_is_read_only_scalar(array))
4328 continue;
4330 space = isl_space_copy(array->space);
4331 accessed_i = isl_union_set_extract_set(accessed, space);
4332 empty = isl_set_plain_is_empty(accessed_i);
4333 isl_set_free(accessed_i);
4334 if (empty < 0) {
4335 filters = isl_union_set_list_free(filters);
4336 break;
4338 if (empty)
4339 continue;
4341 if (array->local)
4342 array->declare_local = 1;
4344 name = concat(ctx, prefix, array->name);
4345 id = name ? isl_id_alloc(ctx, name, array) : NULL;
4346 free(name);
4347 space = isl_space_set_alloc(ctx, 0, 0);
4348 space = isl_space_set_tuple_id(space, isl_dim_set, id);
4349 uset = isl_union_set_from_set(isl_set_universe(space));
4351 filters = isl_union_set_list_add(filters, uset);
4353 isl_union_set_free(accessed);
4355 return filters;
4358 /* Make sure that code for the statements in "filters" that
4359 * copy arrays to or from the device is only generated when
4360 * the size of the corresponding array is positive.
4361 * That is, add a set node underneath "graft" with "filters" as children
4362 * and for each child add a guard that the selects the parameter
4363 * values for which the corresponding array has a positive size.
4364 * The array is available in the user pointer of the statement identifier.
4365 * "depth" is the schedule depth of the position where "graft"
4366 * will be added.
4368 static __isl_give isl_schedule_node *insert_positive_size_guards(
4369 __isl_take isl_schedule_node *graft,
4370 __isl_take isl_union_set_list *filters, int depth)
4372 int i, n;
4374 graft = isl_schedule_node_child(graft, 0);
4375 graft = isl_schedule_node_insert_set(graft, filters);
4376 n = isl_schedule_node_n_children(graft);
4377 for (i = 0; i < n; ++i) {
4378 isl_union_set *filter;
4379 isl_set *domain, *guard;
4380 isl_id *id;
4381 struct gpu_array_info *array;
4383 graft = isl_schedule_node_child(graft, i);
4384 filter = isl_schedule_node_filter_get_filter(graft);
4385 domain = isl_set_from_union_set(filter);
4386 id = isl_set_get_tuple_id(domain);
4387 array = isl_id_get_user(id);
4388 isl_id_free(id);
4389 isl_set_free(domain);
4390 guard = gpu_array_positive_size_guard(array);
4391 guard = isl_set_from_params(guard);
4392 guard = isl_set_add_dims(guard, isl_dim_set, depth);
4393 graft = isl_schedule_node_child(graft, 0);
4394 graft = isl_schedule_node_insert_guard(graft, guard);
4395 graft = isl_schedule_node_parent(graft);
4396 graft = isl_schedule_node_parent(graft);
4398 graft = isl_schedule_node_parent(graft);
4400 return graft;
4403 /* Create a graft for copying arrays to or from the device,
4404 * whenever the size of the array is strictly positive.
4405 * Each statement is called "<prefix>_<name of array>" and
4406 * the identifier has a user pointer pointing to the array.
4407 * The graft will be added at the position specified by "node".
4408 * "copy" contains the array elements that need to be copied.
4409 * Only arrays of which some elements need to be copied
4410 * will have a corresponding statement in the graph.
4411 * Note though that each such statement will copy the entire array.
4413 static __isl_give isl_schedule_node *create_copy_device(struct gpu_prog *prog,
4414 __isl_keep isl_schedule_node *node, const char *prefix,
4415 __isl_take isl_union_set *copy)
4417 int depth;
4418 isl_ctx *ctx;
4419 isl_space *space;
4420 isl_union_set *all, *domain;
4421 isl_union_set_list *filters;
4422 isl_union_map *extension;
4423 isl_schedule_node *graft;
4425 ctx = prog->ctx;
4426 depth = isl_schedule_node_get_schedule_depth(node);
4427 filters = create_copy_filters(prog, prefix, copy);
4428 all = isl_union_set_list_union(isl_union_set_list_copy(filters));
4430 space = depth < 0 ? NULL : isl_space_set_alloc(ctx, 0, depth);
4431 domain = isl_union_set_from_set(isl_set_universe(space));
4432 extension = isl_union_map_from_domain_and_range(domain, all);
4433 graft = isl_schedule_node_from_extension(extension);
4435 if (!filters)
4436 return isl_schedule_node_free(graft);
4437 if (isl_union_set_list_n_union_set(filters) == 0) {
4438 isl_union_set_list_free(filters);
4439 return graft;
4442 return insert_positive_size_guards(graft, filters, depth);
4445 /* Return (the universe spaces of) the arrays that are declared
4446 * inside the scop corresponding to "prog" and for which all
4447 * potential writes inside the scop form a subset of "domain".
4449 static __isl_give isl_union_set *extract_local_accesses(struct gpu_prog *prog,
4450 __isl_keep isl_union_set *domain)
4452 int i;
4453 isl_union_set *local;
4455 local = isl_union_set_empty(isl_union_set_get_space(domain));
4457 for (i = 0; i < prog->n_array; ++i) {
4458 isl_set *set;
4459 isl_union_map *to_outer;
4460 isl_union_map *may_write;
4461 isl_union_set *write_domain;
4462 isl_union_set *fields;
4463 int subset;
4465 if (!prog->array[i].local)
4466 continue;
4468 set = isl_set_universe(isl_space_copy(prog->array[i].space));
4469 to_outer = isl_union_map_copy(prog->to_outer);
4470 to_outer = isl_union_map_intersect_range(to_outer,
4471 isl_union_set_from_set(isl_set_copy(set)));
4472 fields = isl_union_map_domain(to_outer);
4473 may_write = isl_union_map_copy(prog->may_write);
4474 may_write = isl_union_map_intersect_range(may_write, fields);
4475 write_domain = isl_union_map_domain(may_write);
4476 subset = isl_union_set_is_subset(write_domain, domain);
4477 isl_union_set_free(write_domain);
4479 if (subset < 0) {
4480 isl_set_free(set);
4481 return isl_union_set_free(local);
4482 } else if (subset) {
4483 local = isl_union_set_add_set(local, set);
4484 } else {
4485 isl_set_free(set);
4489 return local;
4492 /* Internal data structure for node_may_persist.
4494 * "tagger" maps tagged iteration domains to the corresponding untagged
4495 * iteration domain.
4497 * "may_persist_flow" is the set of all tagged dataflow dependences
4498 * with those dependences removed that either precede or follow
4499 * the kernel launch in a sequence.
4500 * "inner_band_flow" is the set of all tagged dataflow dependences
4501 * that are local to a given iteration of the outer band nodes
4502 * with respect to the current node.
4503 * "local_flow" is equal to "inner_band_flow", except that the domain
4504 * and the range have been intersected with intermediate filters
4505 * on children of sets or sequences.
4507 struct ppcg_may_persist_data {
4508 isl_union_pw_multi_aff *tagger;
4510 isl_union_map *local_flow;
4511 isl_union_map *inner_band_flow;
4512 isl_union_map *may_persist_flow;
4515 /* Update the information in "data" based on the band ancestor "node".
4517 * In particular, we restrict the dependences in data->local_flow
4518 * to those dependence where the source and the sink occur in
4519 * the same iteration of the given band node.
4520 * We also update data->inner_band_flow to the new value of
4521 * data->local_flow.
4523 static int update_may_persist_at_band(__isl_keep isl_schedule_node *node,
4524 struct ppcg_may_persist_data *data)
4526 isl_multi_union_pw_aff *partial;
4527 isl_union_pw_multi_aff *contraction;
4528 isl_union_map *flow;
4530 if (isl_schedule_node_band_n_member(node) == 0)
4531 return 0;
4533 partial = isl_schedule_node_band_get_partial_schedule(node);
4534 contraction = isl_schedule_node_get_subtree_contraction(node);
4535 partial = isl_multi_union_pw_aff_pullback_union_pw_multi_aff(partial,
4536 contraction);
4537 partial = isl_multi_union_pw_aff_pullback_union_pw_multi_aff(partial,
4538 isl_union_pw_multi_aff_copy(data->tagger));
4540 flow = data->local_flow;
4541 flow = isl_union_map_eq_at_multi_union_pw_aff(flow, partial);
4542 data->local_flow = flow;
4544 isl_union_map_free(data->inner_band_flow);
4545 data->inner_band_flow = isl_union_map_copy(data->local_flow);
4547 return 0;
4550 /* Given a set of local reaching domain elements "domain",
4551 * expand them to the corresponding leaf domain elements using "contraction"
4552 * and insert the array references tags using data->tagger.
4554 static __isl_give isl_union_set *expand_and_tag(
4555 __isl_take isl_union_set *domain,
4556 __isl_take isl_union_pw_multi_aff *contraction,
4557 struct ppcg_may_persist_data *data)
4559 domain = isl_union_set_preimage_union_pw_multi_aff(domain,
4560 contraction);
4561 domain = isl_union_set_preimage_union_pw_multi_aff(domain,
4562 isl_union_pw_multi_aff_copy(data->tagger));
4563 return domain;
4566 /* Given a filter node that is the child of a set or sequence node,
4567 * restrict data->local_flow to refer only to those elements
4568 * in the filter of the node.
4569 * "contraction" maps the leaf domain elements of the schedule tree
4570 * to the corresponding domain elements at (the parent of) "node".
4572 static int filter_flow(__isl_keep isl_schedule_node *node,
4573 struct ppcg_may_persist_data *data,
4574 __isl_take isl_union_pw_multi_aff *contraction)
4576 isl_union_set *filter;
4577 isl_union_map *flow;
4579 flow = data->local_flow;
4580 filter = isl_schedule_node_filter_get_filter(node);
4581 filter = expand_and_tag(filter, contraction, data);
4582 flow = isl_union_map_intersect_domain(flow, isl_union_set_copy(filter));
4583 flow = isl_union_map_intersect_range(flow, filter);
4584 data->local_flow = flow;
4586 return 0;
4589 /* Given a filter node "node", collect the filters on all preceding siblings
4590 * (which are also filter nodes), add them to "filters" and return the result.
4592 static __isl_give isl_union_set *add_previous_filters(
4593 __isl_take isl_union_set *filters, __isl_keep isl_schedule_node *node)
4595 isl_schedule_node *sibling;
4597 sibling = isl_schedule_node_copy(node);
4598 while (sibling && isl_schedule_node_has_previous_sibling(sibling)) {
4599 isl_union_set *filter;
4601 sibling = isl_schedule_node_previous_sibling(sibling);
4602 filter = isl_schedule_node_filter_get_filter(sibling);
4603 filters = isl_union_set_union(filters, filter);
4605 isl_schedule_node_free(sibling);
4606 if (!sibling)
4607 return isl_union_set_free(filters);
4609 return filters;
4612 /* Given a filter node "node", collect the filters on all following siblings
4613 * (which are also filter nodes), add them to "filters" and return the result.
4615 static __isl_give isl_union_set *add_next_filters(
4616 __isl_take isl_union_set *filters, __isl_keep isl_schedule_node *node)
4618 isl_schedule_node *sibling;
4620 sibling = isl_schedule_node_copy(node);
4621 while (sibling && isl_schedule_node_has_next_sibling(sibling)) {
4622 isl_union_set *filter;
4624 sibling = isl_schedule_node_next_sibling(sibling);
4625 filter = isl_schedule_node_filter_get_filter(sibling);
4626 filters = isl_union_set_union(filters, filter);
4628 isl_schedule_node_free(sibling);
4629 if (!sibling)
4630 return isl_union_set_free(filters);
4632 return filters;
4635 /* Remove those flow dependences from data->may_persist_flow
4636 * that flow between elements of "domain" within the same iteration
4637 * of all outer band nodes.
4638 * "contraction" maps the leaf domain elements of the schedule tree
4639 * to the corresponding elements "domain".
4641 static void remove_external_flow(struct ppcg_may_persist_data *data,
4642 __isl_take isl_union_set *domain,
4643 __isl_keep isl_union_pw_multi_aff *contraction)
4645 isl_union_map *flow;
4647 contraction = isl_union_pw_multi_aff_copy(contraction);
4648 domain = expand_and_tag(domain, contraction, data);
4649 flow = isl_union_map_copy(data->local_flow);
4650 flow = isl_union_map_intersect_domain(flow, isl_union_set_copy(domain));
4651 flow = isl_union_map_intersect_range(flow, domain);
4653 data->may_persist_flow = isl_union_map_subtract(data->may_persist_flow,
4654 flow);
4657 /* Update the information in "data" based on the filter ancestor "node".
4658 * We only need to modify anything if the filter is the child
4659 * of a set or sequence node.
4661 * In the case of a sequence, we remove the dependences between
4662 * statement instances that are both executed either before or
4663 * after the subtree that will be mapped to a kernel, within
4664 * the same iteration of outer bands.
4666 * In both cases, we restrict data->local_flow to the current child.
4668 static int update_may_persist_at_filter(__isl_keep isl_schedule_node *node,
4669 struct ppcg_may_persist_data *data)
4671 enum isl_schedule_node_type type;
4672 isl_schedule_node *parent;
4673 isl_space *space;
4674 isl_union_pw_multi_aff *contraction;
4675 isl_union_set *before, *after, *filter;
4676 isl_union_map *flow;
4678 type = isl_schedule_node_get_parent_type(node);
4679 if (type != isl_schedule_node_sequence && type != isl_schedule_node_set)
4680 return 0;
4682 parent = isl_schedule_node_copy(node);
4683 parent = isl_schedule_node_parent(parent);
4684 contraction = isl_schedule_node_get_subtree_contraction(parent);
4685 isl_schedule_node_free(parent);
4687 if (type == isl_schedule_node_set)
4688 return filter_flow(node, data, contraction);
4690 filter = isl_schedule_node_filter_get_filter(node);
4691 space = isl_union_set_get_space(filter);
4692 isl_union_set_free(filter);
4693 before = isl_union_set_empty(space);
4694 after = isl_union_set_copy(before);
4695 before = add_previous_filters(before, node);
4696 after = add_next_filters(after, node);
4698 remove_external_flow(data, before, contraction);
4699 remove_external_flow(data, after, contraction);
4701 return filter_flow(node, data, contraction);
4704 /* Update the information in "data" based on the ancestor "node".
4706 static int update_may_persist_at(__isl_keep isl_schedule_node *node, void *user)
4708 struct ppcg_may_persist_data *data = user;
4710 switch (isl_schedule_node_get_type(node)) {
4711 case isl_schedule_node_error:
4712 return -1;
4713 case isl_schedule_node_context:
4714 case isl_schedule_node_domain:
4715 case isl_schedule_node_expansion:
4716 case isl_schedule_node_extension:
4717 case isl_schedule_node_guard:
4718 case isl_schedule_node_leaf:
4719 case isl_schedule_node_mark:
4720 case isl_schedule_node_sequence:
4721 case isl_schedule_node_set:
4722 break;
4723 case isl_schedule_node_band:
4724 if (update_may_persist_at_band(node, data) < 0)
4725 return -1;
4726 break;
4727 case isl_schedule_node_filter:
4728 if (update_may_persist_at_filter(node, data) < 0)
4729 return -1;
4730 break;
4733 return 0;
4736 /* Determine the set of array elements that may need to be perserved
4737 * by a kernel constructed from the subtree at "node".
4738 * This includes the set of array elements that may need to be preserved
4739 * by the entire scop (prog->may_persist) and the elements for which
4740 * there is a potential flow dependence that may cross a kernel launch.
4742 * To determine the second set, we start from all flow dependences.
4743 * From this set of dependences, we remove those that cannot possibly
4744 * require data to be preserved by a kernel launch.
4745 * In particular, we consider the following sets of dependences.
4746 * - dependences of which the write occurs inside the kernel.
4747 * If the data is needed outside the kernel, then it will
4748 * be copied out immediately after the kernel launch, so there
4749 * is no need for any special care.
4750 * - dependences of which the read occurs inside the kernel and the
4751 * corresponding write occurs inside the same iteration of the
4752 * outer band nodes. This means that the data is needed in
4753 * the first kernel launch after the write, which is already
4754 * taken care of by the standard copy-in. That is, the data
4755 * do not need to be preserved by any intermediate call to
4756 * the same kernel.
4757 * - dependences of which the write and the read either both occur
4758 * before the kernel launch or both occur after the kernel launch,
4759 * within the same iteration of the outer band nodes with respect
4760 * to the sequence that determines the ordering of the dependence
4761 * and the kernel launch. Such flow dependences cannot cross
4762 * any kernel launch.
4764 * For the remaining (tagged) dependences, we take the domain
4765 * (i.e., the tagged writes) and apply the tagged access relation
4766 * to obtain the accessed data elements.
4767 * These are then combined with the elements that may need to be
4768 * preserved by the entire scop.
4770 static __isl_give isl_union_set *node_may_persist(
4771 __isl_keep isl_schedule_node *node, struct gpu_prog *prog)
4773 struct ppcg_may_persist_data data;
4774 isl_schedule_node *root;
4775 isl_union_pw_multi_aff *contraction;
4776 isl_union_set *domain;
4777 isl_union_set *persist;
4778 isl_union_map *flow, *local_flow;
4780 data.tagger = prog->scop->tagger;
4782 flow = isl_union_map_copy(prog->scop->tagged_dep_flow);
4783 data.local_flow = isl_union_map_copy(flow);
4784 data.inner_band_flow = isl_union_map_copy(flow);
4785 data.may_persist_flow = flow;
4786 if (isl_schedule_node_foreach_ancestor_top_down(node,
4787 &update_may_persist_at, &data) < 0)
4788 data.may_persist_flow =
4789 isl_union_map_free(data.may_persist_flow);
4790 flow = data.may_persist_flow;
4791 isl_union_map_free(data.local_flow);
4793 domain = isl_schedule_node_get_domain(node);
4794 contraction = isl_schedule_node_get_subtree_contraction(node);
4795 domain = isl_union_set_preimage_union_pw_multi_aff(domain,
4796 contraction);
4797 domain = isl_union_set_preimage_union_pw_multi_aff(domain,
4798 isl_union_pw_multi_aff_copy(data.tagger));
4799 flow = isl_union_map_subtract_domain(flow, isl_union_set_copy(domain));
4800 local_flow = data.inner_band_flow;
4801 local_flow = isl_union_map_intersect_range(local_flow, domain);
4802 flow = isl_union_map_subtract(flow, local_flow);
4804 persist = isl_union_map_domain(flow);
4805 persist = isl_union_set_apply(persist,
4806 isl_union_map_copy(prog->scop->tagged_may_writes));
4807 persist = isl_union_set_union(persist,
4808 isl_union_set_copy(prog->may_persist));
4810 return persist;
4813 /* Add nodes for copying outer arrays in and out of the device
4814 * before and after the subtree "node", which contains one or more kernels.
4815 * "domain" contains the original reaching domain elements before
4816 * the kernels were created, i.e., before the contraction that
4817 * may have been performed in creating the kernels has been applied.
4818 * "prefix" contains the prefix schedule at that point, in terms
4819 * of the same original reaching domain elements.
4821 * We first compute the sets of outer array elements that need
4822 * to be copied in and out and then graft in the nodes for
4823 * performing this copying.
4825 * In particular, for each array that is possibly written anywhere in
4826 * the subtree "node" and that may be used after "node"
4827 * or that may be visible outside the corresponding scop,
4828 * we copy out its entire extent.
4830 * Any array elements that is read without first being written inside
4831 * the subtree "node" needs to be copied in.
4832 * Furthermore, if there are any array elements that
4833 * are copied out, but that may not be written inside "node, then
4834 * they also need to be copied in to ensure that the value after execution
4835 * is the same as the value before execution, at least for those array
4836 * elements that may have their values preserved by the scop or that
4837 * may be written before "node" and read after "node".
4838 * In case the array elements are structures, we need to take into
4839 * account that all members of the structures need to be written
4840 * by "node" before we can avoid copying the data structure in.
4842 * Note that the may_write relation is intersected with the domain,
4843 * which has been intersected with the context.
4844 * This helps in those cases where the arrays are declared with a fixed size,
4845 * while the accesses are parametric and the context assigns a fixed value
4846 * to the parameters.
4848 * If an element from a local array is read without first being written,
4849 * then there is no point in copying it in since it cannot have been
4850 * written prior to the scop. Warn about the uninitialized read instead.
4852 static __isl_give isl_schedule_node *add_to_from_device(
4853 __isl_take isl_schedule_node *node, __isl_take isl_union_set *domain,
4854 __isl_take isl_union_map *prefix, struct gpu_prog *prog)
4856 isl_union_set *local;
4857 isl_union_set *to_device, *from_device, *may_persist;
4858 isl_union_map *may_write, *must_write, *copy_out, *not_written;
4859 isl_union_map *read, *copy_in;
4860 isl_union_map *tagged;
4861 isl_union_map *local_uninitialized;
4862 isl_schedule_node *graft;
4864 tagged = isl_union_map_copy(prog->scop->tagged_reads);
4865 tagged = isl_union_map_union(tagged,
4866 isl_union_map_copy(prog->scop->tagged_may_writes));
4868 may_write = isl_union_map_copy(prog->may_write);
4869 may_write = isl_union_map_intersect_domain(may_write,
4870 isl_union_set_copy(domain));
4871 may_write = remove_local_accesses(prog,
4872 isl_union_map_copy(tagged), may_write,
4873 isl_union_map_copy(prefix), 0);
4874 may_write = isl_union_map_apply_range(may_write,
4875 isl_union_map_copy(prog->to_outer));
4876 may_write = isl_union_map_apply_domain(may_write,
4877 isl_union_map_copy(prefix));
4878 may_write = approximate_copy_out(may_write, prog);
4879 copy_out = isl_union_map_copy(may_write);
4880 may_write = isl_union_map_apply_range(may_write,
4881 isl_union_map_copy(prog->to_inner));
4882 must_write = isl_union_map_copy(prog->must_write);
4883 must_write = isl_union_map_apply_domain(must_write,
4884 isl_union_map_copy(prefix));
4885 may_persist = node_may_persist(node, prog);
4886 may_write = isl_union_map_intersect_range(may_write, may_persist);
4887 not_written = isl_union_map_subtract(may_write, must_write);
4889 local = extract_local_accesses(prog, domain);
4890 read = isl_union_map_copy(prog->read);
4891 read = isl_union_map_intersect_domain(read, domain);
4892 read = remove_local_accesses(prog, tagged, read,
4893 isl_union_map_copy(prefix), 1);
4894 local = isl_union_set_apply(local, isl_union_map_copy(prog->to_inner));
4895 local_uninitialized = isl_union_map_copy(prog->scop->live_in);
4896 local_uninitialized = isl_union_map_intersect_range(local_uninitialized,
4897 local);
4898 local_uninitialized = isl_union_map_intersect(local_uninitialized,
4899 isl_union_map_copy(read));
4900 if (!isl_union_map_is_empty(local_uninitialized)) {
4901 fprintf(stderr,
4902 "possibly uninitialized reads (not copied in):\n");
4903 isl_union_map_dump(local_uninitialized);
4905 read = isl_union_map_subtract(read, local_uninitialized);
4906 read = isl_union_map_apply_domain(read, prefix);
4907 copy_in = isl_union_map_union(read, not_written);
4908 copy_in = isl_union_map_apply_range(copy_in,
4909 isl_union_map_copy(prog->to_outer));
4911 graft = create_copy_device(prog, node, "to_device",
4912 isl_union_map_range(copy_in));
4913 node = isl_schedule_node_graft_before(node, graft);
4914 graft = create_copy_device(prog, node, "from_device",
4915 isl_union_map_range(copy_out));
4916 node = isl_schedule_node_graft_after(node, graft);
4918 return node;
4921 /* Update "schedule" for mapping to a GPU device.
4923 * In particular, insert a context node, create kernels for
4924 * each outermost tilable band and introduce node for copying array
4925 * in and out of the device.
4926 * If the child of the initial root points to a set node,
4927 * then children of this node that do not contain any tilable bands
4928 * are separated from the other children and are not mapped to
4929 * the device.
4931 static __isl_give isl_schedule *map_to_device(struct gpu_gen *gen,
4932 __isl_take isl_schedule *schedule)
4934 isl_schedule_node *node;
4935 isl_set *context;
4936 isl_union_set *domain;
4937 isl_union_map *prefix;
4939 context = isl_set_copy(gen->prog->context);
4940 context = isl_set_from_params(context);
4941 schedule = isl_schedule_insert_context(schedule, context);
4943 node = isl_schedule_get_root(schedule);
4944 isl_schedule_free(schedule);
4945 node = isl_schedule_node_child(node, 0);
4946 if (isl_schedule_node_get_type(node) == isl_schedule_node_context)
4947 node = isl_schedule_node_child(node, 0);
4948 node = isolate_permutable_subtrees(node, gen->prog);
4949 domain = isl_schedule_node_get_domain(node);
4950 prefix = isl_schedule_node_get_prefix_schedule_union_map(node);
4951 node = mark_kernels(gen, node);
4952 node = add_to_from_device(node, domain, prefix, gen->prog);
4953 schedule = isl_schedule_node_get_schedule(node);
4954 isl_schedule_node_free(node);
4956 return schedule;
4959 /* Internal data structure for extract_access.
4960 * "next_access" points to the end of a linked list that is extended
4961 * by extract_access.
4962 * "single_expression" is set if the access expressions belong to
4963 * an expression statement (i.e., a statement without internal control).
4964 * "any_to_outer" maps all intermediate arrays to their outer arrays.
4966 struct ppcg_extract_access_data {
4967 struct gpu_stmt_access **next_access;
4968 int single_expression;
4969 isl_union_map *any_to_outer;
4972 /* Given a tagged access relation to a single array "tagged", extract it
4973 * as a map, taking into account that the input may be empty.
4974 * If the access relation is empty, then it does not contain
4975 * any space information, so we try to recover it from the index
4976 * expression.
4977 * The space of the index expression is of the form I -> A,
4978 * with I the statement instances and A the array, or [I -> F] -> A,
4979 * with F the filters corresponding to arguments.
4980 * We first drop F, if present, obtaining I -> A.
4981 * Then we construct I -> R, with R the reference tag,
4982 * combine the two into I -> [R -> A] and uncurry to obtain
4983 * the final result [I -> R] -> A.
4984 * Note that the index expression may have a lower dimension
4985 * than that of the array, but this dimension is not used
4986 * if the access relation is empty.
4988 static __isl_give isl_map *extract_single_tagged_access(
4989 __isl_take isl_union_map *tagged, __isl_keep pet_expr *expr)
4991 int empty;
4992 isl_id *id;
4993 isl_space *space, *space2;
4994 isl_multi_pw_aff *index;
4996 empty = isl_union_map_is_empty(tagged);
4997 if (empty < 0)
4998 goto error;
4999 if (!empty)
5000 return isl_map_from_union_map(tagged);
5001 isl_union_map_free(tagged);
5003 index = pet_expr_access_get_index(expr);
5004 space = isl_multi_pw_aff_get_space(index);
5005 isl_multi_pw_aff_free(index);
5006 if (isl_space_domain_is_wrapping(space))
5007 space = isl_space_domain_factor_domain(space);
5008 space2 = isl_space_copy(space);
5009 space2 = isl_space_from_domain(isl_space_domain(space));
5010 id = pet_expr_access_get_ref_id(expr);
5011 space2 = isl_space_set_tuple_id(space2, isl_dim_out, id);
5012 space = isl_space_range_product(space2, space);
5013 space = isl_space_uncurry(space);
5015 return isl_map_empty(space);
5016 error:
5017 isl_union_map_free(tagged);
5018 return NULL;
5021 /* Extract a gpu_stmt_access from "expr", append it to the list
5022 * that ends in *data->next_access and update the end of the list.
5023 * If the access expression performs a write, then it is considered
5024 * exact only if it appears in a single expression statement and
5025 * if its may access relation is equal to its must access relation.
5027 * The combined set of may accesses may be union if member accesses
5028 * are involved, but the entire set is derived from a single reference and
5029 * therefore from a single index expression. These accesses therefore
5030 * all map to the same outer array.
5032 static int extract_access(__isl_keep pet_expr *expr, void *user)
5034 struct ppcg_extract_access_data *data = user;
5035 isl_union_map *tagged;
5036 struct gpu_stmt_access *access;
5037 isl_ctx *ctx = pet_expr_get_ctx(expr);
5038 isl_multi_pw_aff *index;
5040 access = isl_alloc_type(ctx, struct gpu_stmt_access);
5041 assert(access);
5042 access->next = NULL;
5043 access->read = pet_expr_access_is_read(expr);
5044 access->write = pet_expr_access_is_write(expr);
5045 tagged = pet_expr_access_get_tagged_may_read(expr);
5046 tagged = isl_union_map_union(tagged,
5047 pet_expr_access_get_tagged_may_write(expr));
5048 tagged = isl_union_map_apply_range(tagged,
5049 isl_union_map_copy(data->any_to_outer));
5050 if (!access->write) {
5051 access->exact_write = 1;
5052 } else if (!data->single_expression) {
5053 access->exact_write = 0;
5054 } else {
5055 isl_union_map *must, *may;
5056 may = isl_union_map_copy(tagged);
5057 may = isl_union_map_domain_factor_domain(may);
5058 must = pet_expr_access_get_must_write(expr);
5059 access->exact_write = isl_union_map_is_equal(must, may);
5060 isl_union_map_free(must);
5061 isl_union_map_free(may);
5063 index = pet_expr_access_get_index(expr);
5064 access->n_index = isl_multi_pw_aff_dim(index, isl_dim_out);
5065 isl_multi_pw_aff_free(index);
5066 access->ref_id = pet_expr_access_get_ref_id(expr);
5067 access->tagged_access = extract_single_tagged_access(tagged, expr);
5068 access->access = isl_map_copy(access->tagged_access);
5069 access->access = isl_map_domain_factor_domain(access->access);
5071 *data->next_access = access;
5072 data->next_access = &(*data->next_access)->next;
5074 if (!access->access)
5075 return -1;
5077 return 0;
5080 /* Construct a linked list of gpu_stmt_access objects,
5081 * one for each access expression in the statement body.
5082 * "any_to_outer" maps all intermediate arrays to their outer arrays.
5084 static int pet_stmt_extract_accesses(struct gpu_stmt *stmt,
5085 __isl_keep isl_union_map *any_to_outer)
5087 struct ppcg_extract_access_data data;
5089 stmt->accesses = NULL;
5090 data.next_access = &stmt->accesses;
5091 data.single_expression =
5092 pet_tree_get_type(stmt->stmt->body) == pet_tree_expr;
5093 data.any_to_outer = any_to_outer;
5094 return pet_tree_foreach_access_expr(stmt->stmt->body,
5095 &extract_access, &data);
5098 /* Return an array of gpu_stmt representing the statements in "scop".
5100 static struct gpu_stmt *extract_stmts(isl_ctx *ctx, struct ppcg_scop *scop,
5101 __isl_keep isl_set *context, __isl_keep isl_union_map *any_to_outer)
5103 int i;
5104 struct gpu_stmt *stmts;
5106 stmts = isl_calloc_array(ctx, struct gpu_stmt, scop->pet->n_stmt);
5107 if (!stmts)
5108 return NULL;
5110 for (i = 0; i < scop->pet->n_stmt; ++i) {
5111 struct gpu_stmt *s = &stmts[i];
5113 s->id = isl_set_get_tuple_id(scop->pet->stmts[i]->domain);
5114 s->stmt = scop->pet->stmts[i];
5115 if (pet_stmt_extract_accesses(s, any_to_outer) < 0)
5116 return free_stmts(stmts, i + 1);
5119 return stmts;
5122 /* Callback for ppcg_print_guarded that calls the callback for generate_gpu.
5124 static __isl_give isl_printer *print_gpu(__isl_take isl_printer *p, void *user)
5126 struct gpu_gen *gen = user;
5128 return gen->print(p, gen->prog, gen->tree, &gen->types,
5129 gen->print_user);
5132 /* Generate CUDA code for "scop" and print it to "p".
5133 * After generating an AST for the transformed scop as explained below,
5134 * we call "gen->print" to print the AST in the desired output format
5135 * to "p".
5137 * If it turns out that it does not make sense to generate GPU code,
5138 * then we generate CPU code instead.
5140 * The GPU code is generated in a context where at least one
5141 * statement instance is executed. The corresponding guard (if any) is printed
5142 * around the entire generated GPU code, except for the declaration
5143 * of the arrays that are visible outside of the scop and that therefore
5144 * cannot be declared inside the body of any possible guard.
5146 * We first compute a schedule that respects the dependences
5147 * of the original program and select the outermost bands
5148 * of tilable dimensions that have at least one parallel loop.
5149 * If the --load-schedule is specified, then the loaded schedule
5150 * is used instead of a computed schedule.
5152 * Each of these bands B is then tiled according to "tile" sizes, resulting
5153 * in two nested bands, with a kernel marker on top
5161 * We then split off at most 2 parallel dimensions from the T band and
5162 * at most 3 parallel dimension from the P band
5167 * T1
5169 * T2
5171 * P1
5173 * P2
5175 * A filter is introduced in front of T1 that maps the domain instances
5176 * to block identifiers. Similarly, a filter is introduced in front of P1
5177 * that maps the domain instances to thread identifiers.
5179 * For each iteration of the T2 band and for each array, we compute
5180 * the array elements accessed by that iteration, construct a rectangular
5181 * box around it and shift it to the origin. The result is used
5182 * as shared memory for the array.
5184 * Copying and synchronization statements are added to this schedule tree.
5185 * In principle, these are added in front of the P1 band, but some of
5186 * them may get hoisted up to higher levels.
5188 * The entire AST is then generated from the single resulting schedule tree.
5189 * During the generation the subtrees at kernel nodes (K) are saved
5190 * aside and replaced by kernel calls. The result is printed as host code
5191 * while the saved subtrees are printed as device code.
5193 static __isl_give isl_printer *generate(__isl_take isl_printer *p,
5194 struct gpu_gen *gen, struct ppcg_scop *scop,
5195 struct ppcg_options *options)
5197 struct gpu_prog *prog;
5198 isl_ctx *ctx;
5199 isl_set *context, *guard;
5200 isl_schedule *schedule;
5201 int any_permutable;
5203 if (!scop)
5204 return isl_printer_free(p);
5206 ctx = isl_printer_get_ctx(p);
5207 prog = gpu_prog_alloc(ctx, scop);
5208 if (!prog)
5209 return isl_printer_free(p);
5211 context = isl_set_copy(prog->context);
5212 guard = isl_union_set_params(isl_union_set_copy(prog->scop->domain));
5213 prog->context = isl_set_intersect(prog->context, isl_set_copy(guard));
5215 gen->prog = prog;
5216 schedule = get_schedule(gen);
5218 any_permutable = has_any_permutable_node(schedule);
5219 if (any_permutable < 0 || !any_permutable) {
5220 isl_set_free(context);
5221 isl_set_free(guard);
5222 if (any_permutable < 0)
5223 p = isl_printer_free(p);
5224 else
5225 p = print_cpu(p, scop, options);
5226 isl_schedule_free(schedule);
5227 } else {
5228 schedule = map_to_device(gen, schedule);
5229 gen->tree = generate_code(gen, schedule);
5230 p = ppcg_print_exposed_declarations(p, prog->scop);
5231 p = ppcg_print_guarded(p, guard, context, &print_gpu, gen);
5232 isl_ast_node_free(gen->tree);
5235 gpu_prog_free(prog);
5237 return p;
5240 /* Wrapper around generate for use as a ppcg_transform callback.
5242 static __isl_give isl_printer *generate_wrap(__isl_take isl_printer *p,
5243 struct ppcg_scop *scop, void *user)
5245 struct gpu_gen *gen = user;
5247 return generate(p, gen, scop, gen->options);
5250 /* Transform the code in the file called "input" by replacing
5251 * all scops by corresponding GPU code and write the results to "out".
5253 int generate_gpu(isl_ctx *ctx, const char *input, FILE *out,
5254 struct ppcg_options *options,
5255 __isl_give isl_printer *(*print)(__isl_take isl_printer *p,
5256 struct gpu_prog *prog, __isl_keep isl_ast_node *tree,
5257 struct gpu_types *types, void *user), void *user)
5259 struct gpu_gen gen;
5260 int r;
5261 int i;
5263 gen.ctx = ctx;
5264 gen.sizes = extract_sizes_from_str(ctx, options->sizes);
5265 gen.options = options;
5266 gen.kernel_id = 0;
5267 gen.print = print;
5268 gen.print_user = user;
5269 gen.types.n = 0;
5270 gen.types.name = NULL;
5272 if (options->debug->dump_sizes) {
5273 isl_space *space = isl_space_params_alloc(ctx, 0);
5274 gen.used_sizes = isl_union_map_empty(space);
5277 r = ppcg_transform(ctx, input, out, options, &generate_wrap, &gen);
5279 if (options->debug->dump_sizes) {
5280 isl_union_map_dump(gen.used_sizes);
5281 isl_union_map_free(gen.used_sizes);
5284 isl_union_map_free(gen.sizes);
5285 for (i = 0; i < gen.types.n; ++i)
5286 free(gen.types.name[i]);
5287 free(gen.types.name);
5289 return r;
5292 /* Compute the set of inner array elements that may have their values
5293 * preserved by "prog". In particular, collect the array elements of
5294 * arrays that are not local to "prog" and remove those elements that
5295 * are definitely killed or definitely written by "prog".
5297 static __isl_give isl_union_set *compute_may_persist(struct gpu_prog *prog)
5299 int i;
5300 isl_union_set *may_persist, *killed;
5301 isl_union_map *must_kill;
5303 may_persist = isl_union_set_empty(isl_set_get_space(prog->context));
5304 for (i = 0; i < prog->n_array; ++i) {
5305 isl_set *extent;
5307 if (prog->array[i].local)
5308 continue;
5310 extent = isl_set_copy(prog->array[i].extent);
5311 may_persist = isl_union_set_add_set(may_persist, extent);
5314 may_persist = isl_union_set_intersect_params(may_persist,
5315 isl_set_copy(prog->context));
5316 may_persist = isl_union_set_apply(may_persist,
5317 isl_union_map_copy(prog->to_inner));
5318 must_kill = isl_union_map_copy(prog->tagged_must_kill);
5319 killed = isl_union_map_range(must_kill);
5320 must_kill = isl_union_map_copy(prog->must_write);
5321 killed = isl_union_set_union(killed, isl_union_map_range(must_kill));
5323 may_persist = isl_union_set_subtract(may_persist, killed);
5324 return may_persist;
5327 struct gpu_prog *gpu_prog_alloc(isl_ctx *ctx, struct ppcg_scop *scop)
5329 struct gpu_prog *prog;
5330 isl_space *space;
5331 isl_map *id;
5333 if (!scop)
5334 return NULL;
5336 prog = isl_calloc_type(ctx, struct gpu_prog);
5337 assert(prog);
5339 prog->ctx = ctx;
5340 prog->scop = scop;
5341 prog->context = isl_set_copy(scop->context);
5342 prog->n_stmts = scop->pet->n_stmt;
5343 prog->any_to_outer = pet_scop_compute_outer_to_any(scop->pet);
5344 prog->any_to_outer = isl_union_map_reverse(prog->any_to_outer);
5345 space = isl_union_map_get_space(prog->any_to_outer);
5346 space = isl_space_set_from_params(space);
5347 space = isl_space_add_dims(space, isl_dim_set, 1);
5348 space = isl_space_map_from_set(space);
5349 id = isl_map_identity(space);
5350 prog->any_to_outer = isl_union_map_add_map(prog->any_to_outer, id);
5351 prog->stmts = extract_stmts(ctx, scop,
5352 prog->context, prog->any_to_outer);
5353 prog->read = isl_union_map_copy(scop->reads);
5354 prog->may_write = isl_union_map_copy(scop->may_writes);
5355 prog->must_write = isl_union_map_copy(scop->must_writes);
5356 prog->tagged_must_kill = isl_union_map_copy(scop->tagged_must_kills);
5357 prog->to_inner = pet_scop_compute_outer_to_inner(scop->pet);
5358 prog->to_outer = isl_union_map_copy(prog->to_inner);
5359 prog->to_outer = isl_union_map_reverse(prog->to_outer);
5361 if (!prog->stmts)
5362 return gpu_prog_free(prog);
5364 if (collect_array_info(prog) < 0)
5365 return gpu_prog_free(prog);
5366 prog->may_persist = compute_may_persist(prog);
5368 return prog;
5371 void *gpu_prog_free(struct gpu_prog *prog)
5373 if (!prog)
5374 return NULL;
5375 free_array_info(prog);
5376 free_stmts(prog->stmts, prog->n_stmts);
5377 isl_union_map_free(prog->any_to_outer);
5378 isl_union_map_free(prog->to_outer);
5379 isl_union_map_free(prog->to_inner);
5380 isl_union_map_free(prog->read);
5381 isl_union_map_free(prog->may_write);
5382 isl_union_map_free(prog->must_write);
5383 isl_union_map_free(prog->tagged_must_kill);
5384 isl_union_map_free(prog->array_order);
5385 isl_union_set_free(prog->may_persist);
5386 isl_set_free(prog->context);
5387 free(prog);
5388 return NULL;