2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012 Ecole Normale Superieure
5 * Use of this software is governed by the GNU LGPLv2.1 license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
17 #include <isl/polynomial.h>
18 #include <isl/union_set.h>
23 #include <isl/schedule.h>
24 #include <isl/options.h>
25 #include <isl/ast_build.h>
29 #include "ppcg_options.h"
31 /* The fields stride, shift and shift_map only contain valid information
33 * If so, they express that current index is such that if you add shift,
34 * then the result is always a multiple of stride.
35 * shift_map contains the mapping
37 * i -> (i + shift)/stride
39 * Let D represent the initial shared_len dimensions of the computed schedule.
40 * The spaces of "lb" and "shift" are of the form
44 * "shift_map" is of the form
46 * [D -> i] -> [D -> (i + shift(D))/stride]
48 struct gpu_array_bound
{
54 isl_basic_map
*shift_map
;
57 /* A tile of an array.
59 * n is the dimension of the array.
60 * bound is an array of size "n" representing the lower bound
61 * and size for each index.
63 struct gpu_array_tile
{
65 struct gpu_array_bound
*bound
;
68 struct gpu_array_info
;
70 /* A group of array references in a kernel that should be handled together.
71 * If private_tile is not NULL, then it is mapped to registers.
72 * Otherwise, if shared_tile is not NULL, it is mapped to shared memory.
73 * Otherwise, it is accessed from global memory.
75 struct gpu_array_ref_group
{
76 /* The references in this group access this array. */
77 struct gpu_array_info
*array
;
78 /* Position of this group in the list of reference groups of array. */
81 /* The following fields are use during the construction of the groups.
82 * access is the combined access relation relative to the shared
83 * memory tiling. In particular, the domain of the map corresponds
84 * to the first shared_len dimensions of the computed schedule.
85 * write is set if any access in the group is a write.
90 /* The shared memory tile, NULL if none. */
91 struct gpu_array_tile
*shared_tile
;
93 /* The private memory tile, NULL if none. */
94 struct gpu_array_tile
*private_tile
;
96 /* References in this group; point to elements of a linked list. */
98 struct gpu_stmt_access
**refs
;
100 /* Last shared memory tile dimension that affects tile of this group. */
106 struct ppcg_options
*options
;
108 struct gpu_prog
*prog
;
110 /* tile, grid and block sizes for each kernel */
111 isl_union_map
*sizes
;
113 /* Identifier of current kernel. */
115 /* Pointer to the current kernel. */
116 struct ppcg_kernel
*kernel
;
118 /* First tile dimension. */
120 /* Number of tile dimensions. */
122 /* Number of initial parallel loops among tile dimensions. */
125 /* Number of dimensions determining shared memory. */
128 /* Number of rows in the untiled schedule. */
130 /* Number of rows in the tiled schedule. */
132 /* Number of rows in schedule after tiling/wrapping over threads. */
133 int thread_tiled_len
;
135 /* Global untiled schedule. */
136 isl_union_map
*sched
;
137 /* Local (per kernel launch) tiled schedule. */
138 isl_union_map
*tiled_sched
;
139 /* Local schedule per shared memory tile loop iteration. */
140 isl_union_map
*local_sched
;
142 /* Local tiled schedule projected onto the shared tile loops and
143 * the loops that will be wrapped over the threads,
144 * with all shared tile loops parametrized.
146 isl_union_map
*shared_sched
;
147 /* Projects out the loops that will be wrapped over the threads
150 isl_union_map
*shared_proj
;
152 /* A map that takes the range of shared_sched as input,
153 * wraps the appropriate loops over the threads and then projects
156 isl_map
*privatization
;
158 /* A map from the shared memory tile loops and the thread indices
159 * (as parameters) to the set of accessed memory elements that
160 * will be accessed through private copies.
162 isl_union_map
*private_access
;
164 /* The schedule for the current private/shared access
165 * (within print_private_access or print_shared_access).
168 /* The array reference group corresponding to copy_sched. */
169 struct gpu_array_ref_group
*copy_group
;
171 /* First loop to unroll (or -1 if none) in the current part of the
178 /* Note: in the input file, the sizes of the grid and the blocks
179 * are specified in the order x, y, z, but internally, the sizes
180 * are stored in reverse order, so that the last element always
181 * refers to the x dimension.
188 /* Print the name of the local copy of a given group of array references.
190 static __isl_give isl_printer
*print_array_name(__isl_take isl_printer
*p
,
191 struct gpu_array_ref_group
*group
)
195 if (group
->private_tile
)
196 p
= isl_printer_print_str(p
, "private_");
197 else if (group
->shared_tile
)
198 p
= isl_printer_print_str(p
, "shared_");
201 p
= isl_printer_print_str(p
, group
->array
->name
);
202 if (!global
&& group
->array
->n_group
> 1) {
203 p
= isl_printer_print_str(p
, "_");
204 p
= isl_printer_print_int(p
, group
->nr
);
210 /* Collect all references to the given array and store pointers to them
213 static void collect_references(struct gpu_prog
*prog
,
214 struct gpu_array_info
*array
)
220 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
221 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
222 struct gpu_stmt_access
*access
;
224 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
226 name
= isl_map_get_tuple_name(access
->access
,
228 if (name
&& !strcmp(array
->name
, name
))
234 array
->refs
= isl_alloc_array(prog
->ctx
, struct gpu_stmt_access
*, n
);
238 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
239 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
240 struct gpu_stmt_access
*access
;
242 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
244 name
= isl_map_get_tuple_name(access
->access
,
246 if (!name
|| strcmp(array
->name
, name
))
249 array
->refs
[n
++] = access
;
254 /* Create a gpu_array_tile for an array of dimension "n_index".
256 static struct gpu_array_tile
*create_tile(isl_ctx
*ctx
, int n_index
)
259 struct gpu_array_tile
*tile
;
261 tile
= isl_calloc_type(ctx
, struct gpu_array_tile
);
266 tile
->bound
= isl_alloc_array(ctx
, struct gpu_array_bound
, n_index
);
269 for (i
= 0; i
< n_index
; ++i
) {
270 tile
->bound
[i
].size
= NULL
;
271 tile
->bound
[i
].lb
= NULL
;
272 tile
->bound
[i
].stride
= NULL
;
273 tile
->bound
[i
].shift
= NULL
;
274 tile
->bound
[i
].shift_map
= NULL
;
280 static void *free_tile(struct gpu_array_tile
*tile
)
287 for (j
= 0; j
< tile
->n
; ++j
) {
288 isl_val_free(tile
->bound
[j
].size
);
289 isl_val_free(tile
->bound
[j
].stride
);
290 isl_aff_free(tile
->bound
[j
].lb
);
291 isl_aff_free(tile
->bound
[j
].shift
);
292 isl_basic_map_free(tile
->bound
[j
].shift_map
);
300 static struct pet_array
*find_array(struct ppcg_scop
*scop
,
301 __isl_keep isl_set
*accessed
)
306 id
= isl_set_get_tuple_id(accessed
);
308 for (i
= 0; i
< scop
->n_array
; ++i
) {
311 id_i
= isl_set_get_tuple_id(scop
->arrays
[i
]->extent
);
318 return i
< scop
->n_array
? scop
->arrays
[i
] : NULL
;
321 /* Compute and return the extent of "array", taking into account the set of
324 * In particular, the extent in the outer dimension is taken
325 * from "accessed", while then extent in the remaing dimensions
326 * are taken from array->extent.
328 * The extent in the outer dimension cannot be taken from array->extent
329 * because that may be unbounded. Furthermore, even if it is bounded,
330 * it may be larger than the piece of the array that is being accessed.
332 static __isl_give isl_set
*compute_extent(struct pet_array
*array
,
333 __isl_keep isl_set
*accessed
)
340 extent
= isl_set_copy(array
->extent
);
342 n_index
= isl_set_dim(accessed
, isl_dim_set
);
346 extent
= isl_set_project_out(extent
, isl_dim_set
, 0, 1);
347 outer
= isl_set_copy(accessed
);
348 outer
= isl_set_project_out(outer
, isl_dim_set
, 1, n_index
- 1);
349 extent
= isl_set_flat_product(outer
, extent
);
350 id
= isl_set_get_tuple_id(accessed
);
351 extent
= isl_set_set_tuple_id(extent
, id
);
356 /* Compute bounds on the host arrays based on the accessed elements
357 * and collect all references to the array.
359 * If the array is zero-dimensional, i.e., a scalar, we check
360 * whether it is read-only.
362 static int extract_array_info(__isl_take isl_set
*array
, void *user
)
365 struct gpu_prog
*prog
= (struct gpu_prog
*)user
;
369 struct pet_array
*pa
;
372 n_index
= isl_set_dim(array
, isl_dim_set
);
373 name
= isl_set_get_tuple_name(array
);
374 bounds
= isl_alloc_array(isl_set_get_ctx(array
),
375 isl_pw_aff
*, n_index
);
377 prog
->array
[prog
->n_array
].dim
= isl_set_get_space(array
);
378 prog
->array
[prog
->n_array
].name
= strdup(name
);
379 prog
->array
[prog
->n_array
].n_index
= n_index
;
380 prog
->array
[prog
->n_array
].bound
= bounds
;
382 pa
= find_array(prog
->scop
, array
);
385 prog
->array
[prog
->n_array
].type
= strdup(pa
->element_type
);
386 prog
->array
[prog
->n_array
].size
= pa
->element_size
;
387 prog
->array
[prog
->n_array
].local
= pa
->declared
&& !pa
->exposed
;
391 isl_union_map
*write
;
394 write
= isl_union_map_copy(prog
->write
);
395 space
= isl_set_universe(isl_set_get_space(array
));
396 write
= isl_union_map_intersect_range(write
,
397 isl_union_set_from_set(space
));
398 empty
= isl_union_map_is_empty(write
);
399 isl_union_map_free(write
);
401 prog
->array
[prog
->n_array
].read_only
= empty
;
404 extent
= compute_extent(pa
, array
);
405 for (i
= 0; i
< n_index
; ++i
) {
411 bound
= isl_set_dim_max(isl_set_copy(extent
), i
);
413 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
414 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
415 one
= isl_aff_zero_on_domain(ls
);
416 one
= isl_aff_add_constant_si(one
, 1);
417 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
418 bound
= isl_pw_aff_gist(bound
, isl_set_copy(prog
->context
));
422 prog
->array
[prog
->n_array
].extent
= extent
;
424 collect_references(prog
, &prog
->array
[prog
->n_array
]);
432 void collect_array_info(struct gpu_prog
*prog
)
434 isl_union_set
*arrays
;
436 arrays
= isl_union_map_range(isl_union_map_copy(prog
->read
));
437 arrays
= isl_union_set_union(arrays
,
438 isl_union_map_range(isl_union_map_copy(prog
->write
)));
439 arrays
= isl_union_set_coalesce(arrays
);
441 prog
->n_array
= isl_union_set_n_set(arrays
);
442 prog
->array
= isl_alloc_array(prog
->ctx
,
443 struct gpu_array_info
, prog
->n_array
);
446 isl_union_set_foreach_set(arrays
, &extract_array_info
, prog
);
447 isl_union_set_free(arrays
);
450 static void free_array_info(struct gpu_prog
*prog
)
454 for (i
= 0; i
< prog
->n_array
; ++i
) {
455 int n_index
= prog
->array
[i
].n_index
;
456 free(prog
->array
[i
].type
);
457 free(prog
->array
[i
].name
);
458 for (j
= 0; j
< n_index
; ++j
)
459 isl_pw_aff_free(prog
->array
[i
].bound
[j
]);
460 isl_space_free(prog
->array
[i
].dim
);
461 isl_set_free(prog
->array
[i
].extent
);
462 free(prog
->array
[i
].bound
);
463 free(prog
->array
[i
].refs
);
468 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
469 * as an array or through a pointer reference, but as single data element. At
470 * the moment, scalars are represented as zero dimensional arrays.
472 int gpu_array_is_scalar(struct gpu_array_info
*array
)
474 return (array
->n_index
== 0);
477 /* Is "array" a read-only scalar?
479 int gpu_array_is_read_only_scalar(struct gpu_array_info
*array
)
481 return gpu_array_is_scalar(array
) && array
->read_only
;
484 /* Internal data structure for extract_size_of_type.
485 * "type" specifies the name of the space that we want to extract.
486 * "res" is used to store the subset of that space.
488 struct ppcg_extract_size_data
{
493 /* This function is called for each set in a union_set.
494 * If the name of the set matches data->type, we store the
497 static int extract_size_of_type(__isl_take isl_set
*size
, void *user
)
499 struct ppcg_extract_size_data
*data
= user
;
502 name
= isl_set_get_tuple_name(size
);
503 if (name
&& !strcmp(name
, data
->type
)) {
512 /* Given a union map { kernel[i] -> *[...] },
513 * return the range in the space called "type" for the kernel with
514 * sequence number "id".
516 static __isl_give isl_set
*extract_sizes(__isl_keep isl_union_map
*sizes
,
517 const char *type
, int id
)
521 isl_union_set
*local_sizes
;
522 struct ppcg_extract_size_data data
= { type
, NULL
};
527 space
= isl_union_map_get_space(sizes
);
528 space
= isl_space_set_from_params(space
);
529 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
530 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
531 dom
= isl_set_universe(space
);
532 dom
= isl_set_fix_si(dom
, isl_dim_set
, 0, id
);
534 local_sizes
= isl_union_set_apply(isl_union_set_from_set(dom
),
535 isl_union_map_copy(sizes
));
536 isl_union_set_foreach_set(local_sizes
, &extract_size_of_type
, &data
);
537 isl_union_set_free(local_sizes
);
541 /* Given a singleton set, extract the first (at most *len) elements
542 * of the single integer tuple into *sizes and update *len if needed.
544 static void read_sizes_from_set(__isl_take isl_set
*set
, int *sizes
, int *len
)
552 dim
= isl_set_dim(set
, isl_dim_set
);
556 for (i
= 0; i
< *len
; ++i
) {
559 v
= isl_set_plain_get_val_if_fixed(set
, isl_dim_set
, i
);
562 sizes
[i
] = isl_val_get_num_si(v
);
569 /* Extract user specified "tile" sizes from the "sizes" command line option,
570 * defaulting to option->tile_size in each dimension.
572 static void read_tile_sizes(struct gpu_gen
*gen
)
577 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, gen
->tile_len
);
578 assert(gen
->tile_size
);
579 for (n
= 0; n
< gen
->tile_len
; ++n
)
580 gen
->tile_size
[n
] = gen
->options
->tile_size
;
582 size
= extract_sizes(gen
->sizes
, "tile", gen
->kernel_id
);
583 read_sizes_from_set(size
, gen
->tile_size
, &gen
->tile_len
);
585 if (gen
->n_parallel
> gen
->tile_len
)
586 gen
->n_parallel
= gen
->tile_len
;
589 /* Extract user specified "block" sizes from the "sizes" command line option,
590 * after filling in some potentially useful defaults.
592 static void read_block_sizes(struct gpu_gen
*gen
)
598 gen
->n_block
= (n
<= 3) ? n
: 3;
599 switch (gen
->n_block
) {
601 gen
->block_dim
[0] = 512;
604 gen
->block_dim
[0] = 32;
605 gen
->block_dim
[1] = 16;
608 gen
->block_dim
[0] = 32;
609 gen
->block_dim
[1] = 4;
610 gen
->block_dim
[2] = 4;
614 size
= extract_sizes(gen
->sizes
, "block", gen
->kernel_id
);
615 read_sizes_from_set(size
, gen
->block_dim
, &gen
->n_block
);
618 /* Extract user specified "grid" sizes from the "sizes" command line option,
619 * after filling in some potentially useful defaults.
621 static void read_grid_sizes(struct gpu_gen
*gen
)
623 int n
= gen
->n_parallel
;
626 gen
->n_grid
= (n
<= 2) ? n
: 2;
627 switch (gen
->n_grid
) {
629 gen
->grid_dim
[0] = 32768;
632 gen
->grid_dim
[0] = 256;
633 gen
->grid_dim
[1] = 256;
637 size
= extract_sizes(gen
->sizes
, "grid", gen
->kernel_id
);
638 read_sizes_from_set(size
, gen
->grid_dim
, &gen
->n_grid
);
641 /* Extract user specified sizes from the "sizes" command line option
642 * after filling in some potentially useful defaults.
644 static void read_sizes(struct gpu_gen
*gen
)
646 read_tile_sizes(gen
);
647 read_block_sizes(gen
);
648 read_grid_sizes(gen
);
651 static void free_stmts(struct gpu_stmt
*stmts
, int n
)
655 for (i
= 0; i
< n
; ++i
) {
656 struct gpu_stmt_access
*access
, *next
;
658 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
660 isl_map_free(access
->access
);
664 isl_id_free(stmts
[i
].id
);
669 void clear_gpu_gen(struct gpu_gen
*gen
)
671 isl_union_map_free(gen
->sizes
);
672 isl_union_map_free(gen
->sched
);
675 /* Construct a map from a domain of dimensionality "len"
676 * to a domain of dimensionality "len" + "tile_len" that tiles
677 * the "tile_len" coordinates starting at "first".
678 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
679 * "dim" prescribes the parameters.
681 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
682 int first
, int tile_len
, int *tile_size
)
689 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
690 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
691 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
692 ls
= isl_local_space_from_space(dim
);
694 for (i
= 0; i
< len
- tile_len
; ++i
) {
695 int j
= i
< first
? i
: i
+ tile_len
;
696 int k
= i
< first
? i
: i
+ 2 * tile_len
;
698 c
= isl_equality_alloc(isl_local_space_copy(ls
));
699 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, j
, -1);
700 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
701 bmap
= isl_basic_map_add_constraint(bmap
, c
);
704 for (i
= 0; i
< tile_len
; ++i
) {
705 c
= isl_equality_alloc(isl_local_space_copy(ls
));
706 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
,
708 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
709 first
+ i
, tile_size
[i
]);
710 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
711 first
+ i
+ tile_len
, 1);
712 bmap
= isl_basic_map_add_constraint(bmap
, c
);
714 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
715 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
716 first
+ i
+ tile_len
, 1);
717 bmap
= isl_basic_map_add_constraint(bmap
, c
);
719 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
720 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
721 first
+ i
+ tile_len
, -1);
722 c
= isl_constraint_set_constant_si(c
, tile_size
[i
] - 1);
723 bmap
= isl_basic_map_add_constraint(bmap
, c
);
726 isl_local_space_free(ls
);
728 return isl_map_from_basic_map(bmap
);
731 /* Construct a map from a domain of dimensionality "len"
732 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
733 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
734 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
735 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
736 * that are projected out at the end.
737 * "dim" prescribes the parameters.
739 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
740 int first
, int wrap_len
, int *wrap_size
)
747 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
748 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
749 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
750 ls
= isl_local_space_from_space(dim
);
752 for (i
= 0; i
< len
; ++i
) {
753 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
755 c
= isl_equality_alloc(isl_local_space_copy(ls
));
756 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
757 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
758 bmap
= isl_basic_map_add_constraint(bmap
, c
);
761 for (i
= 0; i
< wrap_len
; ++i
) {
762 c
= isl_equality_alloc(isl_local_space_copy(ls
));
763 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
765 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
766 first
+ wrap_len
+ i
, 1);
767 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
768 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
769 bmap
= isl_basic_map_add_constraint(bmap
, c
);
771 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
772 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
773 first
+ wrap_len
+ i
, 1);
774 bmap
= isl_basic_map_add_constraint(bmap
, c
);
776 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
777 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
778 first
+ wrap_len
+ i
, -1);
779 c
= isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
780 bmap
= isl_basic_map_add_constraint(bmap
, c
);
783 isl_local_space_free(ls
);
785 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
786 first
+ 2 * wrap_len
, wrap_len
);
788 return isl_map_from_basic_map(bmap
);
791 /* Add "n" parameters named prefix%d.
793 static __isl_give isl_set
*add_params( __isl_take isl_set
*set
,
794 int n
, const char *prefix
)
800 nparam
= isl_set_dim(set
, isl_dim_param
);
801 set
= isl_set_add_dims(set
, isl_dim_param
, n
);
803 for (i
= 0; i
< n
; ++i
) {
804 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
805 set
= isl_set_set_dim_name(set
, isl_dim_param
,
812 /* Equate the "n" dimensions of "set" starting at "first" to
813 * freshly created parameters named prefix%d.
815 static __isl_give isl_set
*parametrize(__isl_take isl_set
*set
,
816 int first
, int n
, const char *prefix
)
821 nparam
= isl_set_dim(set
, isl_dim_param
);
823 set
= add_params(set
, n
, prefix
);
825 for (i
= 0; i
< n
; ++i
)
826 set
= isl_set_equate(set
, isl_dim_param
, nparam
+ i
,
827 isl_dim_set
, first
+ i
);
832 /* Given a parameter space "space", create a set of dimension "len"
833 * of which the "n" dimensions starting at "first" are equated to
834 * freshly created parameters named prefix%d.
836 static __isl_give isl_set
*parametrization(__isl_take isl_space
*space
,
837 int len
, int first
, int n
, const char *prefix
)
841 space
= isl_space_set_from_params(space
);
842 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
843 set
= isl_set_universe(space
);
845 return parametrize(set
, first
, n
, prefix
);
848 /* Tile the B loops over the tile sizes and then tile/wrap
849 * the T1 loops over the blocks.
851 static __isl_give isl_union_map
*tile_schedule(struct gpu_gen
*gen
,
852 __isl_take isl_union_map
*sched
)
855 isl_map
*tiling
, *block_tiling
;
857 dim
= isl_union_map_get_space(sched
);
858 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
859 gen
->tile_first
, gen
->tile_len
, gen
->tile_size
);
861 if (gen
->options
->wrap
)
862 block_tiling
= wrap(dim
, gen
->untiled_len
+ gen
->tile_len
,
863 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
865 block_tiling
= tile(dim
, gen
->untiled_len
+ gen
->tile_len
,
866 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
868 gen
->tiled_len
= gen
->untiled_len
+ gen
->tile_len
+ gen
->n_grid
;
870 tiling
= isl_map_apply_range(tiling
, block_tiling
);
872 sched
= isl_union_map_apply_range(sched
,
873 isl_union_map_from_map(tiling
));
875 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
880 /* Equate the "T1P" iterators in the tiled schedule "sched"
881 * to the block dimensions.
883 static __isl_give isl_union_map
*parametrize_tiled_schedule(
884 struct gpu_gen
*gen
, __isl_take isl_union_map
*sched
)
889 dim
= isl_union_map_get_space(sched
);
890 par
= parametrization(dim
, gen
->tiled_len
,
891 gen
->tile_first
+ gen
->n_grid
, gen
->n_grid
, "b");
892 sched
= isl_union_map_intersect_range(sched
,
893 isl_union_set_from_set(par
));
898 /* Tile/wrap the P1 loops over the threads.
900 static __isl_give isl_union_map
*thread_tile_schedule(struct gpu_gen
*gen
,
901 __isl_take isl_union_map
*sched
)
907 dim
= isl_union_map_get_space(sched
);
909 if (gen
->options
->wrap
)
910 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
911 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
913 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
914 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
915 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
917 sched
= isl_union_map_apply_range(sched
,
918 isl_union_map_from_map(tiling
));
920 par
= parametrization(dim
, gen
->thread_tiled_len
,
921 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
923 sched
= isl_union_map_intersect_range(sched
,
924 isl_union_set_from_set(par
));
926 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
931 /* If the user asked for it, scale the shared memory tile loops
932 * (T1T and T2) of "sched" by gen->tile_size[i].
933 * If we are not performing "wrapping", then additionally scale the T1P
934 * loops by gen->grid_dim[i].
936 static __isl_give isl_union_map
*scale_tile_loops(struct gpu_gen
*gen
,
937 __isl_take isl_union_map
*sched
)
941 isl_basic_map
*scale
;
945 if (!gen
->options
->scale_tile_loops
)
948 dim
= isl_union_map_get_space(sched
);
949 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
950 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
951 scale
= isl_basic_map_universe(isl_space_copy(dim
));
952 ls
= isl_local_space_from_space(dim
);
954 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
957 if (i
>= gen
->tile_first
&& i
< gen
->tile_first
+ gen
->n_grid
) {
958 f
= gen
->tile_size
[i
- gen
->tile_first
];
959 if (!gen
->options
->wrap
)
960 f
*= gen
->grid_dim
[i
- gen
->tile_first
];
961 } else if (i
>= gen
->tile_first
+ gen
->n_grid
&&
962 i
< gen
->tile_first
+ gen
->n_grid
+ gen
->tile_len
) {
963 f
= gen
->tile_size
[i
- (gen
->tile_first
+ gen
->n_grid
)];
966 c
= isl_equality_alloc(isl_local_space_copy(ls
));
967 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
968 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
969 scale
= isl_basic_map_add_constraint(scale
, c
);
972 isl_local_space_free(ls
);
974 sched
= isl_union_map_apply_range(sched
,
975 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
980 /* If we are not performing "wrapping" and if the user asked for it,
981 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
983 static __isl_give isl_union_map
*scale_thread_tile_loops(struct gpu_gen
*gen
,
984 __isl_take isl_union_map
*sched
)
988 isl_basic_map
*scale
;
992 if (gen
->options
->wrap
)
994 if (!gen
->options
->scale_tile_loops
)
997 dim
= isl_union_map_get_space(sched
);
998 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
999 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
1000 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1001 ls
= isl_local_space_from_space(dim
);
1003 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
1006 if (i
>= gen
->shared_len
&&
1007 i
< gen
->shared_len
+ gen
->n_block
)
1008 f
= gen
->block_dim
[i
- gen
->shared_len
];
1010 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1011 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1012 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1013 scale
= isl_basic_map_add_constraint(scale
, c
);
1016 isl_local_space_free(ls
);
1018 sched
= isl_union_map_apply_range(sched
,
1019 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1024 /* If we are not performing "wrapping" and if the user asked for it,
1025 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
1027 static __isl_give isl_union_map
*scale_access_tile_loops(struct gpu_gen
*gen
,
1028 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
1032 isl_basic_map
*scale
;
1034 isl_local_space
*ls
;
1036 if (gen
->options
->wrap
)
1038 if (!gen
->options
->scale_tile_loops
)
1041 dim
= isl_union_map_get_space(sched
);
1042 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1043 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1044 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1045 ls
= isl_local_space_from_space(dim
);
1047 for (i
= 0; i
< len
; ++i
) {
1050 if (i
>= first
&& i
< first
+ n_tile
)
1051 f
= gen
->kernel
->block_dim
[i
- first
];
1053 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1054 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1055 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1056 scale
= isl_basic_map_add_constraint(scale
, c
);
1059 isl_local_space_free(ls
);
1061 sched
= isl_union_map_apply_range(sched
,
1062 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1067 /* Add "len" parameters p[i] called prefix%d,
1068 * with bounds to 0 <= p[i] < size[i].
1070 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1071 int len
, int *size
, const char *prefix
)
1076 isl_basic_set
*bset
;
1078 isl_local_space
*ls
;
1081 nparam
= isl_set_dim(set
, isl_dim_param
);
1082 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1084 for (i
= 0; i
< len
; ++i
) {
1085 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1086 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1090 dim
= isl_set_get_space(set
);
1091 bset
= isl_basic_set_universe(isl_space_copy(dim
));
1092 ls
= isl_local_space_from_space(dim
);
1094 for (i
= 0; i
< len
; ++i
) {
1095 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1096 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1098 bset
= isl_basic_set_add_constraint(bset
, c
);
1100 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1101 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1103 c
= isl_constraint_set_constant_si(c
, size
[i
] - 1);
1104 bset
= isl_basic_set_add_constraint(bset
, c
);
1107 isl_local_space_free(ls
);
1109 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
1112 /* Add "len" parameters p[i] called prefix%d,
1113 * with bounds to 0 <= p[i] < size[i].
1115 static __isl_give isl_set
*add_bounded_parameters_dynamic(
1116 __isl_take isl_set
*set
, __isl_keep isl_multi_pw_aff
*size
,
1122 isl_local_space
*ls
;
1125 len
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
1126 nparam
= isl_set_dim(set
, isl_dim_param
);
1127 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1129 for (i
= 0; i
< len
; ++i
) {
1130 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1131 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1135 space
= isl_space_params(isl_set_get_space(set
));
1136 ls
= isl_local_space_from_space(space
);
1137 for (i
= 0; i
< len
; ++i
) {
1138 isl_pw_aff
*param
, *size_i
, *zero
;
1141 param
= isl_pw_aff_var_on_domain(isl_local_space_copy(ls
),
1142 isl_dim_param
, nparam
+ i
);
1144 size_i
= isl_multi_pw_aff_get_pw_aff(size
, i
);
1145 bound
= isl_pw_aff_lt_set(isl_pw_aff_copy(param
), size_i
);
1146 set
= isl_set_intersect_params(set
, bound
);
1148 zero
= isl_pw_aff_zero_on_domain(isl_local_space_copy(ls
));
1149 bound
= isl_pw_aff_ge_set(param
, zero
);
1150 set
= isl_set_intersect_params(set
, bound
);
1152 isl_local_space_free(ls
);
1157 /* Given a mapping "sched" of the form
1159 * [D -> A] -> [D -> T(A)]
1161 * apply the mapping encoded in tile->bound[i].shift_map
1162 * to the range of "sched".
1163 * The mappings in tile->bound[i].shift_map are of the form
1165 * [D -> a] -> [D -> s(D,a)]
1167 * We first compose them with a mapping
1171 * (If tile->bound[i].shift_map is not set, then it is assumed to be
1172 * an identity mapping and then we use this second mapping instead.)
1175 * [D -> a] -> s(D,a)
1177 * We precompose them with a projection on the i th dimension to obtain
1179 * [D -> T] -> s(D,T)
1181 * and collect these into
1183 * [D -> T] -> S(D,T)
1185 * Introducing D in the range yields
1187 * [D -> T] -> [D -> S(D,T)]
1189 * and application to "sched" yields
1191 * [D -> A] -> [D -> S(D,T(A))]
1193 static __isl_give isl_map
*pre_shift(__isl_take isl_map
*sched
,
1194 struct gpu_array_tile
*tile
)
1197 isl_ctx
*ctx
= isl_map_get_ctx(sched
);
1198 isl_space
*space
, *space2
;
1200 isl_map
*map
, *id
, *pre_shift
;
1202 space
= isl_space_range(isl_map_get_space(sched
));
1203 space2
= isl_space_from_domain(isl_space_copy(space
));
1204 pre_shift
= isl_map_universe(space2
);
1205 space
= isl_space_domain(isl_space_unwrap(space
));
1206 id
= isl_map_identity(isl_space_map_from_set(isl_space_copy(space
)));
1207 space
= isl_space_from_domain(space
);
1208 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
1209 def
= isl_basic_map_range_map(isl_basic_map_universe(space
));
1211 for (i
= 0; i
< tile
->n
; ++i
) {
1212 isl_basic_map
*bmap
, *drop
;
1215 space
= isl_space_alloc(ctx
, 0, tile
->n
, tile
->n
);
1216 proj
= isl_map_identity(space
);
1217 proj
= isl_map_project_out(proj
, isl_dim_out
,
1218 i
+ 1, tile
->n
- (i
+ 1));
1219 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, i
);
1220 proj
= isl_map_product(isl_map_copy(id
), proj
);
1222 if (!tile
->bound
[i
].shift_map
)
1223 bmap
= isl_basic_map_copy(def
);
1225 bmap
= isl_basic_map_copy(tile
->bound
[i
].shift_map
);
1226 bmap
= isl_basic_map_apply_range(bmap
,
1227 isl_basic_map_copy(def
));
1230 map
= isl_map_from_basic_map(bmap
);
1231 map
= isl_map_apply_range(proj
, map
);
1232 pre_shift
= isl_map_flat_range_product(pre_shift
, map
);
1236 isl_basic_map_free(def
);
1238 space
= isl_space_domain(isl_map_get_space(pre_shift
));
1239 map
= isl_map_domain_map(isl_map_universe(isl_space_unwrap(space
)));
1240 pre_shift
= isl_map_range_product(map
, pre_shift
);
1242 sched
= isl_map_apply_range(sched
, pre_shift
);
1247 /* Given an access relation to a tile of an array, construct a map that
1248 * maps each element in the space of the access relation
1249 * to a copy of the tile shifted to the origin
1250 * (based on the lower bounds in group->private_tile or group->shared_tile).
1251 * If any of the indices is strided, then
1252 * {private,shared}_tile->bound[i].shift_map is applied to the index first.
1253 * The domain space of the resulting map is that of access "access",
1254 * while the range space is anonymous.
1255 * The resulting map only encodes the mapping to the shift tile and
1256 * not the constraints of "access".
1258 * Let the space of the access relation be
1262 * We first construct an identity relation on a wrapped copy of this space,
1263 * except that it strips off the name of array
1265 * [D -> A] -> [D -> T(A)] (1)
1267 * The bounds in tile->bound[i].lb are of the form
1271 * We collect them into
1275 * and then transform them into
1277 * [D -> T] -> T - B(D) (2)
1279 * Combining those two mappings (1) and (2) yields
1281 * [D -> A] -> T(A) - B(D)
1283 * If there are any strides, then (1) is first transformed into (1')
1285 * [D -> A] -> [D -> T'(A)] (1')
1287 * by a call to pre_shift.
1289 static __isl_give isl_map
*shift_access(__isl_take isl_map
*access
,
1290 struct gpu_array_ref_group
*group
)
1298 struct gpu_array_tile
*tile
;
1299 int n_index
= group
->array
->n_index
;
1301 tile
= group
->private_tile
;
1303 tile
= group
->shared_tile
;
1305 space
= isl_space_domain(isl_map_get_space(access
));
1306 space
= isl_space_map_from_set(space
);
1307 id1
= isl_map_identity(space
);
1308 space
= isl_space_range(isl_map_get_space(access
));
1309 space
= isl_space_map_from_set(space
);
1310 space
= isl_space_set_tuple_name(space
, isl_dim_out
, NULL
);
1311 id2
= isl_map_identity(space
);
1312 sched
= isl_map_product(id1
, id2
);
1314 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(sched
)));
1315 space
= isl_space_from_domain(isl_space_domain(space
));
1316 shift
= isl_map_universe(space
);
1317 for (i
= 0; i
< n_index
; ++i
) {
1318 map
= isl_map_from_aff(isl_aff_copy(tile
->bound
[i
].lb
));
1319 shift
= isl_map_flat_range_product(shift
, map
);
1322 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(sched
)));
1323 map
= isl_map_universe(space
);
1324 id1
= isl_map_range_map(isl_map_copy(map
));
1325 map
= isl_map_domain_map(map
);
1326 shift
= isl_map_neg(shift
);
1327 shift
= isl_map_apply_range(map
, shift
);
1328 shift
= isl_map_sum(id1
, shift
);
1330 for (i
= 0; i
< n_index
; ++i
)
1331 if (tile
->bound
[i
].shift_map
)
1335 sched
= pre_shift(sched
, tile
);
1337 sched
= isl_map_apply_range(sched
, shift
);
1339 isl_map_free(access
);
1344 /* Does "map" have an obviously fixed value at variable "pos" of "type"?
1346 static int map_plain_is_fixed(isl_map
*map
, enum isl_dim_type type
,
1352 v
= isl_map_plain_get_val_if_fixed(map
, type
, pos
);
1355 fixed
= isl_val_is_int(v
);
1361 /* Given a schedule that iterates over all elements in a piece of an array,
1362 * perform tiling/wrapping over the threads.
1364 * In particular, we tile the final iterators so that the final thread
1365 * dimension runs over the final array dimension.
1366 * However, if those final iterators have only a single iteration,
1367 * we try to tile earlier iterators instead.
1369 static __isl_give isl_map
*tile_access_schedule(struct gpu_gen
*gen
,
1370 __isl_take isl_map
*sched
)
1373 isl_union_map
*usched
;
1376 unsigned nvar
= isl_map_dim(sched
, isl_dim_out
);
1380 n_tile
= gen
->kernel
->n_block
;
1381 if (n_tile
> nvar
) {
1383 sched
= isl_map_insert_dims(sched
,
1384 isl_dim_out
, 0, n_tile
- nvar
);
1385 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1386 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1390 first
= nvar
- n_tile
;
1392 for (; first
> 0; first
--)
1393 if (!map_plain_is_fixed(sched
, isl_dim_out
, first
+ n_tile
- 1))
1396 dim
= isl_map_get_space(sched
);
1397 dim
= isl_space_params(dim
);
1398 if (gen
->options
->wrap
)
1399 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1400 n_tile
, gen
->kernel
->block_dim
);
1402 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1403 n_tile
, gen
->kernel
->block_dim
);
1404 sched
= isl_map_apply_range(sched
, tiling
);
1406 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
, n_tile
, "t");
1407 sched
= isl_map_intersect_range(sched
, par
);
1409 usched
= isl_union_map_from_map(sched
);
1410 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1412 sched
= isl_map_from_union_map(usched
);
1417 /* Given an index expression "pa" into a tile of an array, adjust the expression
1418 * to a shift of the tile to the origin
1419 * (based on the lower bounds in "bound".
1420 * If the index is strided, then we first add
1421 * bound->shift and divide by bound->stride.
1422 * In the end, we compute the gist with respect to "domain".
1424 * All of the input expression "pa", the set "domain" and
1425 * the output are expressed in terms of the AST schedule domain.
1426 * The expressions in "bound" are expressed
1427 * in terms of the first shared_len dimensions of the schedule computed by PPCG.
1428 * The mapping "sched2shared" maps the former domain to the latter domain.
1430 static __isl_give isl_pw_aff
*shift_index(__isl_take isl_pw_aff
*pa
,
1431 struct gpu_array_info
*array
,
1432 struct gpu_array_bound
*bound
, __isl_take isl_set
*domain
,
1433 __isl_take isl_map
*sched2shared
)
1437 isl_pw_multi_aff
*pma
;
1440 map
= isl_map_from_aff(isl_aff_copy(bound
->shift
));
1441 map
= isl_map_apply_range(isl_map_copy(sched2shared
), map
);
1442 pma
= isl_pw_multi_aff_from_map(map
);
1443 tmp
= isl_pw_multi_aff_get_pw_aff(pma
, 0);
1444 isl_pw_multi_aff_free(pma
);
1445 pa
= isl_pw_aff_add(pa
, tmp
);
1446 pa
= isl_pw_aff_scale_down_val(pa
, isl_val_copy(bound
->stride
));
1450 map
= isl_map_from_aff(isl_aff_copy(bound
->lb
));
1451 map
= isl_map_apply_range(sched2shared
, map
);
1452 pma
= isl_pw_multi_aff_from_map(map
);
1453 tmp
= isl_pw_multi_aff_get_pw_aff(pma
, 0);
1454 isl_pw_multi_aff_free(pma
);
1455 pa
= isl_pw_aff_sub(pa
, tmp
);
1456 pa
= isl_pw_aff_coalesce(pa
);
1457 pa
= isl_pw_aff_gist(pa
, domain
);
1462 /* Return the union of all read (read = 1) and/or write (write = 1)
1463 * access relations in the group.
1465 static __isl_give isl_union_map
*group_access_relation(
1466 struct gpu_array_ref_group
*group
, int read
, int write
)
1469 isl_union_map
*access
;
1471 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1472 for (i
= 0; i
< group
->n_ref
; ++i
) {
1475 if (!((read
&& group
->refs
[i
]->read
) ||
1476 (write
&& group
->refs
[i
]->write
)))
1478 map_i
= isl_map_copy(group
->refs
[i
]->access
);
1479 access
= isl_union_map_union(access
,
1480 isl_union_map_from_map(map_i
));
1486 /* Return a map from the first shared_len dimensions of the computed
1487 * schedule to the values of the given index "i"
1488 * of the elements in the array tile in global memory that corresponds
1489 * to the shared memory copy.
1490 * In particular, if a is the index, then the range of the map
1494 * is constrained as follows
1496 * tile_offset(D) <= a <= tile_offset(D) + tile_size - 1 (1)
1500 * 0 <= a <= array_size - 1 (2)
1503 * Note that if some stride has been detected (i.e., when
1504 * group->shared_tile->bound[i].shift is set), then offset and size (i.e.,
1505 * constraints (1)) apply to the shifted and scaled down copy of the tile.
1506 * These constraints therefore have to be mapped back to the original
1507 * array space using the inverse of the shift_map.
1509 static __isl_give isl_map
*group_tile_dim(struct gpu_array_ref_group
*group
,
1514 isl_map
*map
, *tile
, *gt
;
1517 map
= isl_map_from_aff(isl_aff_copy(group
->shared_tile
->bound
[i
].lb
));
1518 space
= isl_space_range(isl_map_get_space(map
));
1519 map
= isl_map_apply_range(map
, isl_map_lex_le(isl_space_copy(space
)));
1522 aff
= isl_aff_copy(group
->shared_tile
->bound
[i
].lb
);
1523 aff
= isl_aff_add_constant_val(aff
,
1524 isl_val_copy(group
->shared_tile
->bound
[i
].size
));
1525 map
= isl_map_from_aff(aff
);
1526 gt
= isl_map_lex_gt(space
);
1527 map
= isl_map_apply_range(map
, isl_map_copy(gt
));
1528 tile
= isl_map_intersect(tile
, map
);
1530 if (group
->shared_tile
->bound
[i
].shift
) {
1531 isl_basic_map
*shift
;
1532 shift
= isl_basic_map_copy(group
->shared_tile
->bound
[i
].shift_map
);
1533 shift
= isl_basic_map_reverse(shift
);
1534 tile
= isl_set_unwrap(isl_set_apply(isl_map_wrap(tile
),
1535 isl_map_from_basic_map(shift
)));
1538 tile
= isl_map_lower_bound_si(tile
, isl_dim_out
, 0, 0);
1540 bound
= isl_set_from_pw_aff(isl_pw_aff_copy(group
->array
->bound
[i
]));
1541 bound
= isl_set_apply(bound
, gt
);
1542 tile
= isl_map_intersect_range(tile
, bound
);
1547 /* Return a map from the first shared_len dimensions of the computed
1548 * schedule to the array tile in
1549 * global memory that corresponds to the shared memory copy.
1551 static __isl_give isl_map
*group_tile(struct gpu_array_ref_group
*group
)
1554 int n_index
= group
->array
->n_index
;
1557 tile
= group_tile_dim(group
, 0);
1558 for (i
= 1; i
< n_index
; ++i
) {
1561 tile_i
= group_tile_dim(group
, i
);
1562 tile
= isl_map_flat_range_product(tile
, tile_i
);
1565 tile
= isl_map_set_tuple_name(tile
, isl_dim_out
, group
->array
->name
);
1570 /* Given a mapping "sched" from the AST schedule to a domain,
1571 * return the corresponding mapping from the AST schedule to
1572 * to the first shared_len dimensions of the schedule computed by PPCG.
1574 static __isl_give isl_map
*compute_sched_to_shared(struct gpu_gen
*gen
,
1575 __isl_take isl_map
*sched
)
1577 isl_union_map
*umap
;
1581 space
= isl_space_range(isl_map_get_space(sched
));
1582 space
= isl_space_from_domain(space
);
1583 space
= isl_space_add_dims(space
, isl_dim_out
, gen
->shared_len
);
1585 umap
= isl_union_map_copy(gen
->shared_sched
);
1586 umap
= isl_union_map_apply_range(umap
,
1587 isl_union_map_copy(gen
->shared_proj
));
1588 map
= isl_union_map_extract_map(umap
, space
);
1589 isl_union_map_free(umap
);
1591 sched
= isl_map_apply_range(sched
, map
);
1592 sched
= isl_map_detect_equalities(sched
);
1597 /* Set unroll[j] if the input dimension j is involved in
1598 * the index expression represented by ma.
1600 static int check_unroll(__isl_take isl_set
*set
, __isl_take isl_multi_aff
*ma
,
1604 int n_in
= isl_multi_aff_dim(ma
, isl_dim_in
);
1605 int n_out
= isl_multi_aff_dim(ma
, isl_dim_out
);
1608 for (i
= 0; i
< n_out
; ++i
) {
1611 aff
= isl_multi_aff_get_aff(ma
, i
);
1612 for (j
= 0; j
< n_in
; ++j
)
1613 if (isl_aff_involves_dims(aff
, isl_dim_in
, j
, 1))
1619 isl_multi_aff_free(ma
);
1623 /* Given an array pos mapping input dimensions to the corresponding
1624 * output dimension, construct the corresponding map.
1626 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
1631 isl_basic_map
*bmap
;
1632 isl_local_space
*ls
;
1634 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1635 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1636 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1637 ls
= isl_local_space_from_space(dim
);
1639 for (i
= 0; i
< len
; ++i
) {
1640 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1641 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
,
1643 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
],
1645 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1647 isl_local_space_free(ls
);
1649 return isl_map_from_basic_map(bmap
);
1652 /* Find all loops involved in any of the index expressions for any of
1653 * the private accesses, move them innermost and then mark them as
1654 * requiring unrolling by setting gen->first_unroll.
1655 * The loops involved should all be parallel because of the checks
1656 * we performed in check_private_group_access. Moving them innermost
1657 * is therefore a valid transformation.
1659 * Loops up to gen->shared_len are generated before the mapping to
1660 * threads is applied. They should therefore be ignored.
1662 * We compute the hidden equalities of the schedule first
1663 * since we will need them in our calls to isl_pw_multi_aff_from_map
1664 * and because we want to make sure that the same equalities
1665 * are also available to the code generator.
1667 static __isl_give isl_union_map
*interchange_for_unroll(struct gpu_gen
*gen
,
1668 __isl_take isl_union_map
*sched
)
1671 int unroll
[gen
->thread_tiled_len
];
1672 int perm
[gen
->thread_tiled_len
];
1675 int len
= gen
->shared_len
+ gen
->n_parallel
+ gen
->n_block
;
1677 gen
->first_unroll
= -1;
1679 sched
= isl_union_map_detect_equalities(sched
);
1680 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1682 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1683 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1685 for (j
= 0; j
< array
->n_group
; ++j
) {
1686 isl_union_map
*access
;
1688 isl_pw_multi_aff
*pma
;
1690 if (!array
->groups
[j
]->private_tile
)
1693 access
= group_access_relation(array
->groups
[j
], 1, 1);
1694 access
= isl_union_map_apply_domain(access
,
1695 isl_union_map_copy(sched
));
1697 acc
= isl_map_from_union_map(access
);
1698 pma
= isl_pw_multi_aff_from_map(acc
);
1699 isl_pw_multi_aff_foreach_piece(pma
,
1700 &check_unroll
, unroll
);
1702 isl_pw_multi_aff_free(pma
);
1706 for (i
= gen
->shared_len
; i
< len
; ++i
)
1713 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
1718 for (i
= 0; i
< gen
->shared_len
; ++i
)
1720 for (i
= gen
->shared_len
; i
< gen
->thread_tiled_len
; ++i
)
1723 gen
->first_unroll
= j
- gen
->shared_len
;
1724 for (i
= gen
->shared_len
; i
< len
; ++i
)
1728 dim
= isl_union_map_get_space(sched
);
1729 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
1730 sched
= isl_union_map_apply_range(sched
,
1731 isl_union_map_from_map(permute
));
1736 /* Given a constraint
1738 * a(p,i) + j = g f(e)
1740 * or -a(p,i) - j = g f(e) if sign < 0,
1741 * store a(p,i) in bound->shift and g (stride) in bound->stride.
1742 * a(p,i) is assumed to be an expression in only the parameters
1743 * and the input dimensions.
1745 static void extract_stride(__isl_keep isl_constraint
*c
,
1746 struct gpu_array_bound
*bound
, __isl_keep isl_val
*stride
, int sign
)
1755 isl_val_free(bound
->stride
);
1756 bound
->stride
= isl_val_copy(stride
);
1758 space
= isl_constraint_get_space(c
);
1759 space
= isl_space_domain(space
);
1761 nparam
= isl_space_dim(space
, isl_dim_param
);
1762 nvar
= isl_space_dim(space
, isl_dim_set
);
1764 v
= isl_constraint_get_constant_val(c
);
1767 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1768 aff
= isl_aff_set_constant_val(aff
, v
);
1770 for (i
= 0; i
< nparam
; ++i
) {
1771 if (!isl_constraint_involves_dims(c
, isl_dim_param
, i
, 1))
1773 v
= isl_constraint_get_coefficient_val(c
, isl_dim_param
, i
);
1776 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_param
, i
, v
);
1779 for (i
= 0; i
< nvar
; ++i
) {
1780 if (!isl_constraint_involves_dims(c
, isl_dim_in
, i
, 1))
1782 v
= isl_constraint_get_coefficient_val(c
, isl_dim_in
, i
);
1785 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_in
, i
, v
);
1791 /* Given an equality constraint of a map with a single output dimension j,
1792 * check if the constraint is of the form
1794 * a(p,i) + j = g f(e)
1796 * with a(p,i) an expression in the parameters and input dimensions
1797 * and f(e) an expression in the existentially quantified variables.
1798 * If so, and if g is larger than any such g from a previously considered
1799 * constraint, then call extract_stride to record the stride information
1802 static int check_stride_constraint(__isl_take isl_constraint
*c
, void *user
)
1808 struct gpu_array_bound
*bound
= user
;
1810 ctx
= isl_constraint_get_ctx(c
);
1811 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1812 v
= isl_constraint_get_coefficient_val(c
, isl_dim_out
, 0);
1814 if (n_div
&& (isl_val_is_one(v
) || isl_val_is_negone(v
))) {
1815 int s
= isl_val_sgn(v
);
1816 isl_val
*stride
= isl_val_zero(ctx
);
1819 for (i
= 0; i
< n_div
; ++i
) {
1820 v
= isl_constraint_get_coefficient_val(c
,
1822 stride
= isl_val_gcd(stride
, v
);
1824 if (!isl_val_is_zero(stride
) &&
1825 isl_val_gt(stride
, bound
->stride
))
1826 extract_stride(c
, bound
, stride
, s
);
1828 isl_val_free(stride
);
1832 isl_constraint_free(c
);
1836 /* Given contraints on an array index i, check if we can find
1837 * a shift a(p) and a stride g such that
1839 * a(p) + i = 0 mod g
1841 * If so, record the information in bound and apply the mapping
1842 * i -> (i + a(p))/g to the array index in bounds and return
1843 * the new constraints.
1844 * If not, simply return the original constraints.
1846 * If bounds is a subset of the space
1850 * then the bound recorded in bound->shift is of the form
1854 * with s(D) equal to a(p) above.
1855 * The mapping recorded in bound->shift_map is of the form
1857 * [D -> i] -> [D -> (i + S(D))/g]
1859 * This mapping is computed as follows.
1860 * We first introduce "i" in the domain through precomposition
1861 * with [D -> i] -> D obtaining
1865 * Adding [D -> i] -> i produces
1867 * [D -> i] -> i + s(D)
1869 * and the domain product with [D -> i] -> D yields
1871 * [D -> i] -> [D -> i + s(D)]
1873 * Composition with [D -> i] -> [D -> i/g] gives the desired result.
1875 static __isl_give isl_basic_map
*check_stride(struct gpu_array_bound
*bound
,
1876 __isl_take isl_basic_map
*bounds
)
1879 isl_basic_map
*hull
;
1880 isl_basic_map
*shift
, *id
, *bmap
, *scale
;
1881 isl_basic_set
*bset
;
1884 bound
->stride
= NULL
;
1886 hull
= isl_basic_map_affine_hull(isl_basic_map_copy(bounds
));
1888 isl_basic_map_foreach_constraint(hull
, &check_stride_constraint
, bound
);
1890 isl_basic_map_free(hull
);
1895 shift
= isl_basic_map_from_aff(isl_aff_copy(bound
->shift
));
1896 space
= isl_basic_map_get_space(bounds
);
1897 bmap
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1898 shift
= isl_basic_map_apply_range(bmap
, shift
);
1899 space
= isl_basic_map_get_space(bounds
);
1900 id
= isl_basic_map_range_map(isl_basic_map_universe(space
));
1901 shift
= isl_basic_map_sum(id
, shift
);
1902 space
= isl_basic_map_get_space(bounds
);
1903 id
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1904 shift
= isl_basic_map_range_product(id
, shift
);
1906 space
= isl_space_domain(isl_basic_map_get_space(bounds
));
1907 id
= isl_basic_map_identity(isl_space_map_from_set(space
));
1908 space
= isl_space_range(isl_basic_map_get_space(bounds
));
1909 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1910 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, 0, 1);
1911 aff
= isl_aff_scale_down_val(aff
, isl_val_copy(bound
->stride
));
1912 scale
= isl_basic_map_from_aff(aff
);
1913 scale
= isl_basic_map_product(id
, scale
);
1915 bound
->shift_map
= isl_basic_map_apply_range(shift
, scale
);
1916 bmap
= isl_basic_map_copy(bound
->shift_map
);
1917 bset
= isl_basic_set_apply(isl_basic_map_wrap(bounds
), bmap
);
1918 bounds
= isl_basic_set_unwrap(bset
);
1923 /* Data used in compute_array_dim_size and compute_size_in_direction.
1925 * pos is the position of the variable representing the array index,
1926 * i.e., the variable for which want to compute the size. This variable
1927 * is also the last variable in the set.
1929 struct gpu_size_info
{
1930 isl_basic_set
*bset
;
1931 struct gpu_array_bound
*bound
;
1935 /* Given a constraint from the basic set describing the bounds on
1936 * an array index, check if it is a lower bound, say m i >= b(x), and,
1937 * if so, check whether the expression "i - ceil(b(x)/m) + 1" has a constant
1938 * upper bound. If so, and if this bound is smaller than any bound
1939 * derived from earlier constraints, set the size to this bound on
1940 * the expression and the lower bound to ceil(b(x)/m).
1942 static int compute_size_in_direction(__isl_take isl_constraint
*c
, void *user
)
1944 struct gpu_size_info
*size
= user
;
1951 nparam
= isl_basic_set_dim(size
->bset
, isl_dim_param
);
1952 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1954 if (isl_constraint_involves_dims(c
, isl_dim_div
, 0, n_div
) ||
1955 !isl_constraint_is_lower_bound(c
, isl_dim_set
, size
->pos
)) {
1956 isl_constraint_free(c
);
1960 aff
= isl_constraint_get_bound(c
, isl_dim_set
, size
->pos
);
1961 aff
= isl_aff_ceil(aff
);
1963 lb
= isl_aff_copy(aff
);
1965 aff
= isl_aff_neg(aff
);
1966 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, size
->pos
, 1);
1968 v
= isl_basic_set_max_val(size
->bset
, aff
);
1971 if (isl_val_is_int(v
)) {
1972 v
= isl_val_add_ui(v
, 1);
1973 if (!size
->bound
->size
|| isl_val_lt(v
, size
->bound
->size
)) {
1974 isl_val_free(size
->bound
->size
);
1975 size
->bound
->size
= isl_val_copy(v
);
1976 lb
= isl_aff_drop_dims(lb
, isl_dim_in
, size
->pos
, 1);
1977 isl_aff_free(size
->bound
->lb
);
1978 size
->bound
->lb
= isl_aff_copy(lb
);
1984 isl_constraint_free(c
);
1989 /* Given a basic map "bounds" that maps parameters and input dimensions
1990 * to a single output dimension, look for an expression in the parameters
1991 * and input dimensions such that the range of the output dimension shifted
1992 * by this expression is a constant.
1994 * In particular, we currently only consider lower bounds on the output
1995 * dimension as candidate expressions.
1997 static int compute_array_dim_size(struct gpu_array_bound
*bound
,
1998 __isl_take isl_basic_map
*bounds
)
2000 struct gpu_size_info size
;
2002 bounds
= isl_basic_map_detect_equalities(bounds
);
2003 bounds
= check_stride(bound
, bounds
);
2009 size
.pos
= isl_basic_map_dim(bounds
, isl_dim_in
);
2010 size
.bset
= isl_basic_map_wrap(bounds
);
2011 size
.bset
= isl_basic_set_flatten(size
.bset
);
2012 size
.bset
= isl_set_simple_hull(isl_basic_set_compute_divs(size
.bset
));
2013 isl_basic_set_foreach_constraint(size
.bset
, &compute_size_in_direction
,
2015 isl_basic_set_free(size
.bset
);
2017 return bound
->size
? 0 : -1;
2020 /* Check if we can find a memory tile for the given array
2021 * based on the given accesses, and if so, put the results in "tile".
2023 * We project the accesses on each index in turn and look for a parametric
2024 * offset such that the size is constant.
2026 static int can_tile(__isl_keep isl_map
*access
, struct gpu_array_tile
*tile
)
2030 for (i
= 0; i
< tile
->n
; ++i
) {
2032 isl_basic_map
*hull
;
2034 access_i
= isl_map_copy(access
);
2035 access_i
= isl_map_project_out(access_i
, isl_dim_out
, 0, i
);
2036 access_i
= isl_map_project_out(access_i
, isl_dim_out
,
2037 1, tile
->n
- (i
+ 1));
2038 access_i
= isl_map_compute_divs(access_i
);
2039 hull
= isl_map_simple_hull(access_i
);
2040 if (compute_array_dim_size(&tile
->bound
[i
], hull
) < 0)
2047 /* Construct a map with input the shared tile loops and the loops that
2048 * will be wrapped around the threads that relates these later loops
2049 * to the thread indices and then projects them out.
2051 static __isl_give isl_map
*compute_privatization(struct gpu_gen
*gen
)
2059 dim
= isl_union_map_get_space(gen
->shared_sched
);
2061 if (gen
->options
->wrap
)
2062 tiling
= wrap(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2063 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2065 tiling
= tile(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2066 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2070 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2071 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
2074 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
2075 priv
= isl_map_intersect_range(priv
, par
);
2077 dim
= isl_map_get_space(priv
);
2078 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
2079 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
2080 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2083 priv
= isl_map_apply_range(priv
, proj
);
2088 /* Construct a map from domain_dim to domain_dim that increments
2089 * the dimension at position "pos" and leaves all other dimensions
2092 static __isl_give isl_map
*next(__isl_take isl_space
*domain_dim
, int pos
)
2095 int len
= isl_space_dim(domain_dim
, isl_dim_set
);
2097 isl_basic_map
*next
;
2098 isl_local_space
*ls
;
2100 dim
= isl_space_map_from_set(domain_dim
);
2101 next
= isl_basic_map_universe(isl_space_copy(dim
));
2102 ls
= isl_local_space_from_space(dim
);
2104 for (i
= 0; i
< len
; ++i
) {
2107 c
= isl_equality_alloc(isl_local_space_copy(ls
));
2108 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, 1);
2109 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
2111 c
= isl_constraint_set_constant_si(c
, 1);
2112 next
= isl_basic_map_add_constraint(next
, c
);
2115 isl_local_space_free(ls
);
2117 return isl_map_from_basic_map(next
);
2120 /* Check if the given access is coalesced.
2121 * That is, check whether incrementing the dimension that will get
2122 * wrapped over the last thread index results in incrementing
2123 * the last array index.
2125 * This function is only called for access relations without reuse.
2127 static int access_is_coalesced(struct gpu_gen
*gen
,
2128 __isl_keep isl_union_map
*access
)
2131 isl_map
*access_map
;
2132 isl_map
*next_thread_x
;
2133 isl_map
*next_element
;
2137 access
= isl_union_map_copy(access
);
2138 access
= isl_union_map_apply_domain(access
,
2139 isl_union_map_copy(gen
->tiled_sched
));
2140 access_map
= isl_map_from_union_map(access
);
2142 dim
= isl_map_get_space(access_map
);
2143 dim
= isl_space_domain(dim
);
2144 next_thread_x
= next(dim
, gen
->shared_len
+ gen
->n_block
- 1);
2146 dim
= isl_map_get_space(access_map
);
2147 dim
= isl_space_range(dim
);
2148 next_element
= next(dim
, isl_space_dim(dim
, isl_dim_set
) - 1);
2150 map
= isl_map_apply_domain(next_thread_x
, isl_map_copy(access_map
));
2151 map
= isl_map_apply_range(map
, access_map
);
2153 coalesced
= isl_map_is_subset(map
, next_element
);
2155 isl_map_free(next_element
);
2161 /* Given an access relation in terms of the first gen->shared_len + gen->n_block
2162 * dimensions of the computed schedule, check if it is bijective for
2163 * fixed values of the first gen->shared_len dimensions.
2164 * We perform this check by equating these dimensions to parameters.
2166 static int access_is_bijective(struct gpu_gen
*gen
, __isl_keep isl_map
*access
)
2172 access
= isl_map_copy(access
);
2173 space
= isl_space_params(isl_map_get_space(access
));
2174 par
= parametrization(space
, gen
->shared_len
+ gen
->n_block
,
2175 0, gen
->shared_len
, "s");
2176 access
= isl_map_intersect_domain(access
, par
);
2177 res
= isl_map_is_bijective(access
);
2178 isl_map_free(access
);
2183 /* Look for the last shared tile loop that affects the offset of "tile"
2184 * and return the result.
2185 * If there is no such loop, then return the index of the loop
2186 * before the first shared tile loop, in particular gen->tile_first - 1.
2188 static int compute_tile_last_shared(struct gpu_gen
*gen
,
2189 struct gpu_array_tile
*tile
)
2193 for (j
= gen
->shared_len
- 1; j
>= gen
->tile_first
; --j
) {
2194 for (i
= 0; i
< tile
->n
; ++i
) {
2198 lb
= tile
->bound
[i
].lb
;
2199 if (isl_aff_involves_dims(lb
, isl_dim_in
, j
, 1))
2202 shift
= tile
->bound
[i
].shift
;
2205 if (isl_aff_involves_dims(shift
, isl_dim_in
, j
, 1))
2215 /* Look for the last shared tile loop that affects the offset of the
2216 * shared or private tile and store the result in group->last_shared.
2217 * If there is no such loop, then group->last_shared is set to a value
2218 * before the first shared tile loop, in particular gen->tile_first - 1.
2219 * If there is no tile defined on the array reference group,
2220 * then set group->last_shared to gen->shared_len - 1.
2222 static void set_last_shared(struct gpu_gen
*gen
,
2223 struct gpu_array_ref_group
*group
)
2225 struct gpu_array_tile
*tile
;
2227 group
->last_shared
= gen
->shared_len
- 1;
2229 tile
= group
->private_tile
;
2231 tile
= group
->shared_tile
;
2235 group
->last_shared
= compute_tile_last_shared(gen
, tile
);
2238 /* Compute a privatized copy of all access relations from reference groups that
2239 * are mapped to private memory and store the result in gen->privatization.
2241 static void compute_private_access(struct gpu_gen
*gen
)
2244 isl_union_map
*private;
2246 if (!gen
->options
->use_private_memory
)
2249 private = isl_union_map_empty(isl_union_map_get_space(gen
->shared_sched
));
2251 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2252 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2254 if (gpu_array_is_read_only_scalar(array
))
2257 for (j
= 0; j
< array
->n_group
; ++j
) {
2258 if (!array
->groups
[j
]->private_tile
)
2261 private = isl_union_map_union(private,
2262 group_access_relation(array
->groups
[j
], 1, 1));
2266 if (isl_union_map_is_empty(private))
2267 isl_union_map_free(private);
2269 isl_union_map
*priv
;
2271 private = isl_union_map_apply_domain(private,
2272 isl_union_map_copy(gen
->shared_sched
));
2273 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
2274 private = isl_union_map_apply_domain(private, priv
);
2275 gen
->private_access
= private;
2279 /* Compute the size of the tile specified by "tile"
2280 * in number of elements and return the result.
2282 static __isl_give isl_val
*tile_size(isl_ctx
*ctx
, struct gpu_array_tile
*tile
)
2287 size
= isl_val_one(ctx
);
2289 for (i
= 0; i
< tile
->n
; ++i
)
2290 size
= isl_val_mul(size
, isl_val_copy(tile
->bound
[i
].size
));
2295 /* If max_shared_memory is not set to infinity (-1), then make
2296 * sure that the total amount of shared memory required by the
2297 * array reference groups mapped to shared memory is no larger
2298 * than this maximum.
2300 * We apply a greedy approach and discard (keep in global memory)
2301 * those groups that would result in a total memory size that
2302 * is larger than the maximum.
2304 static void check_shared_memory_bound(struct gpu_gen
*gen
)
2307 isl_val
*left
, *size
;
2309 if (gen
->options
->max_shared_memory
< 0)
2312 left
= isl_val_int_from_si(gen
->ctx
, gen
->options
->max_shared_memory
);
2314 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2315 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2317 for (j
= 0; j
< array
->n_group
; ++j
) {
2318 struct gpu_array_ref_group
*group
;
2320 group
= array
->groups
[j
];
2321 if (!group
->shared_tile
)
2324 size
= tile_size(gen
->ctx
, group
->shared_tile
);
2325 size
= isl_val_mul_ui(size
, array
->size
);
2327 if (isl_val_le(size
, left
)) {
2328 left
= isl_val_sub(left
, size
);
2333 group
->shared_tile
= free_tile(group
->shared_tile
);
2340 /* Fill up the groups array with singleton groups, i.e., one group
2341 * per reference, initializing the array, access, write, n_ref and refs fields.
2342 * In particular the access field is initialized to the scheduled
2343 * access relation of the array reference.
2345 * Return the number of elements initialized, i.e., the number of
2346 * active references in the current kernel.
2348 static int populate_array_references(struct gpu_array_info
*array
,
2349 __isl_keep isl_union_map
*sched
, struct gpu_array_ref_group
**groups
)
2353 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2356 for (i
= 0; i
< array
->n_ref
; ++i
) {
2357 isl_union_map
*umap
;
2359 struct gpu_array_ref_group
*group
;
2360 struct gpu_stmt_access
*access
= array
->refs
[i
];
2362 map
= isl_map_copy(access
->access
);
2363 umap
= isl_union_map_from_map(map
);
2364 umap
= isl_union_map_apply_domain(umap
,
2365 isl_union_map_copy(sched
));
2367 if (isl_union_map_is_empty(umap
)) {
2368 isl_union_map_free(umap
);
2372 map
= isl_map_from_union_map(umap
);
2373 map
= isl_map_detect_equalities(map
);
2375 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2377 group
->array
= array
;
2378 group
->access
= map
;
2379 group
->write
= access
->write
;
2380 group
->refs
= &array
->refs
[i
];
2383 groups
[n
++] = group
;
2389 /* If group->n_ref == 1, then group->refs was set by
2390 * populate_array_references to point directly into
2391 * group->array->refs and should not be freed.
2392 * If group->n_ref > 1, then group->refs was set by join_groups
2393 * to point to a newly allocated array.
2395 static void free_array_ref_group(struct gpu_array_ref_group
*group
)
2399 free_tile(group
->shared_tile
);
2400 free_tile(group
->private_tile
);
2401 isl_map_free(group
->access
);
2402 if (group
->n_ref
> 1)
2407 /* Given a map where the input dimensions represent the tile loops,
2408 * eliminate the innermost of those that have a fixed value
2409 * until we reach one that does not (obviously) have a fixed value.
2411 static __isl_give isl_map
*eliminate_fixed_inner_loops(
2412 __isl_take isl_map
*access
)
2416 n
= isl_map_dim(access
, isl_dim_in
);
2418 for (i
= n
- 1; i
>= 0; --i
) {
2419 if (!map_plain_is_fixed(access
, isl_dim_in
, i
))
2421 access
= isl_map_eliminate(access
, isl_dim_in
, i
, 1);
2426 /* Check if the access relations of group1 and group2 overlap within
2427 * the innermost loop. In particular, ignore any inner dimension
2428 * with a fixed value.
2429 * The copying to and from shared memory will be performed within
2430 * the innermost actual loop so we are only allowed to consider
2431 * the dimensions up to that innermost loop while checking whether
2432 * two access relations overlap.
2434 static int accesses_overlap(struct gpu_array_ref_group
*group1
,
2435 struct gpu_array_ref_group
*group2
)
2438 isl_map
*access1
, *access2
;
2440 access1
= isl_map_copy(group1
->access
);
2441 access1
= eliminate_fixed_inner_loops(access1
);
2442 access2
= isl_map_copy(group2
->access
);
2443 access2
= eliminate_fixed_inner_loops(access2
);
2444 access1
= isl_map_intersect(access1
, access2
);
2445 empty
= isl_map_is_empty(access1
);
2446 isl_map_free(access1
);
2451 /* Combine the given two groups into a single group, containing
2452 * the references of both groups.
2454 static struct gpu_array_ref_group
*join_groups(
2455 struct gpu_array_ref_group
*group1
,
2456 struct gpu_array_ref_group
*group2
)
2460 struct gpu_array_ref_group
*group
;
2462 ctx
= isl_map_get_ctx(group1
->access
);
2463 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2465 group
->array
= group1
->array
;
2466 group
->access
= isl_map_union(isl_map_copy(group1
->access
),
2467 isl_map_copy(group2
->access
));
2468 group
->write
= group1
->write
|| group2
->write
;
2469 group
->n_ref
= group1
->n_ref
+ group2
->n_ref
;
2470 group
->refs
= isl_alloc_array(ctx
, struct gpu_stmt_access
*,
2472 assert(group
->refs
);
2473 for (i
= 0; i
< group1
->n_ref
; ++i
)
2474 group
->refs
[i
] = group1
->refs
[i
];
2475 for (i
= 0; i
< group2
->n_ref
; ++i
)
2476 group
->refs
[group1
->n_ref
+ i
] = group2
->refs
[i
];
2481 /* Combine the given two groups into a single group and free
2482 * the original two groups.
2484 static struct gpu_array_ref_group
*join_groups_and_free(
2485 struct gpu_array_ref_group
*group1
,
2486 struct gpu_array_ref_group
*group2
)
2488 struct gpu_array_ref_group
*group
;
2490 group
= join_groups(group1
, group2
);
2491 free_array_ref_group(group1
);
2492 free_array_ref_group(group2
);
2496 /* Compute the private and/or shared memory tiles for the array
2497 * reference group "group" of array "array".
2499 * If the array is a read-only scalar or if the user requested
2500 * not to use shared or private memory, then we do not need to do anything.
2502 * We only try to compute a shared memory tile if there is any reuse
2503 * or if the access is not coalesced.
2505 * For computing a private memory tile, we also require that there is
2506 * some reuse. Moreover, we require that the access is private
2507 * to the thread. That is, we check that any given array element
2508 * is only accessed by a single thread.
2509 * We compute an access relation that maps the shared tile loop iterators
2510 * and the shared point loop iterators that will be wrapped over the
2511 * threads to the array elements.
2512 * We actually check that those iterators that will be wrapped
2513 * partition the array space. This check is stricter than necessary
2514 * since several iterations may be mapped onto the same thread
2515 * and then they could be allowed to access the same memory elements,
2516 * but our check does not allow this situation.
2518 * We also check that the index expression only depends on parallel
2519 * loops. That way, we can move those loops innermost and unroll them.
2520 * Again, we use a test that is stricter than necessary.
2521 * We actually check whether the index expression only depends
2522 * on the iterators that are wrapped over the threads.
2523 * These are necessarily parallel, but there may be more parallel loops.
2525 * Combining the injectivity of the first test with the single-valuedness
2526 * of the second test, we simply test for bijectivity.
2528 * If it turns out we can use registers, we compute the private memory
2529 * tile size using can_tile, after introducing a dependence
2530 * on the thread indices.
2532 static void compute_group_bounds_core(struct gpu_gen
*gen
,
2533 struct gpu_array_ref_group
*group
)
2535 isl_ctx
*ctx
= isl_space_get_ctx(group
->array
->dim
);
2536 isl_union_map
*access
;
2537 int n_index
= group
->array
->n_index
;
2540 int use_shared
= gen
->options
->use_shared_memory
;
2541 int use_private
= gen
->options
->use_private_memory
;
2543 if (!use_shared
&& !use_private
)
2545 if (gpu_array_is_read_only_scalar(group
->array
))
2548 access
= group_access_relation(group
, 1, 1);
2549 no_reuse
= isl_union_map_is_injective(access
);
2551 if (use_shared
&& (!no_reuse
|| !access_is_coalesced(gen
, access
))) {
2552 group
->shared_tile
= create_tile(ctx
, group
->array
->n_index
);
2553 if (!can_tile(group
->access
, group
->shared_tile
))
2554 group
->shared_tile
= free_tile(group
->shared_tile
);
2557 if (!use_private
|| no_reuse
) {
2558 isl_union_map_free(access
);
2562 access
= isl_union_map_apply_domain(access
,
2563 isl_union_map_copy(gen
->shared_sched
));
2565 acc
= isl_map_from_union_map(access
);
2567 if (!access_is_bijective(gen
, acc
)) {
2572 group
->private_tile
= create_tile(gen
->ctx
, n_index
);
2573 acc
= isl_map_apply_domain(acc
, isl_map_copy(gen
->privatization
));
2574 if (!can_tile(acc
, group
->private_tile
))
2575 group
->private_tile
= free_tile(group
->private_tile
);
2580 /* Compute the private and/or shared memory tiles for the array
2581 * reference group "group" of array "array" and set last_shared.
2583 static void compute_group_bounds(struct gpu_gen
*gen
,
2584 struct gpu_array_ref_group
*group
)
2586 compute_group_bounds_core(gen
, group
);
2587 set_last_shared(gen
, group
);
2590 /* If two groups have overlapping access relations (as determined by
2591 * the "overlap" function) and if one of them involves a write,
2592 * then merge the two groups into one.
2593 * If "compute_bounds" is set, then call compute_group_bounds
2594 * on the merged groups.
2596 * Return the updated number of groups.
2598 static int group_writes(struct gpu_gen
*gen
,
2599 int n
, struct gpu_array_ref_group
**groups
,
2600 int (*overlap
)(struct gpu_array_ref_group
*group1
,
2601 struct gpu_array_ref_group
*group2
), int compute_bounds
)
2605 for (i
= 0; i
< n
; ++i
) {
2606 for (j
= n
- 1; j
> i
; --j
) {
2607 if (!groups
[i
]->write
&& !groups
[j
]->write
)
2610 if (!overlap(groups
[i
], groups
[j
]))
2613 groups
[i
] = join_groups_and_free(groups
[i
], groups
[j
]);
2615 compute_group_bounds(gen
, groups
[i
]);
2617 groups
[j
] = groups
[n
- 1];
2625 /* If two groups have overlapping access relations (within the innermost
2626 * loop) and if one of them involves a write, then merge the two groups
2629 * Return the updated number of groups.
2631 static int group_overlapping_writes(struct gpu_gen
*gen
,
2632 int n
, struct gpu_array_ref_group
**groups
)
2634 return group_writes(gen
, n
, groups
, &accesses_overlap
, 0);
2637 /* Check if the access relations of group1 and group2 overlap within
2638 * the outermost min(group1->last_shared, group2->last_shared) loops.
2640 static int last_shared_accesses_overlap(struct gpu_array_ref_group
*group1
,
2641 struct gpu_array_ref_group
*group2
)
2646 isl_map
*map_i
, *map_j
, *map
;
2648 last_shared
= group1
->last_shared
;
2649 if (group2
->last_shared
< last_shared
)
2650 last_shared
= group2
->last_shared
;
2651 map_i
= isl_map_copy(group1
->access
);
2652 dim
= isl_map_dim(map_i
, isl_dim_in
);
2653 map_i
= isl_map_eliminate(map_i
, isl_dim_in
,
2654 last_shared
+ 1, dim
- (last_shared
+ 1));
2655 map_j
= isl_map_copy(group2
->access
);
2656 map_j
= isl_map_eliminate(map_j
, isl_dim_in
,
2657 last_shared
+ 1, dim
- (last_shared
+ 1));
2658 map
= isl_map_intersect(map_i
, map_j
);
2659 empty
= isl_map_is_empty(map
);
2665 /* If two groups have overlapping access relations (within the outer
2666 * last_shared loops) and if one of them involves a write,
2667 * then merge the two groups into one.
2669 * Return the updated number of groups.
2671 static int group_last_shared_overlapping_writes(struct gpu_gen
*gen
, int n
,
2672 struct gpu_array_ref_group
**groups
)
2674 return group_writes(gen
, n
, groups
, &last_shared_accesses_overlap
, 1);
2677 /* Is the size of the tile specified by "tile" smaller than the sum of
2678 * the sizes of the tiles specified by "tile1" and "tile2"?
2680 static int smaller_tile(isl_ctx
*ctx
, struct gpu_array_tile
*tile
,
2681 struct gpu_array_tile
*tile1
, struct gpu_array_tile
*tile2
)
2684 isl_val
*size
, *size1
, *size2
;
2686 size
= tile_size(ctx
, tile
);
2687 size1
= tile_size(ctx
, tile1
);
2688 size2
= tile_size(ctx
, tile2
);
2690 size
= isl_val_sub(size
, size1
);
2691 size
= isl_val_sub(size
, size2
);
2692 smaller
= isl_val_is_neg(size
);
2699 /* Given an initial grouping of array references and shared memory tiles
2700 * for each group that allows for a shared memory tile, merge two groups
2701 * if both have a shared memory tile, the merged group also has
2702 * a shared memory tile and the size of the tile for the merge group
2703 * is smaller than the sum of the tile sizes of the individual groups.
2705 * If merging two groups decreases the "last_shared" dimension of
2706 * one or both of the two groups, then we need to check for overlapping
2709 * Return the number of groups after merging.
2711 static int group_common_shared_memory_tile(struct gpu_gen
*gen
,
2712 struct gpu_array_info
*array
, int n
,
2713 struct gpu_array_ref_group
**groups
)
2716 int recompute_overlap
= 0;
2717 isl_ctx
*ctx
= isl_space_get_ctx(array
->dim
);
2719 for (i
= 0; i
< n
; ++i
) {
2720 if (!groups
[i
]->shared_tile
)
2722 for (j
= n
- 1; j
> i
; --j
) {
2725 struct gpu_array_ref_group
*group
;
2727 if (!groups
[j
]->shared_tile
)
2730 map
= isl_map_intersect(isl_map_copy(groups
[i
]->access
),
2731 isl_map_copy(groups
[j
]->access
));
2732 empty
= isl_map_is_empty(map
);
2738 group
= join_groups(groups
[i
], groups
[j
]);
2739 compute_group_bounds(gen
, group
);
2740 if (!group
->shared_tile
||
2741 !smaller_tile(ctx
, group
->shared_tile
,
2742 groups
[i
]->shared_tile
,
2743 groups
[j
]->shared_tile
)) {
2744 free_array_ref_group(group
);
2748 if (group
->last_shared
< groups
[i
]->last_shared
||
2749 group
->last_shared
< groups
[j
]->last_shared
)
2750 recompute_overlap
= 1;
2751 free_array_ref_group(groups
[i
]);
2752 free_array_ref_group(groups
[j
]);
2755 groups
[j
] = groups
[n
- 1];
2760 if (recompute_overlap
)
2761 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
2765 /* Set array->n_group and array->groups to n and groups.
2767 * Additionally, set the "nr" field of each group
2768 * and the "group" field of each reference in each group.
2770 static void set_array_groups(struct gpu_array_info
*array
,
2771 int n
, struct gpu_array_ref_group
**groups
)
2776 array
->groups
= groups
;
2778 for (i
= 0; i
< n
; ++i
) {
2781 for (j
= 0; j
< groups
[i
]->n_ref
; ++j
)
2782 groups
[i
]->refs
[j
]->group
= i
;
2786 /* Group array references that should be considered together when
2787 * deciding whether to access them from private, shared or global memory.
2789 * In particular, if two array references overlap and if one of them
2790 * is a write, then the two references are grouped together.
2791 * We first perform an initial grouping based only on the access relation.
2792 * After computing shared and private memory tiles, we check for
2793 * overlapping writes again, but this time taking into account
2794 * the "last_shared" property.
2796 * Furthermore, if two groups admit a shared memory tile and if the
2797 * combination of the two also admits a shared memory tile, we merge
2800 static void group_array_references(struct gpu_gen
*gen
,
2801 struct gpu_array_info
*array
, __isl_keep isl_union_map
*sched
)
2805 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2806 struct gpu_array_ref_group
**groups
;
2808 groups
= isl_calloc_array(ctx
, struct gpu_array_ref_group
*,
2812 n
= populate_array_references(array
, sched
, groups
);
2814 n
= group_overlapping_writes(gen
, n
, groups
);
2816 for (i
= 0; i
< n
; ++i
)
2817 compute_group_bounds(gen
, groups
[i
]);
2819 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
2821 n
= group_common_shared_memory_tile(gen
, array
, n
, groups
);
2823 set_array_groups(array
, n
, groups
);
2826 /* Take tiled_sched, project it onto the shared tile loops and
2827 * the loops that will be wrapped over the threads and
2828 * store the result in gen->shared_sched.
2829 * Also compute a projection that projects out the loops that will be
2830 * wrapped over the threads and store this projection in gen->shared_proj.
2832 static void compute_shared_sched(struct gpu_gen
*gen
)
2837 isl_union_map
*sched
;
2839 sched
= isl_union_map_copy(gen
->tiled_sched
);
2841 dim
= isl_union_map_get_space(sched
);
2842 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
2843 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
2845 dim
= isl_union_map_get_space(sched
);
2846 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
2848 gen
->shared_sched
= sched
;
2849 gen
->shared_proj
= isl_union_map_from_map(proj
);
2852 /* Group references of all arrays in the program.
2854 static void group_references(struct gpu_gen
*gen
)
2857 isl_union_map
*sched
;
2859 sched
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
2860 isl_union_map_copy(gen
->shared_proj
));
2862 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
2863 group_array_references(gen
, &gen
->prog
->array
[i
], sched
);
2865 isl_union_map_free(sched
);
2868 /* Free all array information that is local to the current kernel.
2870 static void free_local_array_info(struct gpu_gen
*gen
)
2874 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2875 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2877 for (j
= 0; j
< array
->n_group
; ++j
)
2878 free_array_ref_group(array
->groups
[j
]);
2879 free(array
->groups
);
2883 /* Compute the size of a bounding box around the origin and "set",
2884 * where "set" is assumed to contain only non-negative elements.
2885 * In particular, compute the maximal value of "set" in each direction
2888 static __isl_give isl_multi_pw_aff
*extract_size(__isl_take isl_set
*set
,
2889 __isl_keep isl_set
*context
)
2892 isl_multi_pw_aff
*mpa
;
2894 n
= isl_set_dim(set
, isl_dim_set
);
2895 mpa
= isl_multi_pw_aff_zero(isl_set_get_space(set
));
2896 for (i
= 0; i
< n
; ++i
) {
2901 bound
= isl_set_dim_max(isl_set_copy(set
), i
);
2902 bound
= isl_pw_aff_coalesce(bound
);
2903 bound
= isl_pw_aff_gist(bound
, isl_set_copy(context
));
2905 space
= isl_pw_aff_get_domain_space(bound
);
2906 one
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
2907 one
= isl_aff_add_constant_si(one
, 1);
2908 bound
= isl_pw_aff_add(bound
, isl_pw_aff_from_aff(one
));
2909 mpa
= isl_multi_pw_aff_set_pw_aff(mpa
, i
, bound
);
2916 /* Compute the effective grid size as a list of the sizes in each dimension.
2918 * The grid size specified by the user or set by default
2919 * in read_grid_sizes() and applied in tile_schedule(),
2920 * may be too large for the given code in the sense that
2921 * it may contain blocks that don't need to execute anything.
2922 * We therefore don't return this grid size, but instead the
2923 * smallest grid size that ensures that all blocks that actually
2924 * execute code are included in the grid.
2926 * We first extract a description of the grid, i.e., the possible values
2927 * of the block ids, from gen->tiled_sched.
2928 * The block ids are parameters in gen->tiled_sched.
2929 * We simply need to change them into set dimensions.
2931 * Then, for each block dimension, we compute the maximal value of the block id
2934 static __isl_give isl_multi_pw_aff
*extract_grid_size(struct gpu_gen
*gen
,
2935 struct ppcg_kernel
*kernel
)
2940 grid
= isl_union_map_params(isl_union_map_copy(gen
->tiled_sched
));
2941 grid
= isl_set_from_params(grid
);
2942 grid
= isl_set_add_dims(grid
, isl_dim_set
, gen
->n_grid
);
2943 for (i
= 0; i
< gen
->n_grid
; ++i
) {
2947 snprintf(name
, sizeof(name
), "b%d", i
);
2948 pos
= isl_set_find_dim_by_name(grid
, isl_dim_param
, name
);
2950 grid
= isl_set_equate(grid
, isl_dim_param
, pos
, isl_dim_set
, i
);
2951 grid
= isl_set_project_out(grid
, isl_dim_param
, pos
, 1);
2954 return extract_size(grid
, kernel
->context
);
2957 /* Compute the size of a fixed bounding box around the origin and "set",
2958 * where "set" is assumed to contain only non-negative elements,
2959 * and store the results in "size".
2960 * In particular, compute the maximal value of "set" in each direction
2963 static void extract_fixed_size(__isl_take isl_set
*set
, int *size
)
2966 isl_local_space
*ls
;
2969 n
= isl_set_dim(set
, isl_dim_set
);
2970 ls
= isl_local_space_from_space(isl_set_get_space(set
));
2971 obj
= isl_aff_zero_on_domain(ls
);
2972 for (i
= 0; i
< n
; ++i
) {
2975 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 1);
2976 max
= isl_set_max_val(set
, obj
);
2977 size
[i
] = isl_val_get_num_si(max
) + 1;
2979 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 0);
2985 /* Compute the effective block size as a list of the sizes in each dimension
2986 * and store the sizes in kernel->block_dim.
2988 * The block size specified by the user or set by default
2989 * in read_block_sizes() and applied in thread_tile_schedule(),
2990 * may be too large for the given code in the sense that
2991 * it may contain threads that don't need to execute anything.
2992 * We therefore don't store this block size in kernel->block_dim,
2993 * but instead the smallest block size that ensures that all threads
2994 * that actually execute code are included in the block.
2996 * The current implementation eliminates all parameters, ensuring
2997 * that the size is a fixed constant in each dimension.
2998 * In principle we could also compute parametric sizes.
2999 * We would have to make sure to project out all b%d and t%d parameters,
3002 static void extract_block_size(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3007 isl_multi_pw_aff
*mpa
;
3009 block
= isl_union_map_params(isl_union_map_copy(gen
->local_sched
));
3010 block
= isl_set_from_params(block
);
3011 block
= isl_set_add_dims(block
, isl_dim_set
, gen
->n_block
);
3012 kernel
->n_block
= gen
->n_block
;
3013 for (i
= 0; i
< gen
->n_block
; ++i
) {
3017 snprintf(name
, sizeof(name
), "t%d", i
);
3018 pos
= isl_set_find_dim_by_name(block
, isl_dim_param
, name
);
3020 block
= isl_set_equate(block
, isl_dim_param
, pos
,
3023 nparam
= isl_set_dim(block
, isl_dim_param
);
3024 block
= isl_set_project_out(block
, isl_dim_param
, 0, nparam
);
3026 extract_fixed_size(block
, kernel
->block_dim
);
3029 void ppcg_kernel_free(void *user
)
3031 struct ppcg_kernel
*kernel
= user
;
3037 isl_multi_pw_aff_free(kernel
->grid_size
);
3038 isl_set_free(kernel
->context
);
3039 isl_union_set_free(kernel
->arrays
);
3040 isl_space_free(kernel
->space
);
3041 isl_ast_node_free(kernel
->tree
);
3043 for (i
= 0; i
< kernel
->n_array
; ++i
)
3044 isl_pw_aff_list_free(kernel
->array
[i
].bound
);
3045 free(kernel
->array
);
3047 for (i
= 0; i
< kernel
->n_var
; ++i
) {
3048 free(kernel
->var
[i
].name
);
3049 isl_vec_free(kernel
->var
[i
].size
);
3056 static void create_kernel_var(isl_ctx
*ctx
, struct gpu_array_ref_group
*group
,
3057 struct ppcg_kernel_var
*var
)
3060 struct gpu_array_tile
*tile
;
3064 var
->array
= group
->array
;
3066 tile
= group
->private_tile
;
3067 var
->type
= ppcg_access_private
;
3069 tile
= group
->shared_tile
;
3070 var
->type
= ppcg_access_shared
;
3073 p
= isl_printer_to_str(ctx
);
3074 p
= print_array_name(p
, group
);
3075 var
->name
= isl_printer_get_str(p
);
3076 isl_printer_free(p
);
3078 var
->size
= isl_vec_alloc(ctx
, group
->array
->n_index
);
3080 for (j
= 0; j
< group
->array
->n_index
; ++j
)
3081 var
->size
= isl_vec_set_element_val(var
->size
, j
,
3082 isl_val_copy(tile
->bound
[j
].size
));
3085 static void create_kernel_vars(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3090 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3091 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3093 for (j
= 0; j
< array
->n_group
; ++j
) {
3094 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3095 if (group
->private_tile
|| group
->shared_tile
)
3101 kernel
->var
= isl_calloc_array(gen
->ctx
, struct ppcg_kernel_var
, n
);
3102 assert(kernel
->var
);
3105 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3106 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3108 for (j
= 0; j
< array
->n_group
; ++j
) {
3109 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3110 if (!group
->private_tile
&& !group
->shared_tile
)
3112 create_kernel_var(gen
->ctx
, group
, &kernel
->var
[n
]);
3118 /* The sizes of the arrays on the host that have been computed by
3119 * extract_array_info may depend on the parameters. Use the extra
3120 * constraints on the parameters that are valid at "host_domain"
3121 * to simplify these expressions and store the results in kernel->array.
3123 static void localize_bounds(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
,
3124 __isl_keep isl_set
*host_domain
)
3129 kernel
->array
= isl_calloc_array(gen
->ctx
,
3130 struct gpu_local_array_info
, gen
->prog
->n_array
);
3131 assert(kernel
->array
);
3132 kernel
->n_array
= gen
->prog
->n_array
;
3134 context
= isl_set_copy(host_domain
);
3135 context
= isl_set_params(context
);
3137 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3138 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3139 isl_pw_aff_list
*local
;
3141 if (array
->n_group
== 0)
3144 local
= isl_pw_aff_list_alloc(gen
->ctx
, array
->n_index
);
3146 for (j
= 0; j
< array
->n_index
; ++j
) {
3149 pwaff
= isl_pw_aff_copy(array
->bound
[j
]);
3150 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
3151 local
= isl_pw_aff_list_add(local
, pwaff
);
3154 kernel
->array
[i
].bound
= local
;
3156 isl_set_free(context
);
3159 /* Find the element in gen->stmt that has the given "id".
3160 * Return NULL if no such gpu_stmt can be found.
3162 static struct gpu_stmt
*find_stmt(struct gpu_prog
*prog
, __isl_keep isl_id
*id
)
3166 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
3167 if (id
== prog
->stmts
[i
].id
)
3171 return i
< prog
->n_stmts
? &prog
->stmts
[i
] : NULL
;
3174 /* Set gen->tile_len and gen->n_parallel to those of the statement
3175 * affected by the first map (part of the schedule)
3176 * on which this function is called.
3177 * Because of the way the schedule is constructed, the other statements
3178 * in the list, if any, should have the same values for these properties.
3180 static int extract_tile_len(__isl_take isl_map
*map
, void *user
)
3182 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3184 struct gpu_stmt
*stmt
;
3186 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
3187 stmt
= find_stmt(gen
->prog
, id
);
3193 isl_die(gen
->ctx
, isl_error_unknown
,
3194 "statement not found", return -1);
3196 gen
->tile_len
= stmt
->tile_len
;
3197 gen
->n_parallel
= stmt
->n_parallel
;
3202 void ppcg_kernel_stmt_free(void *user
)
3205 struct ppcg_kernel_stmt
*stmt
= user
;
3210 switch (stmt
->type
) {
3211 case ppcg_kernel_copy
:
3212 isl_ast_expr_free(stmt
->u
.c
.index
);
3213 isl_ast_expr_free(stmt
->u
.c
.local_index
);
3215 case ppcg_kernel_domain
:
3216 for (i
= 0; i
< stmt
->u
.d
.n_access
; ++i
) {
3217 isl_ast_expr_list_free(stmt
->u
.d
.access
[i
].index
);
3218 free(stmt
->u
.d
.access
[i
].local_name
);
3220 free(stmt
->u
.d
.access
);
3222 case ppcg_kernel_sync
:
3229 /* Set the options of "context" to
3231 * { space -> [x] : x >= first }
3233 static __isl_give isl_ast_build
*set_unroll(
3234 __isl_take isl_ast_build
*build
, __isl_take isl_space
*space
,
3241 ctx
= isl_ast_build_get_ctx(build
);
3243 space
= isl_space_from_domain(space
);
3244 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
3245 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "unroll");
3246 unroll
= isl_map_universe(space
);
3247 unroll
= isl_map_lower_bound_si(unroll
, isl_dim_out
, 0, first
);
3248 opt
= isl_union_map_from_map(unroll
);
3250 build
= isl_ast_build_set_options(build
, opt
);
3255 /* Return a list of isl_ids of the form "prefix%d".
3257 static __isl_give isl_id_list
*generate_names(isl_ctx
*ctx
,
3258 int n
, const char *prefix
)
3264 names
= isl_id_list_alloc(ctx
, n
);
3265 for (i
= 0; i
< n
; ++i
) {
3268 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
3269 id
= isl_id_alloc(ctx
, name
, NULL
);
3270 names
= isl_id_list_add(names
, id
);
3276 /* Extend the schedule "schedule" with the part of "extension"
3277 * starting at "first" up to "len".
3279 static __isl_give isl_union_map
*extend_schedule(
3280 __isl_take isl_union_map
*schedule
,
3281 __isl_take isl_union_map
*extension
, int first
, int len
)
3285 isl_union_map
*umap
;
3288 space
= isl_union_map_get_space(schedule
);
3289 space
= isl_space_set_from_params(space
);
3290 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
3291 proj
= isl_set_identity(isl_set_universe(space
));
3292 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, first
);
3293 extension
= isl_union_map_apply_range(extension
,
3294 isl_union_map_from_map(proj
));
3296 schedule
= isl_union_map_range_product(schedule
, extension
);
3301 /* This function is called for each access to an array in each instance
3302 * in the kernel of some statement in the original code.
3303 * Replace that access by an access to global, shared or private memory
3304 * and store the results in *kernel_access.
3306 * Since the array in shared or private memory is just
3307 * a shifted copy of part of the original array, we simply need
3308 * to subtract the lower bound, which was computed in can_tile.
3309 * If any of the indices is strided, then we first add
3310 * shared_tile->bound[i].shift and divide by shared_tile->bound[i].stride.
3312 * If the given array is accessed directly from global memory,
3313 * we don't need to perform any shifting and simply simplify
3314 * the expression in the context of the domain instead.
3316 * If the array space (range of access) has no name, then we are
3317 * accessing an iterator in the original program.
3319 * The input stmt_access->access relation maps the iteration domain
3320 * of the current statement to an array element.
3321 * The first step is to reformulate
3322 * this access relation in terms of the loop iterators of the generated
3323 * code through precomposition with gen->stmt_it.
3325 * The expressions in "tile" are formulated in terms of the first
3326 * gen->shared_len dimensions of the computed schedule using the mapping
3327 * sched2shared which maps the loop iterators to these dimensions.
3329 static void compute_index_expression(struct gpu_gen
*gen
,
3330 struct ppcg_kernel_access
*kernel_access
,
3331 struct gpu_stmt_access
*stmt_access
, __isl_keep isl_map
*stmt_it
,
3332 __isl_keep isl_map
*sched2shared
, __isl_keep isl_ast_build
*build
)
3335 isl_pw_multi_aff
*pma
;
3338 struct gpu_array_tile
*tile
= NULL
;
3340 if (isl_map_has_tuple_name(stmt_access
->access
, isl_dim_out
)) {
3343 struct gpu_array_ref_group
*group
;
3346 name
= isl_map_get_tuple_name(stmt_access
->access
, isl_dim_out
);
3348 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3349 if (strcmp(name
, gen
->prog
->array
[i
].name
))
3351 kernel_access
->array
= &gen
->prog
->array
[i
];
3352 kernel_access
->local_array
= &gen
->kernel
->array
[i
];
3354 assert(kernel_access
->array
);
3355 group
= kernel_access
->array
->groups
[stmt_access
->group
];
3356 p
= isl_printer_to_str(gen
->ctx
);
3357 p
= print_array_name(p
, group
);
3358 kernel_access
->local_name
= isl_printer_get_str(p
);
3359 isl_printer_free(p
);
3360 tile
= group
->private_tile
;
3361 kernel_access
->type
= ppcg_access_private
;
3363 tile
= group
->shared_tile
;
3364 kernel_access
->type
= ppcg_access_shared
;
3368 kernel_access
->type
= ppcg_access_global
;
3370 n_index
= isl_map_dim(stmt_access
->access
, isl_dim_out
);
3371 kernel_access
->index
= isl_ast_expr_list_alloc(gen
->ctx
, n_index
);
3376 access
= isl_map_copy(stmt_access
->access
);
3377 access
= isl_map_apply_range(isl_map_copy(stmt_it
), access
);
3378 pma
= isl_pw_multi_aff_from_map(access
);
3379 pma
= isl_pw_multi_aff_coalesce(pma
);
3381 for (i
= 0; i
< n_index
; ++i
) {
3386 index
= isl_pw_multi_aff_get_pw_aff(pma
, i
);
3388 if (!kernel_access
->array
) {
3390 domain
= isl_map_domain(isl_map_copy(stmt_it
));
3391 index
= isl_pw_aff_coalesce(index
);
3392 index
= isl_pw_aff_gist(index
, domain
);
3394 domain
= isl_map_domain(isl_map_copy(stmt_it
));
3395 index
= shift_index(index
, kernel_access
->array
,
3396 &tile
->bound
[i
], domain
,
3397 isl_map_copy(sched2shared
));
3400 expr
= isl_ast_build_expr_from_pw_aff(build
, index
);
3402 kernel_access
->index
= isl_ast_expr_list_add(
3403 kernel_access
->index
, expr
);
3406 isl_pw_multi_aff_free(pma
);
3409 /* This function is called for each instance of a user statement
3412 * We attach a struct ppcg_kernel_stmt to the "node", containing
3413 * local information about the accesses.
3414 * This information is computed from stmt_it, which expresses the domain
3415 * elements in terms of the generated loops, and sched2shared,
3416 * which expresses the first shared_len dimensions of the schedule
3417 * computed by PPCG in terms of the generated loops.
3419 static __isl_give isl_ast_node
*at_each_domain(__isl_take isl_ast_node
*node
,
3420 __isl_keep isl_ast_build
*build
, void *user
)
3422 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3423 struct ppcg_kernel_stmt
*stmt
;
3425 isl_map
*stmt_it
, *sched2shared
;
3426 isl_ast_expr
*expr
, *arg
;
3427 isl_union_map
*schedule
;
3429 struct gpu_stmt_access
*access
;
3431 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3433 return isl_ast_node_free(node
);
3435 expr
= isl_ast_node_user_get_expr(node
);
3436 arg
= isl_ast_expr_get_op_arg(expr
, 0);
3437 id
= isl_ast_expr_get_id(arg
);
3439 schedule
= isl_ast_build_get_schedule(build
);
3440 stmt_it
= isl_map_reverse(isl_map_from_union_map(schedule
));
3441 sched2shared
= compute_sched_to_shared(gen
, isl_map_copy(stmt_it
));
3443 stmt
->type
= ppcg_kernel_domain
;
3444 stmt
->u
.d
.stmt
= find_stmt(gen
->prog
, id
);
3445 if (!stmt
->u
.d
.stmt
)
3449 for (access
= stmt
->u
.d
.stmt
->accesses
; access
; access
= access
->next
)
3452 stmt
->u
.d
.access
= isl_calloc_array(gen
->ctx
,
3453 struct ppcg_kernel_access
, n
);
3454 if (!stmt
->u
.d
.access
)
3457 stmt
->u
.d
.n_access
= n
;
3459 access
= stmt
->u
.d
.stmt
->accesses
;
3460 for (i
= 0; i
< n
; ++i
, access
= access
->next
) {
3461 compute_index_expression(gen
, &stmt
->u
.d
.access
[i
], access
,
3462 stmt_it
, sched2shared
, build
);
3466 isl_map_free(stmt_it
);
3467 isl_map_free(sched2shared
);
3468 isl_ast_expr_free(arg
);
3469 isl_ast_expr_free(expr
);
3471 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3472 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3473 return isl_ast_node_set_annotation(node
, id
);
3476 isl_map_free(stmt_it
);
3477 ppcg_kernel_stmt_free(stmt
);
3478 isl_map_free(sched2shared
);
3479 return isl_ast_node_free(node
);
3482 /* This function is called when code has been generated for the shared
3483 * tile loops. The "schedule" refers only to the original statements.
3485 * We extend the schedule with that part of gen->local_sched that hasn't
3486 * been taken into account yet. This introduces parameters referring
3487 * to thread ids in the schedule, so we add them (with the appropriate
3488 * bounds to the context as well).
3489 * Finally, we set the appropriate unrolling options
3490 * if gen->first_unroll is set.
3492 static __isl_give isl_ast_node
*create_domain_leaf(
3493 __isl_take isl_union_map
*schedule
, __isl_take isl_ast_build
*build
,
3496 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3498 isl_union_map
*sched
;
3501 isl_id_list
*iterators
;
3504 schedule
= extend_schedule(schedule
,
3505 isl_union_map_copy(gen
->local_sched
),
3506 gen
->shared_len
, gen
->thread_tiled_len
);
3508 space
= isl_ast_build_get_schedule_space(build
);
3509 set
= isl_set_universe(space
);
3510 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
3511 gen
->kernel
->block_dim
, "t");
3512 build
= isl_ast_build_restrict(build
, set
);
3514 n
= gen
->thread_tiled_len
- gen
->shared_len
;
3516 if (gen
->first_unroll
>= 0) {
3517 space
= isl_space_set_alloc(gen
->ctx
, 0, n
);
3518 build
= set_unroll(build
, space
, gen
->first_unroll
);
3520 iterators
= generate_names(gen
->ctx
, n
, "c");
3521 build
= isl_ast_build_set_iterators(build
, iterators
);
3522 build
= isl_ast_build_set_at_each_domain(build
, &at_each_domain
, gen
);
3523 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
3524 isl_ast_build_free(build
);
3529 /* This function is called for each statement node in the AST of the code
3530 * for copying to or from shared/private memory.
3531 * Attach a pointer to a ppcg_kernel_stmt representing the copy
3532 * statement to the node.
3533 * The statement name is {read,write}_{shared,private}_<array>.
3535 * The schedule is of the form
3539 * where A refers to a piece of an array and T to the corresponding
3540 * shifted tile. We split this schedule into mappings L -> A and L -> T
3541 * and store the corresponding expressions in stmt->index and stmt->local_index,
3542 * where stmt points to the ppcg_kernel_stmt that is attached to the node.
3544 static __isl_give isl_ast_node
*attach_copy_stmt(__isl_take isl_ast_node
*node
,
3545 __isl_keep isl_ast_build
*build
, void *user
)
3547 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3548 struct ppcg_kernel_stmt
*stmt
;
3552 isl_map
*access
, *local_access
, *map
;
3553 isl_pw_multi_aff
*pma
;
3557 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3559 return isl_ast_node_free(node
);
3561 access
= isl_map_from_union_map(isl_ast_build_get_schedule(build
));
3562 name
= isl_map_get_tuple_name(access
, isl_dim_in
);
3563 stmt
->u
.c
.read
= !strncmp(name
, "read", 4);
3564 access
= isl_map_reverse(access
);
3565 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(access
)));
3566 local_access
= isl_map_copy(access
);
3568 map
= isl_map_domain_map(isl_map_universe(isl_space_copy(space
)));
3569 id
= isl_map_get_tuple_id(access
, isl_dim_out
);
3570 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
3571 access
= isl_map_apply_range(access
, map
);
3572 pma
= isl_pw_multi_aff_from_map(access
);
3573 expr
= isl_ast_build_call_from_pw_multi_aff(build
, pma
);
3574 stmt
->u
.c
.index
= expr
;
3576 map
= isl_map_range_map(isl_map_universe(space
));
3577 id
= isl_map_get_tuple_id(local_access
, isl_dim_out
);
3578 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
3579 local_access
= isl_map_apply_range(local_access
, map
);
3580 pma
= isl_pw_multi_aff_from_map(local_access
);
3581 expr
= isl_ast_build_call_from_pw_multi_aff(build
, pma
);
3582 stmt
->u
.c
.local_index
= expr
;
3584 stmt
->u
.c
.array
= gen
->copy_group
->array
;
3585 array_index
= stmt
->u
.c
.array
- gen
->prog
->array
;
3586 stmt
->u
.c
.local_array
= &gen
->kernel
->array
[array_index
];
3587 stmt
->type
= ppcg_kernel_copy
;
3589 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3590 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3591 return isl_ast_node_set_annotation(node
, id
);
3594 /* Given a schedule of the form
3598 * (with S the first shared_len dimensions of the computed schedule,
3599 * A the array and L the schedule correponding to the generated loops),
3600 * indicating where the copying the array elements that need to be copied,
3601 * construct code for performing the copying.
3603 * "group" is the array reference group that is being copied
3604 * "type" is either "read" or "write"
3605 * private is set if copying needs to be performed to/from registers
3607 * We first construct a mapping to a shifted tile of the array,
3609 * [S -> A] -> T(S,A) (1)
3611 * If private is set, then we also use this mapping as a schedule
3612 * (which is already thread-specific and will be completely unrolled).
3613 * Otherwise, we wrap/tile the range over the threads.
3616 * [S -> A] -> T'(S,A)
3618 * Combined with the given schedule, we have
3620 * [S -> A] -> [L -> T'(S,A)] (2)
3622 * From the shifted tile mapping, we construct a mapping
3624 * [S -> A] -> [A -> T(S,A)]
3626 * and apply it to the schedule (2), obtaining
3628 * [A -> T(S(L),A)] -> [L -> T'(S(L),A)]
3630 * Note that we can project out S because it is uniquely defined by L.
3632 static __isl_give isl_ast_node
*copy_access(struct gpu_gen
*gen
,
3633 __isl_take isl_map
*sched
,
3634 const char *type
, struct gpu_array_ref_group
*group
,
3635 __isl_take isl_ast_build
*build
, int private)
3637 const char *array_name
;
3638 const char *mem
= private ? "private" : "shared";
3642 isl_map
*schedule
, *shift
, *map
;
3644 isl_id_list
*iterators
;
3647 shift
= isl_set_unwrap(isl_map_domain(isl_map_copy(sched
)));
3648 array_name
= isl_map_get_tuple_name(shift
, isl_dim_out
);
3649 shift
= shift_access(shift
, group
);
3651 schedule
= isl_map_copy(shift
);
3653 schedule
= tile_access_schedule(gen
, schedule
);
3655 n
= isl_map_dim(schedule
, isl_dim_out
);
3656 set
= isl_set_universe(isl_ast_build_get_schedule_space(build
));
3657 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
3658 gen
->kernel
->block_dim
, "t");
3660 schedule
= isl_map_range_product(sched
, schedule
);
3663 name
= isl_alloc_array(gen
->ctx
, char,
3664 strlen(type
) + sizeof("_private_") + strlen(array_name
) + 20);
3665 if (group
->array
->n_group
> 1)
3666 sprintf(name
, "%s_%s_%s_%d", type
, mem
, array_name
, group
->nr
);
3668 sprintf(name
, "%s_%s_%s", type
, mem
, array_name
);
3669 shift
= isl_map_set_tuple_name(shift
,
3670 isl_dim_out
, name
+ strlen(type
) + 1);
3672 space
= isl_space_domain(isl_map_get_space(shift
));
3673 map
= isl_map_range_map(isl_map_universe(isl_space_unwrap(space
)));
3674 map
= isl_map_range_product(map
, shift
);
3676 schedule
= isl_map_apply_domain(schedule
, map
);
3678 schedule
= isl_map_set_tuple_name(schedule
, isl_dim_in
, name
);
3681 build
= isl_ast_build_restrict(build
, set
);
3683 gen
->copy_group
= group
;
3686 space
= isl_space_range(isl_map_get_space(schedule
));
3687 space
= isl_space_range(isl_space_unwrap(space
));
3688 build
= set_unroll(build
, space
, 0);
3690 iterators
= generate_names(gen
->ctx
, n
, "c");
3691 build
= isl_ast_build_set_iterators(build
, iterators
);
3692 build
= isl_ast_build_set_at_each_domain(build
, &attach_copy_stmt
, gen
);
3693 tree
= isl_ast_build_ast_from_schedule(build
,
3694 isl_union_map_from_map(schedule
));
3695 isl_ast_build_free(build
);
3700 /* Return code for reading into or writing from shared memory
3701 * the given array reference group.
3703 * If we are performing a read from global memory to shared memory and
3704 * if the array involved is not a scalar, then we copy
3705 * the entire tile to shared memory. This may result in some extra
3706 * elements getting copied, but it should lead to simpler code
3707 * (which means that fewer registers may be needed) and less divergence.
3709 * Otherwise, we only copy the elements that will be read or have been written
3713 * The input "sched" is of the form.
3717 * with S the first shared_len dimensions of the computed schedule,
3718 * A the array and L the schedule correponding to the generated loops.
3720 * We first drop "type",
3724 * If the above conditions are satisfied, we project out A,
3729 * and then introduce the group tile [S -> T], resulting in
3733 static __isl_give isl_ast_node
*copy_group_shared_accesses(
3734 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
3735 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
3739 isl_union_map
*access
;
3741 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
3742 read
= !strcmp(type
, "read");
3744 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
3746 if (read
&& group
->array
->n_index
> 0) {
3750 space
= isl_space_domain(isl_map_get_space(sched
));
3751 space
= isl_space_unwrap(space
);
3752 map
= isl_map_domain_map(isl_map_universe(space
));
3753 sched
= isl_map_apply_domain(sched
, map
);
3755 map
= group_tile(group
);
3756 map
= isl_map_reverse(isl_map_domain_map(map
));
3757 sched
= isl_map_apply_domain(sched
, map
);
3760 return copy_access(gen
, sched
, type
, group
, build
, 0);
3763 /* Return code for reading into or writing from private memory
3764 * the given array reference group.
3766 * Let S be the first shared_len dimensions of the computed schedule,
3767 * D the iteration domains, A the array and L the schedule correponding
3768 * to the generated loops.
3769 * "sched" is of the form
3773 * where type is either "read" or "write".
3774 * We apply the privatization D -> S(t), with t the thread ids,
3775 * to the access relation D -> A to obtain the privatized access relation
3779 * We drop the type from "sched" and intersect with the privatized access
3780 * relation to obtain
3784 static __isl_give isl_ast_node
*copy_group_private_accesses(
3785 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
3786 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
3790 isl_union_map
*priv
;
3791 isl_union_map
*access
;
3792 isl_map
*access_map
;
3794 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
3795 read
= !strcmp(type
, "read");
3797 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
3798 priv
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
3801 access
= group_access_relation(group
, read
, !read
);
3802 access
= isl_union_map_apply_domain(access
, priv
);
3803 access_map
= isl_map_from_union_map(access
);
3805 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
3806 sched
= isl_map_intersect_domain(sched
, isl_map_wrap(access_map
));
3808 return copy_access(gen
, sched
, type
, group
, build
, 1);
3811 /* Return code for reading into or writing from shared or private memory.
3813 * "schedule" is of the form
3817 * with S be the first shared_len dimensions of the computed schedule,
3818 * A the array and L the schedule correponding to the generated loops.
3819 * The array reference group is attached to "type".
3821 static __isl_give isl_ast_node
*create_access_leaf(
3822 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
3823 __isl_take isl_ast_build
*build
)
3825 struct gpu_array_ref_group
*group
;
3828 id
= isl_map_get_tuple_id(schedule
, isl_dim_in
);
3829 group
= isl_id_get_user(id
);
3832 if (group
->private_tile
)
3833 return copy_group_private_accesses(gen
, group
, schedule
,
3836 return copy_group_shared_accesses(gen
, group
, schedule
,
3840 /* Create a domain node representing a synchronization.
3842 static __isl_give isl_ast_node
*create_sync_leaf(
3843 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
3844 __isl_take isl_ast_build
*build
)
3846 struct ppcg_kernel_stmt
*stmt
;
3852 isl_map_free(schedule
);
3854 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3858 stmt
->type
= ppcg_kernel_sync
;
3860 space
= isl_ast_build_get_schedule_space(build
);
3861 space
= isl_space_from_domain(space
);
3862 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "sync");
3863 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
3864 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
3865 node
= isl_ast_node_alloc_user(expr
);
3866 isl_ast_build_free(build
);
3868 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3869 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3870 return isl_ast_node_set_annotation(node
, id
);
3873 /* This function is called during the code generation at the point
3874 * where the schedule domain element is completely determined by
3875 * the generated code. The input schedule contains the original
3876 * statements as well as synchronization and copy "statements".
3877 * The latter are scheduled at different points than any of the original
3878 * statements, so they will only arrive here in isolation.
3880 * If the current schedule only refers to a single statement,
3881 * we check if it is a copy or synchronization statement and
3882 * call the appropriate functions.
3883 * Otherwise, we assume we are dealing with the original statements
3884 * and we call create_domain_leaf.
3886 static __isl_give isl_ast_node
*create_kernel_leaf(
3887 __isl_take isl_ast_build
*build
, void *user
)
3889 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3891 isl_union_map
*schedule
;
3894 schedule
= isl_ast_build_get_schedule(build
);
3896 if (isl_union_map_n_map(schedule
) != 1)
3897 return create_domain_leaf(schedule
, build
, user
);
3899 map
= isl_map_from_union_map(schedule
);
3900 name
= isl_map_get_tuple_name(map
, isl_dim_in
);
3901 if (!strcmp(name
, "read") || !strcmp(name
, "write"))
3902 return create_access_leaf(gen
, map
, build
);
3903 if (!strcmp(name
, "sync"))
3904 return create_sync_leaf(gen
, map
, build
);
3906 return create_domain_leaf(isl_union_map_from_map(map
), build
, user
);
3909 /* Mark all odd schedule dimensions as "atomic" (when the even dimensions
3910 * have value 0) and all even schedule dimensions as "unroll".
3912 * That is, the options look as follows
3914 * { [0, b, 0, d, ..., 0] -> atomic[i] : exists a : i = 2 a + 1;
3915 * [a, b, c, d, ..., z] -> unroll[i] : exists a : i = 2 a }
3917 * The even positions are used to be able to schedule copying blocks
3918 * and synchronization before or after each level of the shared memory
3919 * tile loops and we want to make sure that code for these is generated
3920 * separately (within each level).
3922 static __isl_give isl_ast_build
*set_atomic_and_unroll(
3923 __isl_take isl_ast_build
*build
,
3924 __isl_take isl_space
*space
, int sched_len
)
3930 isl_local_space
*ls
;
3933 ctx
= isl_ast_build_get_ctx(build
);
3935 space
= isl_space_params(space
);
3936 space
= isl_space_add_dims(space
, isl_dim_set
, sched_len
);
3937 space
= isl_space_from_domain(space
);
3938 space
= isl_space_add_dims(space
, isl_dim_out
, 2);
3939 map
= isl_map_universe(isl_space_copy(space
));
3940 for (i
= 0; i
< sched_len
; i
+= 2)
3941 map
= isl_map_fix_si(map
, isl_dim_in
, i
, 0);
3942 ls
= isl_local_space_from_space(isl_map_get_space(map
));
3943 c
= isl_equality_alloc(ls
);
3944 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
3945 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
3946 c
= isl_constraint_set_constant_si(c
, 1);
3947 map
= isl_map_add_constraint(map
, c
);
3948 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
3949 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "atomic");
3950 opt
= isl_union_map_from_map(map
);
3952 map
= isl_map_universe(space
);
3953 ls
= isl_local_space_from_space(isl_map_get_space(map
));
3954 c
= isl_equality_alloc(ls
);
3955 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
3956 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
3957 map
= isl_map_add_constraint(map
, c
);
3958 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
3959 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "unroll");
3960 opt
= isl_union_map_add_map(opt
, map
);
3962 build
= isl_ast_build_set_options(build
, opt
);
3967 /* Return a map that maps a space of dimension gen->shared_len
3968 * to its last dimensions starting at gen->tile_first.
3969 * The range is of dimension
3971 * 2 * (gen->shared_len - gen->tile_first) + 1
3973 * The input dimensions are mapped to the odd dimensions in the output,
3974 * while the even dimensions (except 2*pos) are fixed to 0.
3975 * Output dimension 2*pos (if pos >= 0) is fixed to "val".
3976 * If pos >= 0, then only the pos first dimensions starting at gen->tile_first
3977 * are mapped to the output. The remaining input dimensions are projected
3978 * out and the corresponding output dimensions are fixed to 0.
3980 static __isl_give isl_map
*insert_even(struct gpu_gen
*gen
,
3981 __isl_take isl_space
*space
, int pos
, int val
)
3986 space
= isl_space_set_from_params(space
);
3987 space
= isl_space_add_dims(space
, isl_dim_set
, gen
->shared_len
);
3988 space
= isl_space_map_from_set(space
);
3989 proj
= isl_map_identity(space
);
3990 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, gen
->tile_first
);
3991 n
= gen
->shared_len
- gen
->tile_first
;
3992 for (i
= 0; i
<= n
; ++i
) {
3993 proj
= isl_map_insert_dims(proj
, isl_dim_out
, 2 * i
, 1);
3995 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, val
);
3997 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, 0);
4003 proj
= isl_map_eliminate(proj
, isl_dim_in
, gen
->tile_first
+ pos
,
4004 gen
->shared_len
- (gen
->tile_first
+ pos
));
4005 for (i
= pos
; i
< n
; ++i
)
4006 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
+ 1, 0);
4011 /* Given the AST context schedule "schedule" and the mapping from
4012 * domains to the shared tile loops "shared_sched", add a schedule
4013 * for a synchronization operation at position "val" of loop level "pos".
4015 * schedule is of the form
4019 * (with D the iteration domains and L the already generated loops),
4020 * while shared_sched is of the form
4024 * We combine them into
4030 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4032 * and use the result as a schedule for "sync".
4034 static __isl_give isl_union_map
*add_sync_schedule(struct gpu_gen
*gen
,
4035 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4036 __isl_keep isl_union_map
*shared_sched
, int pos
, int val
)
4039 isl_map
*proj
, *map
;
4041 shared_sched
= isl_union_map_copy(shared_sched
);
4042 schedule
= isl_union_map_copy(schedule
);
4044 space
= isl_union_map_get_space(shared_sched
);
4045 schedule
= isl_union_map_apply_domain(shared_sched
, schedule
);
4046 map
= isl_map_from_union_map(schedule
);
4048 proj
= insert_even(gen
, space
, pos
, val
);
4049 map
= isl_map_apply_range(map
, proj
);
4050 map
= isl_map_from_range(isl_map_wrap(map
));
4051 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "sync");
4053 res
= isl_union_map_add_map(res
, map
);
4058 /* Given the AST context schedule "schedule" and the mapping from
4059 * domains to the shared tile loops "shared_sched", add a schedule
4060 * for copying an array reference group to/from shared/private memory.
4061 * "read" is set if data should be copied from global memory
4062 * to shared/private memory.
4063 * "k" represents the current group
4064 * "s" is the total number of groups
4066 * We schedule an operation before or after the innermost loop
4067 * of "shared_sched" that affects the tile of the array reference group.
4069 * schedule is of the form
4073 * (with D the iteration domains and L the already generated loops),
4074 * while shared_sched is of the form
4078 * We first compute the access relation for the reference group
4082 * and combine it with shared_sched into
4086 * If this results in an empty relation, no copying needs to be performed
4088 * Otherwise, we invert the relation and combine it with "schedule" into
4092 * The actual additional piece of the schedule is obtained from combining
4098 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4100 * The position of "val" corresponds to the innermost loop that affects
4101 * the tile and the value indicates where the copying is scheduled
4102 * with respect to the actual kernel code (at value 0).
4103 * Reads are schedule before the code, writes to global memory from
4104 * private memory are scheduled at values 1 to s, writes to global
4105 * memory from shared memory are scheduled at values s + 2 to 2 * s + 1.
4107 * If we are scheduling a read from global memory to shared memory,
4108 * we insert a synchronization before the kernel code (at the innermost
4110 * If we are scheduling a write to global memory, then we add
4111 * a synchronization after all writes (at value 2 *s + 2).
4112 * However, there is no need for a synchronization after the outermost loop.
4113 * A write to global memory from private memory at the innermost level
4114 * does not require a synchronization, because it is covered by
4115 * the synchronization after the kernel inserted by body_schedule.
4117 static __isl_give isl_union_map
*add_group_schedule(struct gpu_gen
*gen
,
4118 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4119 __isl_keep isl_union_map
*shared_sched
,
4120 struct gpu_array_ref_group
*group
, int read
, int k
, int s
)
4125 isl_union_map
*access
;
4126 isl_map
*map
, *proj
, *access_map
;
4129 access
= group_access_relation(group
, read
, !read
);
4130 access
= isl_union_map_range_product(isl_union_map_copy(shared_sched
),
4133 if (isl_union_map_is_empty(access
)) {
4134 isl_union_map_free(access
);
4138 access
= isl_union_map_reverse(access
);
4139 access
= isl_union_map_apply_range(access
,
4140 isl_union_map_copy(schedule
));
4141 access_map
= isl_map_from_union_map(access
);
4143 space
= isl_space_copy(group
->array
->dim
);
4144 space
= isl_space_from_range(space
);
4145 space
= isl_space_add_dims(space
, isl_dim_in
, gen
->shared_len
);
4146 map
= isl_map_domain_map(isl_map_universe(space
));
4148 space
= isl_union_map_get_space(schedule
);
4149 pos
= group
->last_shared
+ 1 - gen
->tile_first
;
4153 else if (group
->private_tile
)
4156 val
= 1 + s
+ 1 + k
;
4157 proj
= insert_even(gen
, space
, pos
, val
);
4158 map
= isl_map_apply_range(map
, proj
);
4160 access_map
= isl_map_range_product(access_map
, map
);
4162 id
= isl_id_alloc(gen
->ctx
, read
? "read" : "write", group
);
4163 access_map
= isl_map_set_tuple_id(access_map
, isl_dim_in
, id
);
4165 res
= isl_union_map_add_map(res
, access_map
);
4167 n
= gen
->shared_len
- gen
->tile_first
;
4169 if (!group
->private_tile
)
4170 res
= add_sync_schedule(gen
, res
, schedule
,
4171 shared_sched
, n
, -1);
4175 if (pos
== n
&& group
->private_tile
)
4177 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4184 /* Return a schedule for the shared tile loops based on the current
4185 * AST context schedule.
4187 * We create a "shared_sched" that maps the domains to the first
4188 * shared_len dimensions of the computed schedule, project out the
4189 * first tile_first dimensions (as these are already covered by
4190 * the host code) and insert "statement-level" dimensions at even
4191 * positions so that we can schedule copy blocks and synchronization
4192 * before/after each level.
4194 * In particular, copy blocks are inserted inside the innermost
4195 * level that affect the tile. For the copying to global memory,
4196 * those from private memory are scheduled before those from shared
4197 * memory such that synchronization can be inserted between the two
4198 * at the innermost level.
4199 * Synchronization is inserted at the innermost level before the
4200 * actual kernel code if there is any copying from global memory
4201 * to shared memory. It is inserted unconditionally at the innermost
4202 * level after the actual kernel code and the copying to global memory
4203 * from private memory (if any). Finally, it is inserted after
4204 * any copying to global memory, except at the outermost level
4205 * and at the innermost level if there is no copying from shared
4206 * memory. The copying from private memory is covered by the unconditional
4207 * synchronization at the innermost level.
4209 static __isl_give isl_union_map
*body_schedule(struct gpu_gen
*gen
,
4210 __isl_take isl_union_map
*schedule
)
4214 isl_union_map
*shared_sched
;
4215 isl_union_map
*sched
;
4216 isl_map
*proj
, *map
;
4219 shared_sched
= isl_union_map_copy(gen
->tiled_sched
);
4220 proj
= projection(isl_union_map_get_space(shared_sched
),
4221 gen
->tiled_len
, gen
->shared_len
);
4222 shared_sched
= isl_union_map_apply_range(shared_sched
,
4223 isl_union_map_from_map(proj
));
4224 space
= isl_union_map_get_space(shared_sched
);
4225 proj
= insert_even(gen
, space
, -1, 0);
4226 sched
= isl_union_map_apply_range(isl_union_map_copy(shared_sched
),
4227 isl_union_map_from_map(proj
));
4229 res
= isl_union_map_range_product(isl_union_map_copy(schedule
), sched
);
4232 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
4233 s
+= gen
->prog
->array
[i
].n_group
;
4236 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4237 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
4239 for (j
= 0; j
< array
->n_group
; ++j
) {
4240 struct gpu_array_ref_group
*group
;
4242 group
= array
->groups
[j
];
4243 if (!group
->private_tile
&& !group
->shared_tile
)
4245 res
= add_group_schedule(gen
, res
, schedule
,
4246 shared_sched
, group
, 0, k
, s
);
4247 res
= add_group_schedule(gen
, res
, schedule
,
4248 shared_sched
, group
, 1, k
, s
);
4253 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4254 gen
->shared_len
- gen
->tile_first
, 1 + s
);
4256 isl_union_map_free(shared_sched
);
4257 isl_union_map_free(schedule
);
4262 /* Generate code for "kernel" in the given "context".
4264 * We first generate code for the shared tile loops (T1T, T1P and T2)
4265 * in a context that includes the block ids.
4266 * Within each iteration of these loops an additional code generation
4267 * is performed (within create_kernel_leaf) for the rest of the schedule
4268 * in a context that includes the thread ids.
4270 static __isl_give isl_ast_node
*generate_kernel(struct gpu_gen
*gen
,
4271 __isl_keep isl_ast_build
*build
, __isl_keep isl_set
*host_domain
,
4272 __isl_keep isl_multi_pw_aff
*grid_size
)
4276 isl_id_list
*iterators
;
4277 isl_union_map
*schedule
;
4281 schedule
= isl_ast_build_get_schedule(build
);
4283 build
= isl_ast_build_copy(build
);
4284 build
= isl_ast_build_restrict(build
, isl_set_copy(host_domain
));
4285 space
= isl_ast_build_get_schedule_space(build
);
4286 set
= isl_set_universe(isl_space_copy(space
));
4287 set
= add_bounded_parameters_dynamic(set
, grid_size
, "b");
4288 build
= isl_ast_build_restrict(build
, set
);
4290 schedule
= body_schedule(gen
, schedule
);
4292 sched_len
= 2 * (gen
->shared_len
- gen
->tile_first
) + 1;
4294 build
= set_atomic_and_unroll(build
, space
, sched_len
);
4295 iterators
= generate_names(gen
->ctx
, sched_len
, "g");
4296 build
= isl_ast_build_set_iterators(build
, iterators
);
4297 build
= isl_ast_build_set_create_leaf(build
, &create_kernel_leaf
, gen
);
4298 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
4299 isl_ast_build_free(build
);
4304 /* Attach "id" to the given node.
4306 static __isl_give isl_ast_node
*attach_id(__isl_take isl_ast_node
*node
,
4307 __isl_keep isl_ast_build
*build
, void *user
)
4311 node
= isl_ast_node_set_annotation(node
, id
);
4316 /* Construct an AST node for performing a kernel launch and attach
4317 * the information about the kernel to that node.
4319 * The kernel AST has been constructed in the context of the range
4320 * of "schedule". In particular, the grid size has been computed
4321 * in the context. We therefore still need to make sure that these
4322 * constraints are expressed in the code. We do this by creating a schedule
4324 * kernel[] -> [S -> []]
4326 * where S is the schedule domain, i.e., the range of "schedule".
4327 * The AST generation will then create a single call surrounded by
4328 * all the condition in "S" that have not been expressed yet.
4330 * The kernel information is attached to this node in attach_id.
4332 static __isl_give isl_ast_node
*construct_launch(
4333 __isl_take isl_ast_build
*build
, __isl_take isl_union_map
*schedule
,
4334 __isl_take
struct ppcg_kernel
*kernel
)
4338 isl_union_set
*domain
;
4343 ctx
= isl_ast_build_get_ctx(build
);
4345 id
= isl_id_alloc(ctx
, NULL
, kernel
);
4346 id
= isl_id_set_free_user(id
, &ppcg_kernel_free
);
4348 domain
= isl_union_map_range(schedule
);
4349 set
= isl_set_from_union_set(domain
);
4350 map
= isl_map_from_domain(set
);
4351 map
= isl_map_from_range(isl_map_wrap(map
));
4352 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "kernel");
4353 schedule
= isl_union_map_from_map(map
);
4355 build
= isl_ast_build_set_at_each_domain(build
, &attach_id
, id
);
4356 node
= isl_ast_build_ast_from_schedule(build
, schedule
);
4357 isl_ast_build_free(build
);
4362 /* This function is called for each leaf in the AST of the host code.
4363 * We first specialize the schedule to the site of the leaf, compute
4364 * the size of shared memory and then construct the body of host code
4365 * and the associated kernel.
4367 * The necessary information for printing the kernel launch is
4368 * stored in a struct ppcg_kernel and attached to the leaf node
4369 * created to represent the launch.
4371 static __isl_give isl_ast_node
*create_host_leaf(
4372 __isl_take isl_ast_build
*build
, void *user
)
4374 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4377 struct ppcg_kernel
*kernel
;
4378 isl_set
*host_domain
;
4379 isl_union_map
*schedule
;
4380 isl_union_map
*local_sched
;
4381 isl_union_map
*access
;
4382 isl_union_set
*domain
;
4385 schedule
= isl_ast_build_get_schedule(build
);
4387 isl_union_map_foreach_map(schedule
, &extract_tile_len
, gen
);
4390 domain
= isl_union_map_domain(isl_union_map_copy(schedule
));
4392 local_sched
= isl_union_map_copy(gen
->sched
);
4393 local_sched
= isl_union_map_intersect_domain(local_sched
, domain
);
4394 access
= isl_union_map_union(isl_union_map_copy(gen
->prog
->read
),
4395 isl_union_map_copy(gen
->prog
->write
));
4396 access
= isl_union_map_apply_domain(access
,
4397 isl_union_map_copy(local_sched
));
4399 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
4400 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
4401 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
4403 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
4404 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
4405 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
4407 kernel
= gen
->kernel
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel
);
4411 kernel
->id
= gen
->kernel_id
++;
4412 kernel
->context
= isl_union_map_params(isl_union_map_copy(schedule
));
4413 kernel
->grid_size
= extract_grid_size(gen
, kernel
);
4414 extract_block_size(gen
, kernel
);
4415 kernel
->arrays
= isl_union_map_range(access
);
4416 kernel
->space
= isl_ast_build_get_schedule_space(build
);
4418 gen
->private_access
= NULL
;
4419 compute_shared_sched(gen
);
4420 gen
->privatization
= compute_privatization(gen
);
4421 group_references(gen
);
4422 compute_private_access(gen
);
4423 check_shared_memory_bound(gen
);
4424 host_domain
= isl_set_from_union_set(isl_union_map_range(
4425 isl_union_map_copy(schedule
)));
4426 localize_bounds(gen
, kernel
, host_domain
);
4428 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
4430 kernel
->tree
= generate_kernel(gen
, build
, host_domain
,
4432 create_kernel_vars(gen
, kernel
);
4434 free_local_array_info(gen
);
4435 isl_map_free(gen
->privatization
);
4436 isl_union_map_free(gen
->private_access
);
4437 isl_union_map_free(gen
->local_sched
);
4438 isl_union_map_free(gen
->tiled_sched
);
4439 isl_union_map_free(gen
->shared_sched
);
4440 isl_union_map_free(gen
->shared_proj
);
4441 isl_set_free(host_domain
);
4442 free(gen
->tile_size
);
4444 node
= construct_launch(build
, schedule
, kernel
);
4448 isl_union_map_free(schedule
);
4452 /* Use isl to generate code for the outer gen->tile_first loops
4453 * of the global schedule in gen->sched, resulting in the host code.
4454 * Within each iteration of this partial schedule, i.e., for each kernel
4455 * launch, create_host_leaf takes care of generating the kernel code.
4457 static __isl_give isl_ast_node
*generate_host_code(struct gpu_gen
*gen
)
4459 isl_ast_build
*build
;
4461 isl_union_map
*sched
;
4463 isl_id_list
*iterators
;
4465 sched
= isl_union_map_copy(gen
->sched
);
4466 proj
= projection(isl_union_map_get_space(sched
),
4467 gen
->untiled_len
, gen
->tile_first
);
4468 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
4470 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 1);
4471 build
= isl_ast_build_from_context(isl_set_copy(gen
->prog
->context
));
4472 iterators
= generate_names(gen
->ctx
, gen
->tile_first
, "h");
4473 build
= isl_ast_build_set_iterators(build
, iterators
);
4474 build
= isl_ast_build_set_create_leaf(build
, &create_host_leaf
, gen
);
4475 tree
= isl_ast_build_ast_from_schedule(build
, sched
);
4476 isl_ast_build_free(build
);
4481 __isl_give isl_union_map
*extract_sizes_from_str(isl_ctx
*ctx
, const char *str
)
4485 return isl_union_map_read_from_str(ctx
, str
);
4488 /* Information about the outermost tilable bands in the forest of bands.
4490 * tile_len and n_parallel are only sets on band_info structures
4491 * that correspond to outermost bands. For other bands (in particular,
4492 * ancestors of the outermost bands), n_parallal is set to 0.
4494 * prefix is the (padded) schedule leading up to the outermost tilable bands.
4496 * tile_first is the number of schedule dimensions in prefix.
4498 * suffix is the schedule of the outermost tilable bands and their descendants.
4501 struct gpu_gen
*gen
;
4505 isl_union_map
*prefix
;
4506 isl_union_map
*suffix
;
4509 /* Set tile_len and n_parallel of the statement to that of
4510 * their outermost band, recorded in the band_info.
4512 static int set_stmt_tile_len(__isl_take isl_map
*map
, void *user
)
4514 struct band_info
*info
= user
;
4515 struct gpu_stmt
*stmt
;
4518 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
4519 stmt
= find_stmt(info
->gen
->prog
, id
);
4522 stmt
->tile_len
= info
->tile_len
;
4523 stmt
->n_parallel
= info
->n_parallel
;
4530 static void list_select_outer_band(struct gpu_gen
*gen
,
4531 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
);
4533 /* Check if this band has any parallel loops. If so, take it as
4534 * the outermost tilable band. If not, continue looking for the
4535 * outermost tilable band in the children of the current band.
4537 static void band_select_outer_band(struct gpu_gen
*gen
,
4538 __isl_take isl_band
*band
, int pos
, struct band_info
*info
)
4540 int n
= isl_band_n_member(band
);
4543 for (n_parallel
= 0; n_parallel
< n
; ++n_parallel
)
4544 if (!isl_band_member_is_zero_distance(band
, n_parallel
))
4547 info
->n_parallel
= n_parallel
;
4550 info
->tile_first
= pos
;
4552 info
->prefix
= isl_band_get_prefix_schedule(band
);
4553 info
->suffix
= isl_union_map_flat_range_product(
4554 isl_band_get_partial_schedule(band
),
4555 isl_band_get_suffix_schedule(band
));
4556 isl_union_map_foreach_map(info
->prefix
,
4557 &set_stmt_tile_len
, info
);
4558 } else if (isl_band_has_children(band
)) {
4559 isl_band_list
*children
;
4560 children
= isl_band_get_children(band
);
4561 list_select_outer_band(gen
, children
, pos
+ n
, info
);
4564 info
->tile_first
= pos
+ n
;
4566 info
->prefix
= isl_union_map_flat_range_product(
4567 isl_band_get_prefix_schedule(band
),
4568 isl_band_get_partial_schedule(band
));
4569 info
->suffix
= isl_band_get_suffix_schedule(band
);
4570 isl_union_map_foreach_map(info
->prefix
,
4571 &set_stmt_tile_len
, info
);
4574 isl_band_free(band
);
4577 /* Comparison function that returns a non-zero value for band_infos
4578 * with different tile_len fields or different n_parallel fields.
4580 static int cmp_band(const void *p1
, const void *p2
)
4582 const struct band_info
*info1
= p1
;
4583 const struct band_info
*info2
= p2
;
4585 if (info1
->tile_len
!= info2
->tile_len
)
4586 return info1
->tile_len
- info2
->tile_len
;
4588 return info1
->n_parallel
- info2
->n_parallel
;
4591 /* Extend "umap" with coordinates with fixed value "val"
4592 * to a total length of "dst_len", assuming the original dimension is "src_len".
4594 static __isl_give isl_union_map
*extend_range(
4595 __isl_take isl_union_map
*umap
, int src_len
, int dst_len
, int val
)
4601 dim
= isl_union_map_get_space(umap
);
4602 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
4603 for (i
= src_len
; i
< dst_len
; ++i
)
4604 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
4606 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
4611 /* Group bands with the same values for tile_len and n_parallel.
4612 * The prefix schedule is then extended with a fixed coordinate that
4613 * is different for each such group.
4614 * Note that the actual values for this coordinate are not important.
4615 * The bands have already been effectively separated at a higher level
4616 * or they are independent and may be executed in parallel.
4617 * The list of band_info has been sorted before this functions is called.
4619 static void separate_bands(struct band_info
*info
, int n
)
4624 for (i
= 0; i
< n
; ++i
) {
4625 int l
= info
[i
].tile_first
;
4628 (info
[i
].tile_len
!= info
[i
- 1].tile_len
||
4629 info
[i
].n_parallel
!= info
[i
- 1].n_parallel
))
4632 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4634 info
[i
].tile_first
= l
+ 1;
4638 /* Select the outermost bands in the elements of the list, align
4639 * their prefix schedules, separate bands with different values
4640 * for tile_len and/or n_parallel and then combine the resulting
4641 * prefix and suffix schedules into a single pair of prefix and
4642 * suffix schedules for the entire list.
4644 static void list_select_outer_band(struct gpu_gen
*gen
,
4645 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
)
4649 int n
= isl_band_list_n_band(list
);
4650 isl_ctx
*ctx
= isl_band_list_get_ctx(list
);
4651 struct band_info
*info
;
4653 isl_union_map
*prefix
;
4654 isl_union_map
*suffix
;
4657 info
= isl_calloc_array(ctx
, struct band_info
, n
);
4661 for (i
= 0; i
< n
; ++i
) {
4662 band
= isl_band_list_get_band(list
, i
);
4663 band_select_outer_band(gen
, band
, pos
, &info
[i
]);
4664 if (info
[i
].tile_first
> max_tile_first
)
4665 max_tile_first
= info
[i
].tile_first
;
4668 for (i
= 0; i
< n
; ++i
) {
4669 if (info
[i
].tile_first
== max_tile_first
)
4671 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4672 info
[i
].tile_first
, max_tile_first
, 0);
4673 info
[i
].tile_first
= max_tile_first
;
4676 qsort(info
, n
, sizeof(struct band_info
), &cmp_band
);
4678 for (i
= 0; i
< n
- 1; ++i
)
4679 if (info
[i
].tile_len
!= info
[i
+ 1].tile_len
||
4680 info
[i
].n_parallel
!= info
[i
+ 1].n_parallel
)
4684 separate_bands(info
, n
);
4686 prefix
= info
[0].prefix
;
4687 suffix
= info
[0].suffix
;
4689 for (i
= 1; i
< n
; ++i
) {
4690 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
4691 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
4694 list_info
->tile_first
= info
[0].tile_first
;
4695 list_info
->tile_len
= -1;
4696 list_info
->prefix
= prefix
;
4697 list_info
->suffix
= suffix
;
4699 isl_band_list_free(list
);
4703 /* Select the outermost tilable band that (by construction)
4704 * has at least one parallel loop.
4705 * The starting position of the aligned band is stored in the pair
4707 * The sizes and number of parallel loops may be different in different
4708 * parts of the band forest and are therefore stored in the gpu_stmts.
4710 * Return the complete schedule, with the tilable bands aligned
4711 * at gen->tile_first and padded with zero, if needed.
4713 static __isl_give isl_union_map
*select_outer_tilable_band(struct gpu_gen
*gen
,
4714 __isl_keep isl_schedule
*schedule
)
4716 isl_band_list
*list
;
4717 struct band_info info
;
4719 gen
->n_parallel
= 0;
4722 list
= isl_schedule_get_band_forest(schedule
);
4724 list_select_outer_band(gen
, list
, 0, &info
);
4726 gen
->tile_first
= info
.tile_first
;
4727 info
.suffix
= align_range(info
.suffix
);
4729 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
4732 /* Set gen->untiled_len to the number of scheduling dimensions
4733 * for the schedule of the first domain.
4734 * We assume here that this number is the same for all domains.
4736 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
4738 unsigned *untiled_len
= user
;
4740 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
4746 /* Compute an appropriate schedule based on the accesses in
4747 * gen->read and gen->write.
4749 * We use the dependences in gen->prog->scop to compute
4750 * a schedule that has a parallel loop in each tilable band.
4751 * Finally, we select the outermost tilable band.
4753 static void compute_schedule(struct gpu_gen
*gen
)
4755 isl_union_set
*domain
;
4756 isl_union_map
*dep_raw
, *dep
;
4757 isl_union_map
*sched
;
4758 isl_schedule
*schedule
;
4760 dep_raw
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
4762 dep
= isl_union_map_copy(gen
->prog
->scop
->dep_false
);
4763 dep
= isl_union_map_union(dep
, dep_raw
);
4764 dep
= isl_union_map_coalesce(dep
);
4766 domain
= isl_union_set_copy(gen
->prog
->scop
->domain
);
4767 domain
= isl_union_set_intersect_params(domain
,
4768 isl_set_copy(gen
->prog
->scop
->context
));
4769 schedule
= isl_union_set_compute_schedule(isl_union_set_copy(domain
),
4770 isl_union_map_copy(dep
), dep
);
4771 if (gen
->options
->debug
->dump_schedule
)
4772 isl_schedule_dump(schedule
);
4774 sched
= select_outer_tilable_band(gen
, schedule
);
4776 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
4777 sched
= isl_union_map_intersect_domain(sched
, domain
);
4780 isl_schedule_free(schedule
);
4783 /* Compute the sets of array elements that need to be copied in and out.
4785 * In particular, for each array that is written anywhere in gen->prog and
4786 * that is visible outside the corresponding scop, we copy out its entire
4789 * Any array elements that is read without first being written needs
4790 * to be copied in. Furthermore, if there are any array elements that
4791 * are copied out, but that are not written inside gen->prog, then
4792 * they also need to be copied in to ensure that the value after execution
4793 * is the same as the value before execution.
4794 * While computing the set of array elements that
4795 * are copied out but not written, we intersect both sets with the context.
4796 * This helps in those cases where the arrays are declared with a fixed size,
4797 * while the accesses are parametric and the context assigns a fixed value
4798 * to the parameters.
4800 static void compute_copy_in_and_out(struct gpu_gen
*gen
)
4803 isl_union_set
*write
;
4804 isl_union_set
*copy_in
, *copy_out
;
4805 isl_union_set
*not_written
;
4806 isl_union_map
*uninitialized
;
4808 write
= isl_union_map_range(isl_union_map_copy(gen
->prog
->write
));
4809 write
= isl_union_set_intersect_params(write
,
4810 isl_set_copy(gen
->prog
->context
));
4811 copy_out
= isl_union_set_empty(isl_union_set_get_space(write
));
4813 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4818 if (gen
->prog
->array
[i
].local
)
4821 space
= isl_space_copy(gen
->prog
->array
[i
].dim
);
4822 write_i
= isl_union_set_extract_set(write
, space
);
4823 empty
= isl_set_fast_is_empty(write_i
);
4824 isl_set_free(write_i
);
4828 write_i
= isl_set_copy(gen
->prog
->array
[i
].extent
);
4829 copy_out
= isl_union_set_add_set(copy_out
, write_i
);
4832 copy_out
= isl_union_set_intersect_params(copy_out
,
4833 isl_set_copy(gen
->prog
->context
));
4835 gen
->prog
->copy_out
= isl_union_set_copy(copy_out
);
4837 uninitialized
= isl_union_map_copy(gen
->prog
->scop
->live_in
);
4838 copy_in
= isl_union_map_range(uninitialized
);
4840 not_written
= isl_union_set_subtract(copy_out
, write
);
4841 copy_in
= isl_union_set_union(copy_in
, not_written
);
4842 gen
->prog
->copy_in
= copy_in
;
4845 static struct gpu_stmt_access
**expr_extract_access(struct pet_expr
*expr
,
4846 struct gpu_stmt_access
**next_access
)
4848 struct gpu_stmt_access
*access
;
4849 isl_ctx
*ctx
= isl_map_get_ctx(expr
->acc
.access
);
4851 access
= isl_alloc_type(ctx
, struct gpu_stmt_access
);
4853 access
->next
= NULL
;
4854 access
->read
= expr
->acc
.read
;
4855 access
->write
= expr
->acc
.write
;
4856 access
->access
= isl_map_copy(expr
->acc
.access
);
4858 *next_access
= access
;
4859 next_access
= &(*next_access
)->next
;
4863 static struct gpu_stmt_access
**expr_extract_accesses(struct pet_expr
*expr
,
4864 struct gpu_stmt_access
**next_access
)
4868 for (i
= 0; i
< expr
->n_arg
; ++i
)
4869 next_access
= expr_extract_accesses(expr
->args
[i
],
4872 if (expr
->type
== pet_expr_access
)
4873 next_access
= expr_extract_access(expr
, next_access
);
4878 static void pet_stmt_extract_accesses(struct gpu_stmt
*stmt
)
4880 struct gpu_stmt_access
**next_access
= &stmt
->accesses
;
4882 stmt
->accesses
= NULL
;
4883 expr_extract_accesses(stmt
->body
, next_access
);
4886 /* Return an array of gpu_stmt representing the statements in "scop".
4888 static struct gpu_stmt
*extract_stmts(isl_ctx
*ctx
, struct ppcg_scop
*scop
,
4889 __isl_keep isl_set
*context
)
4892 struct gpu_stmt
*stmts
;
4894 stmts
= isl_calloc_array(ctx
, struct gpu_stmt
, scop
->n_stmt
);
4897 for (i
= 0; i
< scop
->n_stmt
; ++i
) {
4898 struct gpu_stmt
*s
= &stmts
[i
];
4900 s
->id
= isl_set_get_tuple_id(scop
->stmts
[i
]->domain
);
4901 s
->body
= scop
->stmts
[i
]->body
;
4902 pet_stmt_extract_accesses(s
);
4908 /* Replace the scop in the "input" file by equivalent code
4909 * that uses the GPU. "scop" is assumed to correspond to this scop.
4911 * We first compute a schedule that respects the dependences
4912 * of the original program and select the outermost band
4913 * of tilable dimensions that has at least one parallel loop.
4914 * We then have three blocks of dimensions
4918 * The tilable band "B" is first tiled according to "tile" sizes, resulting
4923 * For each iteration of the T loop and for each array, we compute
4924 * the array elements accessed by that iteration, construct a rectangular
4925 * box around it and shift it to the origin. The result is used
4926 * as shared memory for the array.
4928 * We then split off at most 2 parallel loops from the T loops and
4929 * at most 3 parallel loops from the P loops
4933 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
4934 * according to "grid"/"block" sizes.
4936 * H T1T T1P T2 P1T P1P P2 G
4938 * Finally, the T1P and P1P iterators are equated to the block and
4939 * thread dimensions respectively and so are effectively removed.
4940 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
4941 * are run on the GPU.
4943 * Code is generated in three stages. We first generate code for the
4944 * host (the H loops), with iterators h%d. Then, for each leaf node
4945 * of the resulting AST, we generate code for the shared loops (up to
4946 * and including T2), with iterators g%d and after equating the H loops
4947 * to h%d parameters and the T1P loops to the block dimensions.
4948 * Finally, we generate code for the remaining loops in a similar fashion.
4950 __isl_give isl_ast_node
*generate_gpu(isl_ctx
*ctx
, struct gpu_prog
*prog
,
4951 struct ppcg_options
*options
)
4953 isl_union_map
*sched
;
4962 gen
.sizes
= extract_sizes_from_str(ctx
, options
->sizes
);
4963 gen
.options
= options
;
4965 compute_schedule(&gen
);
4966 compute_copy_in_and_out(&gen
);
4969 tree
= generate_host_code(&gen
);
4971 clear_gpu_gen(&gen
);
4976 struct gpu_prog
*gpu_prog_alloc(isl_ctx
*ctx
, struct ppcg_scop
*scop
)
4978 struct gpu_prog
*prog
;
4983 prog
= isl_calloc_type(ctx
, struct gpu_prog
);
4988 prog
->context
= isl_set_copy(scop
->context
);
4989 prog
->n_stmts
= scop
->n_stmt
;
4990 prog
->stmts
= extract_stmts(ctx
, scop
, prog
->context
);
4991 prog
->read
= isl_union_map_copy(scop
->reads
);
4992 prog
->write
= isl_union_map_copy(scop
->writes
);
4994 collect_array_info(prog
);
4999 void gpu_prog_free(struct gpu_prog
*prog
)
5003 free_array_info(prog
);
5004 free_stmts(prog
->stmts
, prog
->n_stmts
);
5005 isl_union_set_free(prog
->copy_in
);
5006 isl_union_set_free(prog
->copy_out
);
5007 isl_union_map_free(prog
->read
);
5008 isl_union_map_free(prog
->write
);
5009 isl_set_free(prog
->context
);