2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012-2013 Ecole Normale Superieure
5 * Use of this software is governed by the MIT license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
17 #include <isl/polynomial.h>
18 #include <isl/union_set.h>
23 #include <isl/schedule.h>
24 #include <isl/options.h>
25 #include <isl/ast_build.h>
30 #include "ppcg_options.h"
33 /* The fields stride, shift and shift_map only contain valid information
35 * If so, they express that current index is such that if you add shift,
36 * then the result is always a multiple of stride.
37 * shift_map contains the mapping
39 * i -> (i + shift)/stride
41 * Let D represent the initial shared_len dimensions of the computed schedule.
42 * The spaces of "lb" and "shift" are of the form
46 * "shift_map" is of the form
48 * [D -> i] -> [D -> (i + shift(D))/stride]
50 struct gpu_array_bound
{
56 isl_basic_map
*shift_map
;
59 /* A tile of an array.
61 * n is the dimension of the array.
62 * bound is an array of size "n" representing the lower bound
63 * and size for each index.
65 * tiling maps a tile in the global array to the correspondin
66 * shared/private memory tile and is of the form
68 * { [D[i] -> A[a]] -> T[(a + shift(i))/stride - lb(i)] }
70 * where D represents the initial shared_len dimensions
71 * of the computed schedule.
73 struct gpu_array_tile
{
75 struct gpu_array_bound
*bound
;
76 isl_multi_aff
*tiling
;
79 struct gpu_array_info
;
81 /* A group of array references in a kernel that should be handled together.
82 * If private_tile is not NULL, then it is mapped to registers.
83 * Otherwise, if shared_tile is not NULL, it is mapped to shared memory.
84 * Otherwise, it is accessed from global memory.
86 struct gpu_array_ref_group
{
87 /* The references in this group access this array. */
88 struct gpu_array_info
*array
;
89 /* Position of this group in the list of reference groups of array. */
92 /* The following fields are use during the construction of the groups.
93 * access is the combined access relation relative to the shared
94 * memory tiling. In particular, the domain of the map corresponds
95 * to the first shared_len dimensions of the computed schedule.
96 * write is set if any access in the group is a write.
101 /* The shared memory tile, NULL if none. */
102 struct gpu_array_tile
*shared_tile
;
104 /* The private memory tile, NULL if none. */
105 struct gpu_array_tile
*private_tile
;
107 /* References in this group; point to elements of a linked list. */
109 struct gpu_stmt_access
**refs
;
111 /* Last shared memory tile dimension that affects tile of this group. */
117 struct ppcg_options
*options
;
119 /* Callback for printing of AST in appropriate format. */
120 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
121 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
125 struct gpu_prog
*prog
;
126 /* The generated AST. */
129 /* tile, grid and block sizes for each kernel */
130 isl_union_map
*sizes
;
132 /* Identifier of current kernel. */
134 /* Pointer to the current kernel. */
135 struct ppcg_kernel
*kernel
;
136 /* Does the computed schedule exhibit any parallelism? */
139 /* First tile dimension. */
141 /* Number of tile dimensions. */
143 /* Number of initial parallel loops among tile dimensions. */
146 /* Number of dimensions determining shared memory. */
149 /* Number of rows in the untiled schedule. */
151 /* Number of rows in the tiled schedule. */
153 /* Number of rows in schedule after tiling/wrapping over threads. */
154 int thread_tiled_len
;
156 /* Global untiled schedule. */
157 isl_union_map
*sched
;
158 /* Local (per kernel launch) tiled schedule. */
159 isl_union_map
*tiled_sched
;
160 /* Local schedule per shared memory tile loop iteration. */
161 isl_union_map
*local_sched
;
163 /* Local tiled schedule projected onto the shared tile loops and
164 * the loops that will be wrapped over the threads,
165 * with all shared tile loops parametrized.
167 isl_union_map
*shared_sched
;
168 /* Projects out the loops that will be wrapped over the threads
171 isl_union_map
*shared_proj
;
173 /* A map that takes the range of shared_sched as input,
174 * wraps the appropriate loops over the threads and then projects
177 isl_map
*privatization
;
179 /* A map from the shared memory tile loops and the thread indices
180 * (as parameters) to the set of accessed memory elements that
181 * will be accessed through private copies.
183 isl_union_map
*private_access
;
185 /* The schedule for the current private/shared access
186 * (within print_private_access or print_shared_access).
189 /* The array reference group corresponding to copy_sched. */
190 struct gpu_array_ref_group
*copy_group
;
192 /* First loop to unroll (or -1 if none) in the current part of the
199 /* Note: in the input file, the sizes of the grid and the blocks
200 * are specified in the order x, y, z, but internally, the sizes
201 * are stored in reverse order, so that the last element always
202 * refers to the x dimension.
209 /* Print the name of the local copy of a given group of array references.
211 static __isl_give isl_printer
*print_array_name(__isl_take isl_printer
*p
,
212 struct gpu_array_ref_group
*group
)
216 if (group
->private_tile
)
217 p
= isl_printer_print_str(p
, "private_");
218 else if (group
->shared_tile
)
219 p
= isl_printer_print_str(p
, "shared_");
222 p
= isl_printer_print_str(p
, group
->array
->name
);
223 if (!global
&& group
->array
->n_group
> 1) {
224 p
= isl_printer_print_str(p
, "_");
225 p
= isl_printer_print_int(p
, group
->nr
);
231 /* Collect all references to the given array and store pointers to them
234 static void collect_references(struct gpu_prog
*prog
,
235 struct gpu_array_info
*array
)
241 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
242 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
243 struct gpu_stmt_access
*access
;
245 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
247 name
= isl_map_get_tuple_name(access
->access
,
249 if (name
&& !strcmp(array
->name
, name
))
255 array
->refs
= isl_alloc_array(prog
->ctx
, struct gpu_stmt_access
*, n
);
259 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
260 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
261 struct gpu_stmt_access
*access
;
263 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
265 name
= isl_map_get_tuple_name(access
->access
,
267 if (!name
|| strcmp(array
->name
, name
))
270 array
->refs
[n
++] = access
;
275 /* Create a gpu_array_tile for an array of dimension "n_index".
277 static struct gpu_array_tile
*create_tile(isl_ctx
*ctx
, int n_index
)
280 struct gpu_array_tile
*tile
;
282 tile
= isl_calloc_type(ctx
, struct gpu_array_tile
);
287 tile
->bound
= isl_alloc_array(ctx
, struct gpu_array_bound
, n_index
);
290 for (i
= 0; i
< n_index
; ++i
) {
291 tile
->bound
[i
].size
= NULL
;
292 tile
->bound
[i
].lb
= NULL
;
293 tile
->bound
[i
].stride
= NULL
;
294 tile
->bound
[i
].shift
= NULL
;
295 tile
->bound
[i
].shift_map
= NULL
;
301 static void *free_tile(struct gpu_array_tile
*tile
)
308 for (j
= 0; j
< tile
->n
; ++j
) {
309 isl_val_free(tile
->bound
[j
].size
);
310 isl_val_free(tile
->bound
[j
].stride
);
311 isl_aff_free(tile
->bound
[j
].lb
);
312 isl_aff_free(tile
->bound
[j
].shift
);
313 isl_basic_map_free(tile
->bound
[j
].shift_map
);
316 isl_multi_aff_free(tile
->tiling
);
322 static struct pet_array
*find_array(struct ppcg_scop
*scop
,
323 __isl_keep isl_set
*accessed
)
328 id
= isl_set_get_tuple_id(accessed
);
330 for (i
= 0; i
< scop
->n_array
; ++i
) {
333 id_i
= isl_set_get_tuple_id(scop
->arrays
[i
]->extent
);
340 return i
< scop
->n_array
? scop
->arrays
[i
] : NULL
;
343 /* Compute and return the extent of "array", taking into account the set of
346 * In particular, the extent in the outer dimension is taken
347 * from "accessed", while then extent in the remaing dimensions
348 * are taken from array->extent.
350 * The extent in the outer dimension cannot be taken from array->extent
351 * because that may be unbounded. Furthermore, even if it is bounded,
352 * it may be larger than the piece of the array that is being accessed.
354 static __isl_give isl_set
*compute_extent(struct pet_array
*array
,
355 __isl_keep isl_set
*accessed
)
362 extent
= isl_set_copy(array
->extent
);
364 n_index
= isl_set_dim(accessed
, isl_dim_set
);
368 extent
= isl_set_project_out(extent
, isl_dim_set
, 0, 1);
369 outer
= isl_set_copy(accessed
);
370 outer
= isl_set_project_out(outer
, isl_dim_set
, 1, n_index
- 1);
371 extent
= isl_set_flat_product(outer
, extent
);
372 id
= isl_set_get_tuple_id(accessed
);
373 extent
= isl_set_set_tuple_id(extent
, id
);
378 /* Compute bounds on the host arrays based on the accessed elements
379 * and collect all references to the array.
381 * If the array is zero-dimensional, i.e., a scalar, we check
382 * whether it is read-only.
384 static int extract_array_info(__isl_take isl_set
*array
, void *user
)
387 struct gpu_prog
*prog
= (struct gpu_prog
*)user
;
391 struct pet_array
*pa
;
394 n_index
= isl_set_dim(array
, isl_dim_set
);
395 name
= isl_set_get_tuple_name(array
);
396 bounds
= isl_alloc_array(isl_set_get_ctx(array
),
397 isl_pw_aff
*, n_index
);
399 prog
->array
[prog
->n_array
].dim
= isl_set_get_space(array
);
400 prog
->array
[prog
->n_array
].name
= strdup(name
);
401 prog
->array
[prog
->n_array
].n_index
= n_index
;
402 prog
->array
[prog
->n_array
].bound
= bounds
;
404 pa
= find_array(prog
->scop
, array
);
407 prog
->array
[prog
->n_array
].type
= strdup(pa
->element_type
);
408 prog
->array
[prog
->n_array
].size
= pa
->element_size
;
409 prog
->array
[prog
->n_array
].local
= pa
->declared
&& !pa
->exposed
;
413 isl_union_map
*write
;
416 write
= isl_union_map_copy(prog
->write
);
417 space
= isl_set_universe(isl_set_get_space(array
));
418 write
= isl_union_map_intersect_range(write
,
419 isl_union_set_from_set(space
));
420 empty
= isl_union_map_is_empty(write
);
421 isl_union_map_free(write
);
423 prog
->array
[prog
->n_array
].read_only
= empty
;
426 extent
= compute_extent(pa
, array
);
427 for (i
= 0; i
< n_index
; ++i
) {
433 bound
= isl_set_dim_max(isl_set_copy(extent
), i
);
435 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
436 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
437 one
= isl_aff_zero_on_domain(ls
);
438 one
= isl_aff_add_constant_si(one
, 1);
439 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
440 bound
= isl_pw_aff_gist(bound
, isl_set_copy(prog
->context
));
444 prog
->array
[prog
->n_array
].extent
= extent
;
446 collect_references(prog
, &prog
->array
[prog
->n_array
]);
454 void collect_array_info(struct gpu_prog
*prog
)
456 isl_union_set
*arrays
;
458 arrays
= isl_union_map_range(isl_union_map_copy(prog
->read
));
459 arrays
= isl_union_set_union(arrays
,
460 isl_union_map_range(isl_union_map_copy(prog
->write
)));
461 arrays
= isl_union_set_coalesce(arrays
);
463 prog
->n_array
= isl_union_set_n_set(arrays
);
464 prog
->array
= isl_alloc_array(prog
->ctx
,
465 struct gpu_array_info
, prog
->n_array
);
468 isl_union_set_foreach_set(arrays
, &extract_array_info
, prog
);
469 isl_union_set_free(arrays
);
472 static void free_array_info(struct gpu_prog
*prog
)
476 for (i
= 0; i
< prog
->n_array
; ++i
) {
477 int n_index
= prog
->array
[i
].n_index
;
478 free(prog
->array
[i
].type
);
479 free(prog
->array
[i
].name
);
480 for (j
= 0; j
< n_index
; ++j
)
481 isl_pw_aff_free(prog
->array
[i
].bound
[j
]);
482 isl_space_free(prog
->array
[i
].dim
);
483 isl_set_free(prog
->array
[i
].extent
);
484 free(prog
->array
[i
].bound
);
485 free(prog
->array
[i
].refs
);
490 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
491 * as an array or through a pointer reference, but as single data element. At
492 * the moment, scalars are represented as zero dimensional arrays.
494 int gpu_array_is_scalar(struct gpu_array_info
*array
)
496 return (array
->n_index
== 0);
499 /* Is "array" a read-only scalar?
501 int gpu_array_is_read_only_scalar(struct gpu_array_info
*array
)
503 return gpu_array_is_scalar(array
) && array
->read_only
;
506 /* Internal data structure for extract_size_of_type.
507 * "type" specifies the name of the space that we want to extract.
508 * "res" is used to store the subset of that space.
510 struct ppcg_extract_size_data
{
515 /* This function is called for each set in a union_set.
516 * If the name of the set matches data->type, we store the
519 static int extract_size_of_type(__isl_take isl_set
*size
, void *user
)
521 struct ppcg_extract_size_data
*data
= user
;
524 name
= isl_set_get_tuple_name(size
);
525 if (name
&& !strcmp(name
, data
->type
)) {
534 /* Given a union map { kernel[i] -> *[...] },
535 * return the range in the space called "type" for the kernel with
536 * sequence number "id".
538 static __isl_give isl_set
*extract_sizes(__isl_keep isl_union_map
*sizes
,
539 const char *type
, int id
)
543 isl_union_set
*local_sizes
;
544 struct ppcg_extract_size_data data
= { type
, NULL
};
549 space
= isl_union_map_get_space(sizes
);
550 space
= isl_space_set_from_params(space
);
551 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
552 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
553 dom
= isl_set_universe(space
);
554 dom
= isl_set_fix_si(dom
, isl_dim_set
, 0, id
);
556 local_sizes
= isl_union_set_apply(isl_union_set_from_set(dom
),
557 isl_union_map_copy(sizes
));
558 isl_union_set_foreach_set(local_sizes
, &extract_size_of_type
, &data
);
559 isl_union_set_free(local_sizes
);
563 /* Given a singleton set, extract the first (at most *len) elements
564 * of the single integer tuple into *sizes and update *len if needed.
566 static void read_sizes_from_set(__isl_take isl_set
*set
, int *sizes
, int *len
)
574 dim
= isl_set_dim(set
, isl_dim_set
);
578 for (i
= 0; i
< *len
; ++i
) {
581 v
= isl_set_plain_get_val_if_fixed(set
, isl_dim_set
, i
);
584 sizes
[i
] = isl_val_get_num_si(v
);
591 /* Extract user specified "tile" sizes from the "sizes" command line option,
592 * defaulting to option->tile_size in each dimension.
594 static void read_tile_sizes(struct gpu_gen
*gen
)
599 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, gen
->tile_len
);
600 assert(gen
->tile_size
);
601 for (n
= 0; n
< gen
->tile_len
; ++n
)
602 gen
->tile_size
[n
] = gen
->options
->tile_size
;
604 size
= extract_sizes(gen
->sizes
, "tile", gen
->kernel_id
);
605 read_sizes_from_set(size
, gen
->tile_size
, &gen
->tile_len
);
607 if (gen
->n_parallel
> gen
->tile_len
)
608 gen
->n_parallel
= gen
->tile_len
;
611 /* Extract user specified "block" sizes from the "sizes" command line option,
612 * after filling in some potentially useful defaults.
614 static void read_block_sizes(struct gpu_gen
*gen
)
620 gen
->n_block
= (n
<= 3) ? n
: 3;
621 switch (gen
->n_block
) {
623 gen
->block_dim
[0] = 512;
626 gen
->block_dim
[0] = 32;
627 gen
->block_dim
[1] = 16;
630 gen
->block_dim
[0] = 32;
631 gen
->block_dim
[1] = 4;
632 gen
->block_dim
[2] = 4;
636 size
= extract_sizes(gen
->sizes
, "block", gen
->kernel_id
);
637 read_sizes_from_set(size
, gen
->block_dim
, &gen
->n_block
);
640 /* Extract user specified "grid" sizes from the "sizes" command line option,
641 * after filling in some potentially useful defaults.
643 static void read_grid_sizes(struct gpu_gen
*gen
)
645 int n
= gen
->n_parallel
;
648 gen
->n_grid
= (n
<= 2) ? n
: 2;
649 switch (gen
->n_grid
) {
651 gen
->grid_dim
[0] = 32768;
654 gen
->grid_dim
[0] = 256;
655 gen
->grid_dim
[1] = 256;
659 size
= extract_sizes(gen
->sizes
, "grid", gen
->kernel_id
);
660 read_sizes_from_set(size
, gen
->grid_dim
, &gen
->n_grid
);
663 /* Extract user specified sizes from the "sizes" command line option
664 * after filling in some potentially useful defaults.
666 static void read_sizes(struct gpu_gen
*gen
)
668 read_tile_sizes(gen
);
669 read_block_sizes(gen
);
670 read_grid_sizes(gen
);
673 static void *free_stmts(struct gpu_stmt
*stmts
, int n
)
680 for (i
= 0; i
< n
; ++i
) {
681 struct gpu_stmt_access
*access
, *next
;
683 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
685 isl_id_free(access
->ref_id
);
686 isl_map_free(access
->access
);
690 isl_id_free(stmts
[i
].id
);
697 /* Construct a map from a domain of dimensionality "len"
698 * to a domain of dimensionality "len" + "tile_len" that tiles
699 * the "tile_len" coordinates starting at "first".
700 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
701 * "dim" prescribes the parameters.
703 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
704 int first
, int tile_len
, int *tile_size
)
711 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
712 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
713 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
714 ls
= isl_local_space_from_space(dim
);
716 for (i
= 0; i
< len
- tile_len
; ++i
) {
717 int j
= i
< first
? i
: i
+ tile_len
;
718 int k
= i
< first
? i
: i
+ 2 * tile_len
;
720 c
= isl_equality_alloc(isl_local_space_copy(ls
));
721 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, j
, -1);
722 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
723 bmap
= isl_basic_map_add_constraint(bmap
, c
);
726 for (i
= 0; i
< tile_len
; ++i
) {
727 c
= isl_equality_alloc(isl_local_space_copy(ls
));
728 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
,
730 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
731 first
+ i
, tile_size
[i
]);
732 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
733 first
+ i
+ tile_len
, 1);
734 bmap
= isl_basic_map_add_constraint(bmap
, c
);
736 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
737 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
738 first
+ i
+ tile_len
, 1);
739 bmap
= isl_basic_map_add_constraint(bmap
, c
);
741 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
742 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
743 first
+ i
+ tile_len
, -1);
744 c
= isl_constraint_set_constant_si(c
, tile_size
[i
] - 1);
745 bmap
= isl_basic_map_add_constraint(bmap
, c
);
748 isl_local_space_free(ls
);
750 return isl_map_from_basic_map(bmap
);
753 /* Construct a map from a domain of dimensionality "len"
754 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
755 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
756 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
757 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
758 * that are projected out at the end.
759 * "dim" prescribes the parameters.
761 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
762 int first
, int wrap_len
, int *wrap_size
)
769 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
770 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
771 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
772 ls
= isl_local_space_from_space(dim
);
774 for (i
= 0; i
< len
; ++i
) {
775 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
777 c
= isl_equality_alloc(isl_local_space_copy(ls
));
778 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
779 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
780 bmap
= isl_basic_map_add_constraint(bmap
, c
);
783 for (i
= 0; i
< wrap_len
; ++i
) {
784 c
= isl_equality_alloc(isl_local_space_copy(ls
));
785 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
787 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
788 first
+ wrap_len
+ i
, 1);
789 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
790 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
791 bmap
= isl_basic_map_add_constraint(bmap
, c
);
793 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
794 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
795 first
+ wrap_len
+ i
, 1);
796 bmap
= isl_basic_map_add_constraint(bmap
, c
);
798 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
799 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
800 first
+ wrap_len
+ i
, -1);
801 c
= isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
802 bmap
= isl_basic_map_add_constraint(bmap
, c
);
805 isl_local_space_free(ls
);
807 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
808 first
+ 2 * wrap_len
, wrap_len
);
810 return isl_map_from_basic_map(bmap
);
813 /* Add "n" parameters named prefix%d.
815 static __isl_give isl_set
*add_params( __isl_take isl_set
*set
,
816 int n
, const char *prefix
)
822 nparam
= isl_set_dim(set
, isl_dim_param
);
823 set
= isl_set_add_dims(set
, isl_dim_param
, n
);
825 for (i
= 0; i
< n
; ++i
) {
826 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
827 set
= isl_set_set_dim_name(set
, isl_dim_param
,
834 /* Equate the "n" dimensions of "set" starting at "first" to
835 * freshly created parameters named prefix%d.
837 static __isl_give isl_set
*parametrize(__isl_take isl_set
*set
,
838 int first
, int n
, const char *prefix
)
843 nparam
= isl_set_dim(set
, isl_dim_param
);
845 set
= add_params(set
, n
, prefix
);
847 for (i
= 0; i
< n
; ++i
)
848 set
= isl_set_equate(set
, isl_dim_param
, nparam
+ i
,
849 isl_dim_set
, first
+ i
);
854 /* Given a parameter space "space", create a set of dimension "len"
855 * of which the "n" dimensions starting at "first" are equated to
856 * freshly created parameters named prefix%d.
858 static __isl_give isl_set
*parametrization(__isl_take isl_space
*space
,
859 int len
, int first
, int n
, const char *prefix
)
863 space
= isl_space_set_from_params(space
);
864 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
865 set
= isl_set_universe(space
);
867 return parametrize(set
, first
, n
, prefix
);
870 /* Tile the B loops over the tile sizes and then tile/wrap
871 * the T1 loops over the blocks.
873 static __isl_give isl_union_map
*tile_schedule(struct gpu_gen
*gen
,
874 __isl_take isl_union_map
*sched
)
877 isl_map
*tiling
, *block_tiling
;
879 dim
= isl_union_map_get_space(sched
);
880 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
881 gen
->tile_first
, gen
->tile_len
, gen
->tile_size
);
883 if (gen
->options
->wrap
)
884 block_tiling
= wrap(dim
, gen
->untiled_len
+ gen
->tile_len
,
885 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
887 block_tiling
= tile(dim
, gen
->untiled_len
+ gen
->tile_len
,
888 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
890 gen
->tiled_len
= gen
->untiled_len
+ gen
->tile_len
+ gen
->n_grid
;
892 tiling
= isl_map_apply_range(tiling
, block_tiling
);
894 sched
= isl_union_map_apply_range(sched
,
895 isl_union_map_from_map(tiling
));
897 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
902 /* Equate the "T1P" iterators in the tiled schedule "sched"
903 * to the block dimensions.
905 static __isl_give isl_union_map
*parametrize_tiled_schedule(
906 struct gpu_gen
*gen
, __isl_take isl_union_map
*sched
)
911 dim
= isl_union_map_get_space(sched
);
912 par
= parametrization(dim
, gen
->tiled_len
,
913 gen
->tile_first
+ gen
->n_grid
, gen
->n_grid
, "b");
914 sched
= isl_union_map_intersect_range(sched
,
915 isl_union_set_from_set(par
));
920 /* Tile/wrap the P1 loops over the threads.
922 static __isl_give isl_union_map
*thread_tile_schedule(struct gpu_gen
*gen
,
923 __isl_take isl_union_map
*sched
)
929 dim
= isl_union_map_get_space(sched
);
931 if (gen
->options
->wrap
)
932 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
933 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
935 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
936 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
937 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
939 sched
= isl_union_map_apply_range(sched
,
940 isl_union_map_from_map(tiling
));
942 par
= parametrization(dim
, gen
->thread_tiled_len
,
943 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
945 sched
= isl_union_map_intersect_range(sched
,
946 isl_union_set_from_set(par
));
948 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
953 /* If the user asked for it, scale the shared memory tile loops
954 * (T1T and T2) of "sched" by gen->tile_size[i].
955 * If we are not performing "wrapping", then additionally scale the T1P
956 * loops by gen->grid_dim[i].
958 static __isl_give isl_union_map
*scale_tile_loops(struct gpu_gen
*gen
,
959 __isl_take isl_union_map
*sched
)
963 isl_basic_map
*scale
;
967 if (!gen
->options
->scale_tile_loops
)
970 dim
= isl_union_map_get_space(sched
);
971 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
972 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
973 scale
= isl_basic_map_universe(isl_space_copy(dim
));
974 ls
= isl_local_space_from_space(dim
);
976 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
979 if (i
>= gen
->tile_first
&& i
< gen
->tile_first
+ gen
->n_grid
) {
980 f
= gen
->tile_size
[i
- gen
->tile_first
];
981 if (!gen
->options
->wrap
)
982 f
*= gen
->grid_dim
[i
- gen
->tile_first
];
983 } else if (i
>= gen
->tile_first
+ gen
->n_grid
&&
984 i
< gen
->tile_first
+ gen
->n_grid
+ gen
->tile_len
) {
985 f
= gen
->tile_size
[i
- (gen
->tile_first
+ gen
->n_grid
)];
988 c
= isl_equality_alloc(isl_local_space_copy(ls
));
989 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
990 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
991 scale
= isl_basic_map_add_constraint(scale
, c
);
994 isl_local_space_free(ls
);
996 sched
= isl_union_map_apply_range(sched
,
997 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1002 /* If we are not performing "wrapping" and if the user asked for it,
1003 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
1005 static __isl_give isl_union_map
*scale_thread_tile_loops(struct gpu_gen
*gen
,
1006 __isl_take isl_union_map
*sched
)
1010 isl_basic_map
*scale
;
1012 isl_local_space
*ls
;
1014 if (gen
->options
->wrap
)
1016 if (!gen
->options
->scale_tile_loops
)
1019 dim
= isl_union_map_get_space(sched
);
1020 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
1021 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
1022 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1023 ls
= isl_local_space_from_space(dim
);
1025 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
1028 if (i
>= gen
->shared_len
&&
1029 i
< gen
->shared_len
+ gen
->n_block
)
1030 f
= gen
->block_dim
[i
- gen
->shared_len
];
1032 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1033 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1034 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1035 scale
= isl_basic_map_add_constraint(scale
, c
);
1038 isl_local_space_free(ls
);
1040 sched
= isl_union_map_apply_range(sched
,
1041 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1046 /* If we are not performing "wrapping" and if the user asked for it,
1047 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
1049 static __isl_give isl_union_map
*scale_access_tile_loops(struct gpu_gen
*gen
,
1050 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
1054 isl_basic_map
*scale
;
1056 isl_local_space
*ls
;
1058 if (gen
->options
->wrap
)
1060 if (!gen
->options
->scale_tile_loops
)
1063 dim
= isl_union_map_get_space(sched
);
1064 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1065 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1066 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1067 ls
= isl_local_space_from_space(dim
);
1069 for (i
= 0; i
< len
; ++i
) {
1072 if (i
>= first
&& i
< first
+ n_tile
)
1073 f
= gen
->kernel
->block_dim
[i
- first
];
1075 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1076 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1077 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1078 scale
= isl_basic_map_add_constraint(scale
, c
);
1081 isl_local_space_free(ls
);
1083 sched
= isl_union_map_apply_range(sched
,
1084 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1089 /* Add "len" parameters p[i] called prefix%d,
1090 * with bounds to 0 <= p[i] < size[i].
1092 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1093 int len
, int *size
, const char *prefix
)
1098 isl_basic_set
*bset
;
1100 isl_local_space
*ls
;
1103 nparam
= isl_set_dim(set
, isl_dim_param
);
1104 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1106 for (i
= 0; i
< len
; ++i
) {
1107 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1108 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1112 dim
= isl_set_get_space(set
);
1113 bset
= isl_basic_set_universe(isl_space_copy(dim
));
1114 ls
= isl_local_space_from_space(dim
);
1116 for (i
= 0; i
< len
; ++i
) {
1117 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1118 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1120 bset
= isl_basic_set_add_constraint(bset
, c
);
1122 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1123 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1125 c
= isl_constraint_set_constant_si(c
, size
[i
] - 1);
1126 bset
= isl_basic_set_add_constraint(bset
, c
);
1129 isl_local_space_free(ls
);
1131 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
1134 /* Add "len" parameters p[i] called prefix%d,
1135 * with bounds to 0 <= p[i] < size[i].
1137 static __isl_give isl_set
*add_bounded_parameters_dynamic(
1138 __isl_take isl_set
*set
, __isl_keep isl_multi_pw_aff
*size
,
1144 isl_local_space
*ls
;
1147 len
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
1148 nparam
= isl_set_dim(set
, isl_dim_param
);
1149 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1151 for (i
= 0; i
< len
; ++i
) {
1152 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1153 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1157 space
= isl_space_params(isl_set_get_space(set
));
1158 ls
= isl_local_space_from_space(space
);
1159 for (i
= 0; i
< len
; ++i
) {
1160 isl_pw_aff
*param
, *size_i
, *zero
;
1163 param
= isl_pw_aff_var_on_domain(isl_local_space_copy(ls
),
1164 isl_dim_param
, nparam
+ i
);
1166 size_i
= isl_multi_pw_aff_get_pw_aff(size
, i
);
1167 bound
= isl_pw_aff_lt_set(isl_pw_aff_copy(param
), size_i
);
1168 set
= isl_set_intersect_params(set
, bound
);
1170 zero
= isl_pw_aff_zero_on_domain(isl_local_space_copy(ls
));
1171 bound
= isl_pw_aff_ge_set(param
, zero
);
1172 set
= isl_set_intersect_params(set
, bound
);
1174 isl_local_space_free(ls
);
1179 /* Construct a map from an access to group->array to the corresponding
1180 * shared/private memory tile.
1181 * The map is of the form
1183 * { [D[i] -> A[a]] -> T[t] }
1185 * where D represents the initial shared_len dimensions
1186 * of the computed schedule.
1188 static __isl_give isl_map
*shift_access(struct gpu_array_ref_group
*group
)
1190 struct gpu_array_tile
*tile
;
1191 isl_multi_aff
*tiling
;
1193 tile
= group
->private_tile
;
1195 tile
= group
->shared_tile
;
1197 tiling
= isl_multi_aff_copy(tile
->tiling
);
1199 return isl_map_from_multi_aff(tiling
);
1202 /* Does "map" have an obviously fixed value at variable "pos" of "type"?
1204 static int map_plain_is_fixed(isl_map
*map
, enum isl_dim_type type
,
1210 v
= isl_map_plain_get_val_if_fixed(map
, type
, pos
);
1213 fixed
= isl_val_is_int(v
);
1219 /* Given a schedule that iterates over all elements in a piece of an array,
1220 * perform tiling/wrapping over the threads.
1222 * In particular, we tile the final iterators so that the final thread
1223 * dimension runs over the final array dimension.
1224 * However, if those final iterators have only a single iteration,
1225 * we try to tile earlier iterators instead.
1227 static __isl_give isl_map
*tile_access_schedule(struct gpu_gen
*gen
,
1228 __isl_take isl_map
*sched
)
1231 isl_union_map
*usched
;
1234 unsigned nvar
= isl_map_dim(sched
, isl_dim_out
);
1238 n_tile
= gen
->kernel
->n_block
;
1239 if (n_tile
> nvar
) {
1241 sched
= isl_map_insert_dims(sched
,
1242 isl_dim_out
, 0, n_tile
- nvar
);
1243 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1244 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1248 first
= nvar
- n_tile
;
1250 for (; first
> 0; first
--)
1251 if (!map_plain_is_fixed(sched
, isl_dim_out
, first
+ n_tile
- 1))
1254 dim
= isl_map_get_space(sched
);
1255 dim
= isl_space_params(dim
);
1256 if (gen
->options
->wrap
)
1257 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1258 n_tile
, gen
->kernel
->block_dim
);
1260 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1261 n_tile
, gen
->kernel
->block_dim
);
1262 sched
= isl_map_apply_range(sched
, tiling
);
1264 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
, n_tile
, "t");
1265 sched
= isl_map_intersect_range(sched
, par
);
1267 usched
= isl_union_map_from_map(sched
);
1268 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1270 sched
= isl_map_from_union_map(usched
);
1275 /* Return the union of all read (read = 1) and/or write (write = 1)
1276 * access relations in the group.
1278 static __isl_give isl_union_map
*group_access_relation(
1279 struct gpu_array_ref_group
*group
, int read
, int write
)
1282 isl_union_map
*access
;
1284 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1285 for (i
= 0; i
< group
->n_ref
; ++i
) {
1288 if (!((read
&& group
->refs
[i
]->read
) ||
1289 (write
&& group
->refs
[i
]->write
)))
1291 map_i
= isl_map_copy(group
->refs
[i
]->access
);
1292 access
= isl_union_map_union(access
,
1293 isl_union_map_from_map(map_i
));
1299 /* Return the extent of "array", recomputed from the bounds.
1300 * The recomputed extent may be simpler than the original extent.
1302 static __isl_give isl_set
*array_extent(struct gpu_array_info
*array
)
1307 isl_local_space
*ls
;
1310 id
= isl_set_get_tuple_id(array
->extent
);
1311 space
= isl_set_get_space(array
->extent
);
1312 extent
= isl_set_universe(isl_space_copy(space
));
1313 ls
= isl_local_space_from_space(space
);
1314 for (i
= 0; i
< array
->n_index
; ++i
) {
1320 extent
= isl_set_lower_bound_si(extent
, isl_dim_set
, i
, 0);
1322 aff
= isl_aff_var_on_domain(isl_local_space_copy(ls
),
1324 index
= isl_pw_aff_from_aff(aff
);
1325 bound
= isl_pw_aff_copy(array
->bound
[i
]);
1326 bound
= isl_pw_aff_from_range(bound
);
1327 bound
= isl_pw_aff_add_dims(bound
, isl_dim_in
, array
->n_index
);
1328 bound
= isl_pw_aff_set_tuple_id(bound
, isl_dim_in
,
1330 lt
= isl_pw_aff_lt_set(index
, bound
);
1331 extent
= isl_set_intersect(extent
, lt
);
1333 isl_local_space_free(ls
);
1339 /* Return a map from the first shared_len dimensions of the computed
1340 * schedule to the array tile in
1341 * global memory that corresponds to the shared memory copy.
1343 * In particular, return a map
1349 * tile_offset(i) <= a <= tile_offset(i) + tile_size - 1 (1)
1353 * 0 <= a <= array_size - 1 (2)
1355 * Note that if some stride has been detected (i.e., when
1356 * group->shared_tile->bound[i].shift is set), then a in (1) refers
1357 * to the shifted and scaled down version.
1359 * Constraints (1) are obtained by mapping the size constraints on the
1360 * shared/private memory tile back to the access relation.
1361 * Constraints (2) are obtained from the (recomputed) extent.
1363 static __isl_give isl_map
*group_tile(struct gpu_array_ref_group
*group
)
1366 int n_index
= group
->array
->n_index
;
1372 space
= isl_multi_aff_get_space(group
->shared_tile
->tiling
);
1373 space
= isl_space_range(space
);
1374 local
= isl_set_universe(space
);
1375 for (i
= 0; i
< n_index
; ++i
) {
1378 local
= isl_set_lower_bound_si(local
, isl_dim_set
, i
, 0);
1379 bound
= isl_val_copy(group
->shared_tile
->bound
[i
].size
);
1380 bound
= isl_val_sub_ui(bound
, 1);
1381 local
= isl_set_upper_bound_val(local
, isl_dim_set
, i
, bound
);
1383 local
= isl_set_preimage_multi_aff(local
,
1384 isl_multi_aff_copy(group
->shared_tile
->tiling
));
1385 tile
= isl_set_unwrap(local
);
1386 extent
= array_extent(group
->array
);
1387 tile
= isl_map_intersect_range(tile
, extent
);
1392 /* Given a mapping "iterator_map" from the AST schedule to a domain,
1393 * return the corresponding mapping from the AST schedule to
1394 * to the first shared_len dimensions of the schedule computed by PPCG.
1396 static __isl_give isl_pw_multi_aff
*compute_sched_to_shared(struct gpu_gen
*gen
,
1397 __isl_take isl_pw_multi_aff
*iterator_map
)
1399 isl_union_map
*umap
;
1401 isl_map
*map
, *sched
;;
1403 space
= isl_space_range(isl_pw_multi_aff_get_space(iterator_map
));
1404 space
= isl_space_from_domain(space
);
1405 space
= isl_space_add_dims(space
, isl_dim_out
, gen
->shared_len
);
1407 umap
= isl_union_map_copy(gen
->shared_sched
);
1408 umap
= isl_union_map_apply_range(umap
,
1409 isl_union_map_copy(gen
->shared_proj
));
1410 map
= isl_union_map_extract_map(umap
, space
);
1411 isl_union_map_free(umap
);
1413 sched
= isl_map_preimage_domain_pw_multi_aff(map
, iterator_map
);
1414 sched
= isl_map_detect_equalities(sched
);
1416 return isl_pw_multi_aff_from_map(sched
);
1419 /* Set unroll[j] if the input dimension j is involved in
1420 * the index expression represented by ma.
1422 static int check_unroll(__isl_take isl_set
*set
, __isl_take isl_multi_aff
*ma
,
1426 int n_in
= isl_multi_aff_dim(ma
, isl_dim_in
);
1427 int n_out
= isl_multi_aff_dim(ma
, isl_dim_out
);
1430 for (i
= 0; i
< n_out
; ++i
) {
1433 aff
= isl_multi_aff_get_aff(ma
, i
);
1434 for (j
= 0; j
< n_in
; ++j
)
1435 if (isl_aff_involves_dims(aff
, isl_dim_in
, j
, 1))
1441 isl_multi_aff_free(ma
);
1445 /* Given an array pos mapping input dimensions to the corresponding
1446 * output dimension, construct the corresponding map.
1448 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
1453 isl_basic_map
*bmap
;
1454 isl_local_space
*ls
;
1456 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1457 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1458 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1459 ls
= isl_local_space_from_space(dim
);
1461 for (i
= 0; i
< len
; ++i
) {
1462 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1463 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
,
1465 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
],
1467 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1469 isl_local_space_free(ls
);
1471 return isl_map_from_basic_map(bmap
);
1474 /* Find all loops involved in any of the index expressions for any of
1475 * the private accesses, move them innermost and then mark them as
1476 * requiring unrolling by setting gen->first_unroll.
1477 * The loops involved should all be parallel because of the checks
1478 * we performed in check_private_group_access. Moving them innermost
1479 * is therefore a valid transformation.
1481 * Loops up to gen->shared_len are generated before the mapping to
1482 * threads is applied. They should therefore be ignored.
1484 * We compute the hidden equalities of the schedule first
1485 * since we will need them in our calls to isl_pw_multi_aff_from_map
1486 * and because we want to make sure that the same equalities
1487 * are also available to the code generator.
1489 static __isl_give isl_union_map
*interchange_for_unroll(struct gpu_gen
*gen
,
1490 __isl_take isl_union_map
*sched
)
1493 int unroll
[gen
->thread_tiled_len
];
1494 int perm
[gen
->thread_tiled_len
];
1497 int len
= gen
->shared_len
+ gen
->n_parallel
+ gen
->n_block
;
1499 gen
->first_unroll
= -1;
1501 sched
= isl_union_map_detect_equalities(sched
);
1502 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1504 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1505 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1507 for (j
= 0; j
< array
->n_group
; ++j
) {
1508 isl_union_map
*access
;
1510 isl_pw_multi_aff
*pma
;
1512 if (!array
->groups
[j
]->private_tile
)
1515 access
= group_access_relation(array
->groups
[j
], 1, 1);
1516 access
= isl_union_map_apply_domain(access
,
1517 isl_union_map_copy(sched
));
1519 acc
= isl_map_from_union_map(access
);
1520 pma
= isl_pw_multi_aff_from_map(acc
);
1521 isl_pw_multi_aff_foreach_piece(pma
,
1522 &check_unroll
, unroll
);
1524 isl_pw_multi_aff_free(pma
);
1528 for (i
= gen
->shared_len
; i
< len
; ++i
)
1535 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
1540 for (i
= 0; i
< gen
->shared_len
; ++i
)
1542 for (i
= gen
->shared_len
; i
< gen
->thread_tiled_len
; ++i
)
1545 gen
->first_unroll
= j
- gen
->shared_len
;
1546 for (i
= gen
->shared_len
; i
< len
; ++i
)
1550 dim
= isl_union_map_get_space(sched
);
1551 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
1552 sched
= isl_union_map_apply_range(sched
,
1553 isl_union_map_from_map(permute
));
1558 /* Given a constraint
1560 * a(p,i) + j = g f(e)
1562 * or -a(p,i) - j = g f(e) if sign < 0,
1563 * store a(p,i) in bound->shift and g (stride) in bound->stride.
1564 * a(p,i) is assumed to be an expression in only the parameters
1565 * and the input dimensions.
1567 static void extract_stride(__isl_keep isl_constraint
*c
,
1568 struct gpu_array_bound
*bound
, __isl_keep isl_val
*stride
, int sign
)
1577 isl_val_free(bound
->stride
);
1578 bound
->stride
= isl_val_copy(stride
);
1580 space
= isl_constraint_get_space(c
);
1581 space
= isl_space_domain(space
);
1583 nparam
= isl_space_dim(space
, isl_dim_param
);
1584 nvar
= isl_space_dim(space
, isl_dim_set
);
1586 v
= isl_constraint_get_constant_val(c
);
1589 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1590 aff
= isl_aff_set_constant_val(aff
, v
);
1592 for (i
= 0; i
< nparam
; ++i
) {
1593 if (!isl_constraint_involves_dims(c
, isl_dim_param
, i
, 1))
1595 v
= isl_constraint_get_coefficient_val(c
, isl_dim_param
, i
);
1598 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_param
, i
, v
);
1601 for (i
= 0; i
< nvar
; ++i
) {
1602 if (!isl_constraint_involves_dims(c
, isl_dim_in
, i
, 1))
1604 v
= isl_constraint_get_coefficient_val(c
, isl_dim_in
, i
);
1607 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_in
, i
, v
);
1613 /* Given an equality constraint of a map with a single output dimension j,
1614 * check if the constraint is of the form
1616 * a(p,i) + j = g f(e)
1618 * with a(p,i) an expression in the parameters and input dimensions
1619 * and f(e) an expression in the existentially quantified variables.
1620 * If so, and if g is larger than any such g from a previously considered
1621 * constraint, then call extract_stride to record the stride information
1624 static int check_stride_constraint(__isl_take isl_constraint
*c
, void *user
)
1630 struct gpu_array_bound
*bound
= user
;
1632 ctx
= isl_constraint_get_ctx(c
);
1633 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1634 v
= isl_constraint_get_coefficient_val(c
, isl_dim_out
, 0);
1636 if (n_div
&& (isl_val_is_one(v
) || isl_val_is_negone(v
))) {
1637 int s
= isl_val_sgn(v
);
1638 isl_val
*stride
= isl_val_zero(ctx
);
1641 for (i
= 0; i
< n_div
; ++i
) {
1642 v
= isl_constraint_get_coefficient_val(c
,
1644 stride
= isl_val_gcd(stride
, v
);
1646 if (!isl_val_is_zero(stride
) &&
1647 isl_val_gt(stride
, bound
->stride
))
1648 extract_stride(c
, bound
, stride
, s
);
1650 isl_val_free(stride
);
1654 isl_constraint_free(c
);
1658 /* Given contraints on an array index i, check if we can find
1659 * a shift a(p) and a stride g such that
1661 * a(p) + i = 0 mod g
1663 * If so, record the information in bound and apply the mapping
1664 * i -> (i + a(p))/g to the array index in bounds and return
1665 * the new constraints.
1666 * If not, simply return the original constraints.
1668 * If bounds is a subset of the space
1672 * then the bound recorded in bound->shift is of the form
1676 * with s(D) equal to a(p) above.
1677 * The mapping recorded in bound->shift_map is of the form
1679 * [D -> i] -> [D -> (i + S(D))/g]
1681 * This mapping is computed as follows.
1682 * We first introduce "i" in the domain through precomposition
1683 * with [D -> i] -> D obtaining
1687 * Adding [D -> i] -> i produces
1689 * [D -> i] -> i + s(D)
1691 * and the domain product with [D -> i] -> D yields
1693 * [D -> i] -> [D -> i + s(D)]
1695 * Composition with [D -> i] -> [D -> i/g] gives the desired result.
1697 static __isl_give isl_basic_map
*check_stride(struct gpu_array_bound
*bound
,
1698 __isl_take isl_basic_map
*bounds
)
1701 isl_basic_map
*hull
;
1702 isl_basic_map
*shift
, *id
, *bmap
, *scale
;
1703 isl_basic_set
*bset
;
1706 bound
->stride
= NULL
;
1708 hull
= isl_basic_map_affine_hull(isl_basic_map_copy(bounds
));
1710 isl_basic_map_foreach_constraint(hull
, &check_stride_constraint
, bound
);
1712 isl_basic_map_free(hull
);
1717 shift
= isl_basic_map_from_aff(isl_aff_copy(bound
->shift
));
1718 space
= isl_basic_map_get_space(bounds
);
1719 bmap
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1720 shift
= isl_basic_map_apply_range(bmap
, shift
);
1721 space
= isl_basic_map_get_space(bounds
);
1722 id
= isl_basic_map_range_map(isl_basic_map_universe(space
));
1723 shift
= isl_basic_map_sum(id
, shift
);
1724 space
= isl_basic_map_get_space(bounds
);
1725 id
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1726 shift
= isl_basic_map_range_product(id
, shift
);
1728 space
= isl_space_domain(isl_basic_map_get_space(bounds
));
1729 id
= isl_basic_map_identity(isl_space_map_from_set(space
));
1730 space
= isl_space_range(isl_basic_map_get_space(bounds
));
1731 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1732 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, 0, 1);
1733 aff
= isl_aff_scale_down_val(aff
, isl_val_copy(bound
->stride
));
1734 scale
= isl_basic_map_from_aff(aff
);
1735 scale
= isl_basic_map_product(id
, scale
);
1737 bound
->shift_map
= isl_basic_map_apply_range(shift
, scale
);
1738 bmap
= isl_basic_map_copy(bound
->shift_map
);
1739 bset
= isl_basic_set_apply(isl_basic_map_wrap(bounds
), bmap
);
1740 bounds
= isl_basic_set_unwrap(bset
);
1745 /* Data used in compute_array_dim_size and compute_size_in_direction.
1747 * pos is the position of the variable representing the array index,
1748 * i.e., the variable for which want to compute the size. This variable
1749 * is also the last variable in the set.
1751 struct gpu_size_info
{
1752 isl_basic_set
*bset
;
1753 struct gpu_array_bound
*bound
;
1757 /* Given a constraint from the basic set describing the bounds on
1758 * an array index, check if it is a lower bound, say m i >= b(x), and,
1759 * if so, check whether the expression "i - ceil(b(x)/m) + 1" has a constant
1760 * upper bound. If so, and if this bound is smaller than any bound
1761 * derived from earlier constraints, set the size to this bound on
1762 * the expression and the lower bound to ceil(b(x)/m).
1764 static int compute_size_in_direction(__isl_take isl_constraint
*c
, void *user
)
1766 struct gpu_size_info
*size
= user
;
1773 nparam
= isl_basic_set_dim(size
->bset
, isl_dim_param
);
1774 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1776 if (isl_constraint_involves_dims(c
, isl_dim_div
, 0, n_div
) ||
1777 !isl_constraint_is_lower_bound(c
, isl_dim_set
, size
->pos
)) {
1778 isl_constraint_free(c
);
1782 aff
= isl_constraint_get_bound(c
, isl_dim_set
, size
->pos
);
1783 aff
= isl_aff_ceil(aff
);
1785 lb
= isl_aff_copy(aff
);
1787 aff
= isl_aff_neg(aff
);
1788 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, size
->pos
, 1);
1790 v
= isl_basic_set_max_val(size
->bset
, aff
);
1793 if (isl_val_is_int(v
)) {
1794 v
= isl_val_add_ui(v
, 1);
1795 if (!size
->bound
->size
|| isl_val_lt(v
, size
->bound
->size
)) {
1796 isl_val_free(size
->bound
->size
);
1797 size
->bound
->size
= isl_val_copy(v
);
1798 lb
= isl_aff_drop_dims(lb
, isl_dim_in
, size
->pos
, 1);
1799 isl_aff_free(size
->bound
->lb
);
1800 size
->bound
->lb
= isl_aff_copy(lb
);
1806 isl_constraint_free(c
);
1811 /* Given a basic map "bounds" that maps parameters and input dimensions
1812 * to a single output dimension, look for an expression in the parameters
1813 * and input dimensions such that the range of the output dimension shifted
1814 * by this expression is a constant.
1816 * In particular, we currently only consider lower bounds on the output
1817 * dimension as candidate expressions.
1819 static int compute_array_dim_size(struct gpu_array_bound
*bound
,
1820 __isl_take isl_basic_map
*bounds
)
1822 struct gpu_size_info size
;
1824 bounds
= isl_basic_map_detect_equalities(bounds
);
1825 bounds
= check_stride(bound
, bounds
);
1831 size
.pos
= isl_basic_map_dim(bounds
, isl_dim_in
);
1832 size
.bset
= isl_basic_map_wrap(bounds
);
1833 size
.bset
= isl_basic_set_flatten(size
.bset
);
1834 size
.bset
= isl_set_simple_hull(isl_basic_set_compute_divs(size
.bset
));
1835 isl_basic_set_foreach_constraint(size
.bset
, &compute_size_in_direction
,
1837 isl_basic_set_free(size
.bset
);
1839 return bound
->size
? 0 : -1;
1842 /* Check if we can find a memory tile for the given array
1843 * based on the given accesses, and if so, put the results in "tile".
1845 * We project the accesses on each index in turn and look for a parametric
1846 * offset such that the size is constant.
1848 static int can_tile(__isl_keep isl_map
*access
, struct gpu_array_tile
*tile
)
1852 for (i
= 0; i
< tile
->n
; ++i
) {
1854 isl_basic_map
*hull
;
1856 access_i
= isl_map_copy(access
);
1857 access_i
= isl_map_project_out(access_i
, isl_dim_out
, 0, i
);
1858 access_i
= isl_map_project_out(access_i
, isl_dim_out
,
1859 1, tile
->n
- (i
+ 1));
1860 access_i
= isl_map_compute_divs(access_i
);
1861 hull
= isl_map_simple_hull(access_i
);
1862 if (compute_array_dim_size(&tile
->bound
[i
], hull
) < 0)
1869 /* Construct a map with input the shared tile loops and the loops that
1870 * will be wrapped around the threads that relates these later loops
1871 * to the thread indices and then projects them out.
1873 static __isl_give isl_map
*compute_privatization(struct gpu_gen
*gen
)
1881 dim
= isl_union_map_get_space(gen
->shared_sched
);
1883 if (gen
->options
->wrap
)
1884 tiling
= wrap(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
1885 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1887 tiling
= tile(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
1888 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1892 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
1893 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
1896 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
1897 priv
= isl_map_intersect_range(priv
, par
);
1899 dim
= isl_map_get_space(priv
);
1900 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
1901 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
1902 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
1905 priv
= isl_map_apply_range(priv
, proj
);
1910 /* Construct a map from domain_dim to domain_dim that increments
1911 * the dimension at position "pos" and leaves all other dimensions
1914 static __isl_give isl_map
*next(__isl_take isl_space
*domain_dim
, int pos
)
1917 int len
= isl_space_dim(domain_dim
, isl_dim_set
);
1919 isl_basic_map
*next
;
1920 isl_local_space
*ls
;
1922 dim
= isl_space_map_from_set(domain_dim
);
1923 next
= isl_basic_map_universe(isl_space_copy(dim
));
1924 ls
= isl_local_space_from_space(dim
);
1926 for (i
= 0; i
< len
; ++i
) {
1929 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1930 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, 1);
1931 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1933 c
= isl_constraint_set_constant_si(c
, 1);
1934 next
= isl_basic_map_add_constraint(next
, c
);
1937 isl_local_space_free(ls
);
1939 return isl_map_from_basic_map(next
);
1942 /* Check if the given access is coalesced.
1943 * That is, check whether incrementing the dimension that will get
1944 * wrapped over the last thread index results in incrementing
1945 * the last array index.
1947 * This function is only called for access relations without reuse.
1949 static int access_is_coalesced(struct gpu_gen
*gen
,
1950 __isl_keep isl_union_map
*access
)
1953 isl_map
*access_map
;
1954 isl_map
*next_thread_x
;
1955 isl_map
*next_element
;
1959 access
= isl_union_map_copy(access
);
1960 access
= isl_union_map_apply_domain(access
,
1961 isl_union_map_copy(gen
->tiled_sched
));
1962 access_map
= isl_map_from_union_map(access
);
1964 dim
= isl_map_get_space(access_map
);
1965 dim
= isl_space_domain(dim
);
1966 next_thread_x
= next(dim
, gen
->shared_len
+ gen
->n_block
- 1);
1968 dim
= isl_map_get_space(access_map
);
1969 dim
= isl_space_range(dim
);
1970 next_element
= next(dim
, isl_space_dim(dim
, isl_dim_set
) - 1);
1972 map
= isl_map_apply_domain(next_thread_x
, isl_map_copy(access_map
));
1973 map
= isl_map_apply_range(map
, access_map
);
1975 coalesced
= isl_map_is_subset(map
, next_element
);
1977 isl_map_free(next_element
);
1983 /* Given an access relation in terms of the first gen->shared_len + gen->n_block
1984 * dimensions of the computed schedule, check if it is bijective for
1985 * fixed values of the first gen->shared_len dimensions.
1986 * We perform this check by equating these dimensions to parameters.
1988 static int access_is_bijective(struct gpu_gen
*gen
, __isl_keep isl_map
*access
)
1994 access
= isl_map_copy(access
);
1995 space
= isl_space_params(isl_map_get_space(access
));
1996 par
= parametrization(space
, gen
->shared_len
+ gen
->n_block
,
1997 0, gen
->shared_len
, "s");
1998 access
= isl_map_intersect_domain(access
, par
);
1999 res
= isl_map_is_bijective(access
);
2000 isl_map_free(access
);
2005 /* Look for the last shared tile loop that affects the offset of "tile"
2006 * and return the result.
2007 * If there is no such loop, then return the index of the loop
2008 * before the first shared tile loop, in particular gen->tile_first - 1.
2010 static int compute_tile_last_shared(struct gpu_gen
*gen
,
2011 struct gpu_array_tile
*tile
)
2015 for (j
= gen
->shared_len
- 1; j
>= gen
->tile_first
; --j
) {
2016 for (i
= 0; i
< tile
->n
; ++i
) {
2020 lb
= tile
->bound
[i
].lb
;
2021 if (isl_aff_involves_dims(lb
, isl_dim_in
, j
, 1))
2024 shift
= tile
->bound
[i
].shift
;
2027 if (isl_aff_involves_dims(shift
, isl_dim_in
, j
, 1))
2037 /* Look for the last shared tile loop that affects the offset of the
2038 * shared or private tile and store the result in group->last_shared.
2039 * If there is no such loop, then group->last_shared is set to a value
2040 * before the first shared tile loop, in particular gen->tile_first - 1.
2041 * If there is no tile defined on the array reference group,
2042 * then set group->last_shared to gen->shared_len - 1.
2044 static void set_last_shared(struct gpu_gen
*gen
,
2045 struct gpu_array_ref_group
*group
)
2047 struct gpu_array_tile
*tile
;
2049 group
->last_shared
= gen
->shared_len
- 1;
2051 tile
= group
->private_tile
;
2053 tile
= group
->shared_tile
;
2057 group
->last_shared
= compute_tile_last_shared(gen
, tile
);
2060 /* Compute a privatized copy of all access relations from reference groups that
2061 * are mapped to private memory and store the result in gen->privatization.
2063 static void compute_private_access(struct gpu_gen
*gen
)
2066 isl_union_map
*private;
2068 if (!gen
->options
->use_private_memory
)
2071 private = isl_union_map_empty(isl_union_map_get_space(gen
->shared_sched
));
2073 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2074 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2076 if (gpu_array_is_read_only_scalar(array
))
2079 for (j
= 0; j
< array
->n_group
; ++j
) {
2080 if (!array
->groups
[j
]->private_tile
)
2083 private = isl_union_map_union(private,
2084 group_access_relation(array
->groups
[j
], 1, 1));
2088 if (isl_union_map_is_empty(private))
2089 isl_union_map_free(private);
2091 isl_union_map
*priv
;
2093 private = isl_union_map_apply_domain(private,
2094 isl_union_map_copy(gen
->shared_sched
));
2095 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
2096 private = isl_union_map_apply_domain(private, priv
);
2097 gen
->private_access
= private;
2101 /* Compute the size of the tile specified by "tile"
2102 * in number of elements and return the result.
2104 static __isl_give isl_val
*tile_size(isl_ctx
*ctx
, struct gpu_array_tile
*tile
)
2109 size
= isl_val_one(ctx
);
2111 for (i
= 0; i
< tile
->n
; ++i
)
2112 size
= isl_val_mul(size
, isl_val_copy(tile
->bound
[i
].size
));
2117 /* If max_shared_memory is not set to infinity (-1), then make
2118 * sure that the total amount of shared memory required by the
2119 * array reference groups mapped to shared memory is no larger
2120 * than this maximum.
2122 * We apply a greedy approach and discard (keep in global memory)
2123 * those groups that would result in a total memory size that
2124 * is larger than the maximum.
2126 static void check_shared_memory_bound(struct gpu_gen
*gen
)
2129 isl_val
*left
, *size
;
2131 if (gen
->options
->max_shared_memory
< 0)
2134 left
= isl_val_int_from_si(gen
->ctx
, gen
->options
->max_shared_memory
);
2136 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2137 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2139 for (j
= 0; j
< array
->n_group
; ++j
) {
2140 struct gpu_array_ref_group
*group
;
2142 group
= array
->groups
[j
];
2143 if (!group
->shared_tile
)
2146 size
= tile_size(gen
->ctx
, group
->shared_tile
);
2147 size
= isl_val_mul_ui(size
, array
->size
);
2149 if (isl_val_le(size
, left
)) {
2150 left
= isl_val_sub(left
, size
);
2155 group
->shared_tile
= free_tile(group
->shared_tile
);
2162 /* Given a description of an array tile "tile" and the "space"
2166 * where D represents the first shared_len schedule dimensions
2167 * and A represents the array, construct an isl_multi_aff
2169 * { [D[i] -> A[a]] -> A'[a'] }
2171 * with A' a scaled down copy of A according to the shifts and strides
2172 * in "tile". In particular,
2174 * a' = (a + shift(i))/stride
2176 * "insert_array" represents
2180 * and is used to insert A into the domain of functions that only
2183 static __isl_give isl_multi_aff
*strided_tile(
2184 struct gpu_array_tile
*tile
, __isl_keep isl_space
*space
,
2185 __isl_keep isl_multi_aff
*insert_array
)
2189 isl_multi_aff
*shift
;
2190 isl_multi_val
*stride
;
2192 isl_local_space
*ls
;
2193 isl_multi_aff
*tiling
;
2195 ctx
= isl_space_get_ctx(space
);
2196 space2
= isl_space_domain(isl_space_copy(space
));
2197 ls
= isl_local_space_from_space(space2
);
2198 space2
= isl_space_range(isl_space_copy(space
));
2199 stride
= isl_multi_val_zero(space2
);
2200 shift
= isl_multi_aff_zero(isl_space_copy(space
));
2202 for (i
= 0; i
< tile
->n
; ++i
) {
2203 struct gpu_array_bound
*bound
= &tile
->bound
[i
];
2207 if (tile
->bound
[i
].shift
) {
2208 stride_i
= isl_val_copy(bound
->stride
);
2209 shift_i
= isl_aff_copy(bound
->shift
);
2211 stride_i
= isl_val_one(ctx
);
2212 shift_i
= isl_aff_zero_on_domain(
2213 isl_local_space_copy(ls
));
2216 stride
= isl_multi_val_set_val(stride
, i
, stride_i
);
2217 shift
= isl_multi_aff_set_aff(shift
, i
, shift_i
);
2219 isl_local_space_free(ls
);
2221 shift
= isl_multi_aff_pullback_multi_aff(shift
,
2222 isl_multi_aff_copy(insert_array
));
2224 tiling
= isl_multi_aff_range_map(isl_space_copy(space
));
2225 tiling
= isl_multi_aff_add(tiling
, shift
);
2226 tiling
= isl_multi_aff_scale_down_multi_val(tiling
, stride
);
2231 /* Compute a tiling for the array reference group "group".
2233 * The tiling is of the form
2235 * { [D[i] -> A[a]] -> T[t] }
2237 * where D represents the first shared_len schedule dimensions,
2238 * A represents the global array and T represents the shared or
2239 * private memory tile. The name of T is the name of the local
2242 * If there is any stride in the accesses, then the mapping is
2244 * t = (a + shift(i))/stride - lb(i)
2246 * otherwise, it is simply
2250 static void compute_group_tiling(struct gpu_array_ref_group
*group
)
2253 struct gpu_array_tile
*tile
;
2254 struct gpu_array_info
*array
= group
->array
;
2256 isl_multi_aff
*tiling
, *lb
, *insert_array
;
2260 tile
= group
->private_tile
;
2262 tile
= group
->shared_tile
;
2266 space
= isl_map_get_space(group
->access
);
2267 insert_array
= isl_multi_aff_domain_map(isl_space_copy(space
));
2269 for (i
= 0; i
< tile
->n
; ++i
)
2270 if (tile
->bound
[i
].shift
)
2274 tiling
= strided_tile(tile
, space
, insert_array
);
2276 tiling
= isl_multi_aff_range_map(isl_space_copy(space
));
2278 lb
= isl_multi_aff_zero(space
);
2279 for (i
= 0; i
< tile
->n
; ++i
) {
2280 isl_aff
*lb_i
= isl_aff_copy(tile
->bound
[i
].lb
);
2281 lb
= isl_multi_aff_set_aff(lb
, i
, lb_i
);
2283 lb
= isl_multi_aff_pullback_multi_aff(lb
, insert_array
);
2285 tiling
= isl_multi_aff_sub(tiling
, lb
);
2287 p
= isl_printer_to_str(isl_multi_aff_get_ctx(tiling
));
2288 p
= print_array_name(p
, group
);
2289 local_name
= isl_printer_get_str(p
);
2290 isl_printer_free(p
);
2291 tiling
= isl_multi_aff_set_tuple_name(tiling
, isl_dim_out
, local_name
);
2294 tile
->tiling
= tiling
;
2297 /* Compute a tiling for all the array reference groups.
2299 static void compute_group_tilings(struct gpu_gen
*gen
)
2303 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2304 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2306 for (j
= 0; j
< array
->n_group
; ++j
)
2307 compute_group_tiling(array
->groups
[j
]);
2311 /* Fill up the groups array with singleton groups, i.e., one group
2312 * per reference, initializing the array, access, write, n_ref and refs fields.
2313 * In particular the access field is initialized to the scheduled
2314 * access relation of the array reference.
2316 * Return the number of elements initialized, i.e., the number of
2317 * active references in the current kernel.
2319 static int populate_array_references(struct gpu_array_info
*array
,
2320 __isl_keep isl_union_map
*sched
, struct gpu_array_ref_group
**groups
)
2324 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2327 for (i
= 0; i
< array
->n_ref
; ++i
) {
2328 isl_union_map
*umap
;
2330 struct gpu_array_ref_group
*group
;
2331 struct gpu_stmt_access
*access
= array
->refs
[i
];
2333 map
= isl_map_copy(access
->access
);
2334 umap
= isl_union_map_from_map(map
);
2335 umap
= isl_union_map_apply_domain(umap
,
2336 isl_union_map_copy(sched
));
2338 if (isl_union_map_is_empty(umap
)) {
2339 isl_union_map_free(umap
);
2343 map
= isl_map_from_union_map(umap
);
2344 map
= isl_map_detect_equalities(map
);
2346 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2348 group
->array
= array
;
2349 group
->access
= map
;
2350 group
->write
= access
->write
;
2351 group
->refs
= &array
->refs
[i
];
2354 groups
[n
++] = group
;
2360 /* If group->n_ref == 1, then group->refs was set by
2361 * populate_array_references to point directly into
2362 * group->array->refs and should not be freed.
2363 * If group->n_ref > 1, then group->refs was set by join_groups
2364 * to point to a newly allocated array.
2366 static void free_array_ref_group(struct gpu_array_ref_group
*group
)
2370 free_tile(group
->shared_tile
);
2371 free_tile(group
->private_tile
);
2372 isl_map_free(group
->access
);
2373 if (group
->n_ref
> 1)
2378 /* Given a map where the input dimensions represent the tile loops,
2379 * eliminate the innermost of those that have a fixed value
2380 * until we reach one that does not (obviously) have a fixed value.
2382 static __isl_give isl_map
*eliminate_fixed_inner_loops(
2383 __isl_take isl_map
*access
)
2387 n
= isl_map_dim(access
, isl_dim_in
);
2389 for (i
= n
- 1; i
>= 0; --i
) {
2390 if (!map_plain_is_fixed(access
, isl_dim_in
, i
))
2392 access
= isl_map_eliminate(access
, isl_dim_in
, i
, 1);
2397 /* Check if the access relations of group1 and group2 overlap within
2398 * the innermost loop. In particular, ignore any inner dimension
2399 * with a fixed value.
2400 * The copying to and from shared memory will be performed within
2401 * the innermost actual loop so we are only allowed to consider
2402 * the dimensions up to that innermost loop while checking whether
2403 * two access relations overlap.
2405 static int accesses_overlap(struct gpu_array_ref_group
*group1
,
2406 struct gpu_array_ref_group
*group2
)
2409 isl_map
*access1
, *access2
;
2411 access1
= isl_map_copy(group1
->access
);
2412 access1
= eliminate_fixed_inner_loops(access1
);
2413 access2
= isl_map_copy(group2
->access
);
2414 access2
= eliminate_fixed_inner_loops(access2
);
2415 access1
= isl_map_intersect(access1
, access2
);
2416 empty
= isl_map_is_empty(access1
);
2417 isl_map_free(access1
);
2422 /* Combine the given two groups into a single group, containing
2423 * the references of both groups.
2425 static struct gpu_array_ref_group
*join_groups(
2426 struct gpu_array_ref_group
*group1
,
2427 struct gpu_array_ref_group
*group2
)
2431 struct gpu_array_ref_group
*group
;
2433 ctx
= isl_map_get_ctx(group1
->access
);
2434 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2436 group
->array
= group1
->array
;
2437 group
->access
= isl_map_union(isl_map_copy(group1
->access
),
2438 isl_map_copy(group2
->access
));
2439 group
->write
= group1
->write
|| group2
->write
;
2440 group
->n_ref
= group1
->n_ref
+ group2
->n_ref
;
2441 group
->refs
= isl_alloc_array(ctx
, struct gpu_stmt_access
*,
2443 assert(group
->refs
);
2444 for (i
= 0; i
< group1
->n_ref
; ++i
)
2445 group
->refs
[i
] = group1
->refs
[i
];
2446 for (i
= 0; i
< group2
->n_ref
; ++i
)
2447 group
->refs
[group1
->n_ref
+ i
] = group2
->refs
[i
];
2452 /* Combine the given two groups into a single group and free
2453 * the original two groups.
2455 static struct gpu_array_ref_group
*join_groups_and_free(
2456 struct gpu_array_ref_group
*group1
,
2457 struct gpu_array_ref_group
*group2
)
2459 struct gpu_array_ref_group
*group
;
2461 group
= join_groups(group1
, group2
);
2462 free_array_ref_group(group1
);
2463 free_array_ref_group(group2
);
2467 /* Compute the private and/or shared memory tiles for the array
2468 * reference group "group" of array "array".
2470 * If the array is a read-only scalar or if the user requested
2471 * not to use shared or private memory, then we do not need to do anything.
2473 * We only try to compute a shared memory tile if there is any reuse
2474 * or if the access is not coalesced.
2476 * For computing a private memory tile, we also require that there is
2477 * some reuse. Moreover, we require that the access is private
2478 * to the thread. That is, we check that any given array element
2479 * is only accessed by a single thread.
2480 * We compute an access relation that maps the shared tile loop iterators
2481 * and the shared point loop iterators that will be wrapped over the
2482 * threads to the array elements.
2483 * We actually check that those iterators that will be wrapped
2484 * partition the array space. This check is stricter than necessary
2485 * since several iterations may be mapped onto the same thread
2486 * and then they could be allowed to access the same memory elements,
2487 * but our check does not allow this situation.
2489 * We also check that the index expression only depends on parallel
2490 * loops. That way, we can move those loops innermost and unroll them.
2491 * Again, we use a test that is stricter than necessary.
2492 * We actually check whether the index expression only depends
2493 * on the iterators that are wrapped over the threads.
2494 * These are necessarily parallel, but there may be more parallel loops.
2496 * Combining the injectivity of the first test with the single-valuedness
2497 * of the second test, we simply test for bijectivity.
2499 * If it turns out we can use registers, we compute the private memory
2500 * tile size using can_tile, after introducing a dependence
2501 * on the thread indices.
2503 static void compute_group_bounds_core(struct gpu_gen
*gen
,
2504 struct gpu_array_ref_group
*group
)
2506 isl_ctx
*ctx
= isl_space_get_ctx(group
->array
->dim
);
2507 isl_union_map
*access
;
2508 int n_index
= group
->array
->n_index
;
2511 int use_shared
= gen
->options
->use_shared_memory
;
2512 int use_private
= gen
->options
->use_private_memory
;
2514 if (!use_shared
&& !use_private
)
2516 if (gpu_array_is_read_only_scalar(group
->array
))
2519 access
= group_access_relation(group
, 1, 1);
2520 no_reuse
= isl_union_map_is_injective(access
);
2522 if (use_shared
&& (!no_reuse
|| !access_is_coalesced(gen
, access
))) {
2523 group
->shared_tile
= create_tile(ctx
, group
->array
->n_index
);
2524 if (!can_tile(group
->access
, group
->shared_tile
))
2525 group
->shared_tile
= free_tile(group
->shared_tile
);
2528 if (!use_private
|| no_reuse
) {
2529 isl_union_map_free(access
);
2533 access
= isl_union_map_apply_domain(access
,
2534 isl_union_map_copy(gen
->shared_sched
));
2536 acc
= isl_map_from_union_map(access
);
2538 if (!access_is_bijective(gen
, acc
)) {
2543 group
->private_tile
= create_tile(gen
->ctx
, n_index
);
2544 acc
= isl_map_apply_domain(acc
, isl_map_copy(gen
->privatization
));
2545 if (!can_tile(acc
, group
->private_tile
))
2546 group
->private_tile
= free_tile(group
->private_tile
);
2551 /* Compute the private and/or shared memory tiles for the array
2552 * reference group "group" of array "array" and set last_shared.
2554 static void compute_group_bounds(struct gpu_gen
*gen
,
2555 struct gpu_array_ref_group
*group
)
2557 compute_group_bounds_core(gen
, group
);
2558 set_last_shared(gen
, group
);
2561 /* If two groups have overlapping access relations (as determined by
2562 * the "overlap" function) and if one of them involves a write,
2563 * then merge the two groups into one.
2564 * If "compute_bounds" is set, then call compute_group_bounds
2565 * on the merged groups.
2567 * Return the updated number of groups.
2569 static int group_writes(struct gpu_gen
*gen
,
2570 int n
, struct gpu_array_ref_group
**groups
,
2571 int (*overlap
)(struct gpu_array_ref_group
*group1
,
2572 struct gpu_array_ref_group
*group2
), int compute_bounds
)
2576 for (i
= 0; i
< n
; ++i
) {
2577 for (j
= n
- 1; j
> i
; --j
) {
2578 if (!groups
[i
]->write
&& !groups
[j
]->write
)
2581 if (!overlap(groups
[i
], groups
[j
]))
2584 groups
[i
] = join_groups_and_free(groups
[i
], groups
[j
]);
2586 compute_group_bounds(gen
, groups
[i
]);
2588 groups
[j
] = groups
[n
- 1];
2596 /* If two groups have overlapping access relations (within the innermost
2597 * loop) and if one of them involves a write, then merge the two groups
2600 * Return the updated number of groups.
2602 static int group_overlapping_writes(struct gpu_gen
*gen
,
2603 int n
, struct gpu_array_ref_group
**groups
)
2605 return group_writes(gen
, n
, groups
, &accesses_overlap
, 0);
2608 /* Check if the access relations of group1 and group2 overlap within
2609 * the outermost min(group1->last_shared, group2->last_shared) loops.
2611 static int last_shared_accesses_overlap(struct gpu_array_ref_group
*group1
,
2612 struct gpu_array_ref_group
*group2
)
2617 isl_map
*map_i
, *map_j
, *map
;
2619 last_shared
= group1
->last_shared
;
2620 if (group2
->last_shared
< last_shared
)
2621 last_shared
= group2
->last_shared
;
2622 map_i
= isl_map_copy(group1
->access
);
2623 dim
= isl_map_dim(map_i
, isl_dim_in
);
2624 map_i
= isl_map_eliminate(map_i
, isl_dim_in
,
2625 last_shared
+ 1, dim
- (last_shared
+ 1));
2626 map_j
= isl_map_copy(group2
->access
);
2627 map_j
= isl_map_eliminate(map_j
, isl_dim_in
,
2628 last_shared
+ 1, dim
- (last_shared
+ 1));
2629 map
= isl_map_intersect(map_i
, map_j
);
2630 empty
= isl_map_is_empty(map
);
2636 /* If two groups have overlapping access relations (within the outer
2637 * last_shared loops) and if one of them involves a write,
2638 * then merge the two groups into one.
2640 * Return the updated number of groups.
2642 static int group_last_shared_overlapping_writes(struct gpu_gen
*gen
, int n
,
2643 struct gpu_array_ref_group
**groups
)
2645 return group_writes(gen
, n
, groups
, &last_shared_accesses_overlap
, 1);
2648 /* Is the size of the tile specified by "tile" smaller than the sum of
2649 * the sizes of the tiles specified by "tile1" and "tile2"?
2651 static int smaller_tile(isl_ctx
*ctx
, struct gpu_array_tile
*tile
,
2652 struct gpu_array_tile
*tile1
, struct gpu_array_tile
*tile2
)
2655 isl_val
*size
, *size1
, *size2
;
2657 size
= tile_size(ctx
, tile
);
2658 size1
= tile_size(ctx
, tile1
);
2659 size2
= tile_size(ctx
, tile2
);
2661 size
= isl_val_sub(size
, size1
);
2662 size
= isl_val_sub(size
, size2
);
2663 smaller
= isl_val_is_neg(size
);
2670 /* Given an initial grouping of array references and shared memory tiles
2671 * for each group that allows for a shared memory tile, merge two groups
2672 * if both have a shared memory tile, the merged group also has
2673 * a shared memory tile and the size of the tile for the merge group
2674 * is smaller than the sum of the tile sizes of the individual groups.
2676 * If merging two groups decreases the "last_shared" dimension of
2677 * one or both of the two groups, then we need to check for overlapping
2680 * Return the number of groups after merging.
2682 static int group_common_shared_memory_tile(struct gpu_gen
*gen
,
2683 struct gpu_array_info
*array
, int n
,
2684 struct gpu_array_ref_group
**groups
)
2687 int recompute_overlap
= 0;
2688 isl_ctx
*ctx
= isl_space_get_ctx(array
->dim
);
2690 for (i
= 0; i
< n
; ++i
) {
2691 if (!groups
[i
]->shared_tile
)
2693 for (j
= n
- 1; j
> i
; --j
) {
2696 struct gpu_array_ref_group
*group
;
2698 if (!groups
[j
]->shared_tile
)
2701 map
= isl_map_intersect(isl_map_copy(groups
[i
]->access
),
2702 isl_map_copy(groups
[j
]->access
));
2703 empty
= isl_map_is_empty(map
);
2709 group
= join_groups(groups
[i
], groups
[j
]);
2710 compute_group_bounds(gen
, group
);
2711 if (!group
->shared_tile
||
2712 !smaller_tile(ctx
, group
->shared_tile
,
2713 groups
[i
]->shared_tile
,
2714 groups
[j
]->shared_tile
)) {
2715 free_array_ref_group(group
);
2719 if (group
->last_shared
< groups
[i
]->last_shared
||
2720 group
->last_shared
< groups
[j
]->last_shared
)
2721 recompute_overlap
= 1;
2722 free_array_ref_group(groups
[i
]);
2723 free_array_ref_group(groups
[j
]);
2726 groups
[j
] = groups
[n
- 1];
2731 if (recompute_overlap
)
2732 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
2736 /* Set array->n_group and array->groups to n and groups.
2738 * Additionally, set the "nr" field of each group
2739 * and the "group" field of each reference in each group.
2741 static void set_array_groups(struct gpu_array_info
*array
,
2742 int n
, struct gpu_array_ref_group
**groups
)
2747 array
->groups
= groups
;
2749 for (i
= 0; i
< n
; ++i
) {
2752 for (j
= 0; j
< groups
[i
]->n_ref
; ++j
)
2753 groups
[i
]->refs
[j
]->group
= i
;
2757 /* Group array references that should be considered together when
2758 * deciding whether to access them from private, shared or global memory.
2760 * In particular, if two array references overlap and if one of them
2761 * is a write, then the two references are grouped together.
2762 * We first perform an initial grouping based only on the access relation.
2763 * After computing shared and private memory tiles, we check for
2764 * overlapping writes again, but this time taking into account
2765 * the "last_shared" property.
2767 * Furthermore, if two groups admit a shared memory tile and if the
2768 * combination of the two also admits a shared memory tile, we merge
2771 static void group_array_references(struct gpu_gen
*gen
,
2772 struct gpu_array_info
*array
, __isl_keep isl_union_map
*sched
)
2776 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2777 struct gpu_array_ref_group
**groups
;
2779 groups
= isl_calloc_array(ctx
, struct gpu_array_ref_group
*,
2783 n
= populate_array_references(array
, sched
, groups
);
2785 n
= group_overlapping_writes(gen
, n
, groups
);
2787 for (i
= 0; i
< n
; ++i
)
2788 compute_group_bounds(gen
, groups
[i
]);
2790 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
2792 n
= group_common_shared_memory_tile(gen
, array
, n
, groups
);
2794 set_array_groups(array
, n
, groups
);
2797 /* Take tiled_sched, project it onto the shared tile loops and
2798 * the loops that will be wrapped over the threads and
2799 * store the result in gen->shared_sched.
2800 * Also compute a projection that projects out the loops that will be
2801 * wrapped over the threads and store this projection in gen->shared_proj.
2803 static void compute_shared_sched(struct gpu_gen
*gen
)
2808 isl_union_map
*sched
;
2810 sched
= isl_union_map_copy(gen
->tiled_sched
);
2812 dim
= isl_union_map_get_space(sched
);
2813 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
2814 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
2816 dim
= isl_union_map_get_space(sched
);
2817 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
2819 gen
->shared_sched
= sched
;
2820 gen
->shared_proj
= isl_union_map_from_map(proj
);
2823 /* Group references of all arrays in the program.
2825 static void group_references(struct gpu_gen
*gen
)
2828 isl_union_map
*sched
;
2830 sched
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
2831 isl_union_map_copy(gen
->shared_proj
));
2833 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
2834 group_array_references(gen
, &gen
->prog
->array
[i
], sched
);
2836 isl_union_map_free(sched
);
2839 /* Free all array information that is local to the current kernel.
2841 static void free_local_array_info(struct gpu_gen
*gen
)
2845 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2846 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2848 for (j
= 0; j
< array
->n_group
; ++j
)
2849 free_array_ref_group(array
->groups
[j
]);
2850 free(array
->groups
);
2854 /* Compute the size of a bounding box around the origin and "set",
2855 * where "set" is assumed to contain only non-negative elements.
2856 * In particular, compute the maximal value of "set" in each direction
2859 static __isl_give isl_multi_pw_aff
*extract_size(__isl_take isl_set
*set
,
2860 __isl_keep isl_set
*context
)
2863 isl_multi_pw_aff
*mpa
;
2865 n
= isl_set_dim(set
, isl_dim_set
);
2866 mpa
= isl_multi_pw_aff_zero(isl_set_get_space(set
));
2867 for (i
= 0; i
< n
; ++i
) {
2872 bound
= isl_set_dim_max(isl_set_copy(set
), i
);
2873 bound
= isl_pw_aff_coalesce(bound
);
2874 bound
= isl_pw_aff_gist(bound
, isl_set_copy(context
));
2876 space
= isl_pw_aff_get_domain_space(bound
);
2877 one
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
2878 one
= isl_aff_add_constant_si(one
, 1);
2879 bound
= isl_pw_aff_add(bound
, isl_pw_aff_from_aff(one
));
2880 mpa
= isl_multi_pw_aff_set_pw_aff(mpa
, i
, bound
);
2887 /* Compute the effective grid size as a list of the sizes in each dimension.
2889 * The grid size specified by the user or set by default
2890 * in read_grid_sizes() and applied in tile_schedule(),
2891 * may be too large for the given code in the sense that
2892 * it may contain blocks that don't need to execute anything.
2893 * We therefore don't return this grid size, but instead the
2894 * smallest grid size that ensures that all blocks that actually
2895 * execute code are included in the grid.
2897 * We first extract a description of the grid, i.e., the possible values
2898 * of the block ids, from gen->tiled_sched.
2899 * The block ids are parameters in gen->tiled_sched.
2900 * We simply need to change them into set dimensions.
2902 * Then, for each block dimension, we compute the maximal value of the block id
2905 static __isl_give isl_multi_pw_aff
*extract_grid_size(struct gpu_gen
*gen
,
2906 struct ppcg_kernel
*kernel
)
2911 grid
= isl_union_map_params(isl_union_map_copy(gen
->tiled_sched
));
2912 grid
= isl_set_from_params(grid
);
2913 grid
= isl_set_add_dims(grid
, isl_dim_set
, gen
->n_grid
);
2914 for (i
= 0; i
< gen
->n_grid
; ++i
) {
2918 snprintf(name
, sizeof(name
), "b%d", i
);
2919 pos
= isl_set_find_dim_by_name(grid
, isl_dim_param
, name
);
2921 grid
= isl_set_equate(grid
, isl_dim_param
, pos
, isl_dim_set
, i
);
2922 grid
= isl_set_project_out(grid
, isl_dim_param
, pos
, 1);
2925 return extract_size(grid
, kernel
->context
);
2928 /* Compute the size of a fixed bounding box around the origin and "set",
2929 * where "set" is assumed to contain only non-negative elements,
2930 * and store the results in "size".
2931 * In particular, compute the maximal value of "set" in each direction
2934 static void extract_fixed_size(__isl_take isl_set
*set
, int *size
)
2937 isl_local_space
*ls
;
2940 n
= isl_set_dim(set
, isl_dim_set
);
2941 ls
= isl_local_space_from_space(isl_set_get_space(set
));
2942 obj
= isl_aff_zero_on_domain(ls
);
2943 for (i
= 0; i
< n
; ++i
) {
2946 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 1);
2947 max
= isl_set_max_val(set
, obj
);
2948 size
[i
] = isl_val_get_num_si(max
) + 1;
2950 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 0);
2956 /* Compute the effective block size as a list of the sizes in each dimension
2957 * and store the sizes in kernel->block_dim.
2959 * The block size specified by the user or set by default
2960 * in read_block_sizes() and applied in thread_tile_schedule(),
2961 * may be too large for the given code in the sense that
2962 * it may contain threads that don't need to execute anything.
2963 * We therefore don't store this block size in kernel->block_dim,
2964 * but instead the smallest block size that ensures that all threads
2965 * that actually execute code are included in the block.
2967 * The current implementation eliminates all parameters, ensuring
2968 * that the size is a fixed constant in each dimension.
2969 * In principle we could also compute parametric sizes.
2970 * We would have to make sure to project out all b%d and t%d parameters,
2973 static void extract_block_size(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
2978 isl_multi_pw_aff
*mpa
;
2980 block
= isl_union_map_params(isl_union_map_copy(gen
->local_sched
));
2981 block
= isl_set_from_params(block
);
2982 block
= isl_set_add_dims(block
, isl_dim_set
, gen
->n_block
);
2983 kernel
->n_block
= gen
->n_block
;
2984 for (i
= 0; i
< gen
->n_block
; ++i
) {
2988 snprintf(name
, sizeof(name
), "t%d", i
);
2989 pos
= isl_set_find_dim_by_name(block
, isl_dim_param
, name
);
2991 block
= isl_set_equate(block
, isl_dim_param
, pos
,
2994 nparam
= isl_set_dim(block
, isl_dim_param
);
2995 block
= isl_set_project_out(block
, isl_dim_param
, 0, nparam
);
2997 extract_fixed_size(block
, kernel
->block_dim
);
3000 void ppcg_kernel_free(void *user
)
3002 struct ppcg_kernel
*kernel
= user
;
3008 isl_multi_pw_aff_free(kernel
->grid_size
);
3009 isl_set_free(kernel
->context
);
3010 isl_union_set_free(kernel
->arrays
);
3011 isl_space_free(kernel
->space
);
3012 isl_ast_node_free(kernel
->tree
);
3014 for (i
= 0; i
< kernel
->n_array
; ++i
)
3015 isl_pw_aff_list_free(kernel
->array
[i
].bound
);
3016 free(kernel
->array
);
3018 for (i
= 0; i
< kernel
->n_var
; ++i
) {
3019 free(kernel
->var
[i
].name
);
3020 isl_vec_free(kernel
->var
[i
].size
);
3027 static void create_kernel_var(isl_ctx
*ctx
, struct gpu_array_ref_group
*group
,
3028 struct ppcg_kernel_var
*var
)
3031 struct gpu_array_tile
*tile
;
3035 var
->array
= group
->array
;
3037 tile
= group
->private_tile
;
3038 var
->type
= ppcg_access_private
;
3040 tile
= group
->shared_tile
;
3041 var
->type
= ppcg_access_shared
;
3044 p
= isl_printer_to_str(ctx
);
3045 p
= print_array_name(p
, group
);
3046 var
->name
= isl_printer_get_str(p
);
3047 isl_printer_free(p
);
3049 var
->size
= isl_vec_alloc(ctx
, group
->array
->n_index
);
3051 for (j
= 0; j
< group
->array
->n_index
; ++j
)
3052 var
->size
= isl_vec_set_element_val(var
->size
, j
,
3053 isl_val_copy(tile
->bound
[j
].size
));
3056 static void create_kernel_vars(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3061 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3062 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3064 for (j
= 0; j
< array
->n_group
; ++j
) {
3065 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3066 if (group
->private_tile
|| group
->shared_tile
)
3072 kernel
->var
= isl_calloc_array(gen
->ctx
, struct ppcg_kernel_var
, n
);
3073 assert(kernel
->var
);
3076 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3077 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3079 for (j
= 0; j
< array
->n_group
; ++j
) {
3080 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3081 if (!group
->private_tile
&& !group
->shared_tile
)
3083 create_kernel_var(gen
->ctx
, group
, &kernel
->var
[n
]);
3089 /* The sizes of the arrays on the host that have been computed by
3090 * extract_array_info may depend on the parameters. Use the extra
3091 * constraints on the parameters that are valid at "host_domain"
3092 * to simplify these expressions and store the results in kernel->array.
3094 static void localize_bounds(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
,
3095 __isl_keep isl_set
*host_domain
)
3100 kernel
->array
= isl_calloc_array(gen
->ctx
,
3101 struct gpu_local_array_info
, gen
->prog
->n_array
);
3102 assert(kernel
->array
);
3103 kernel
->n_array
= gen
->prog
->n_array
;
3105 context
= isl_set_copy(host_domain
);
3106 context
= isl_set_params(context
);
3108 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3109 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3110 isl_pw_aff_list
*local
;
3112 if (array
->n_group
== 0)
3115 local
= isl_pw_aff_list_alloc(gen
->ctx
, array
->n_index
);
3117 for (j
= 0; j
< array
->n_index
; ++j
) {
3120 pwaff
= isl_pw_aff_copy(array
->bound
[j
]);
3121 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
3122 local
= isl_pw_aff_list_add(local
, pwaff
);
3125 kernel
->array
[i
].bound
= local
;
3127 isl_set_free(context
);
3130 /* Find the element in gen->stmt that has the given "id".
3131 * Return NULL if no such gpu_stmt can be found.
3133 static struct gpu_stmt
*find_stmt(struct gpu_prog
*prog
, __isl_keep isl_id
*id
)
3137 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
3138 if (id
== prog
->stmts
[i
].id
)
3142 return i
< prog
->n_stmts
? &prog
->stmts
[i
] : NULL
;
3145 /* Set gen->tile_len and gen->n_parallel to those of the statement
3146 * affected by the first map (part of the schedule)
3147 * on which this function is called.
3148 * Because of the way the schedule is constructed, the other statements
3149 * in the list, if any, should have the same values for these properties.
3151 static int extract_tile_len(__isl_take isl_map
*map
, void *user
)
3153 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3155 struct gpu_stmt
*stmt
;
3157 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
3158 stmt
= find_stmt(gen
->prog
, id
);
3164 isl_die(gen
->ctx
, isl_error_unknown
,
3165 "statement not found", return -1);
3167 gen
->tile_len
= stmt
->tile_len
;
3168 gen
->n_parallel
= stmt
->n_parallel
;
3173 void ppcg_kernel_stmt_free(void *user
)
3176 struct ppcg_kernel_stmt
*stmt
= user
;
3181 switch (stmt
->type
) {
3182 case ppcg_kernel_copy
:
3183 isl_ast_expr_free(stmt
->u
.c
.index
);
3184 isl_ast_expr_free(stmt
->u
.c
.local_index
);
3186 case ppcg_kernel_domain
:
3187 isl_id_to_ast_expr_free(stmt
->u
.d
.ref2expr
);
3189 case ppcg_kernel_sync
:
3196 /* Set the options of "context" to
3198 * { space -> [x] : x >= first }
3200 static __isl_give isl_ast_build
*set_unroll(
3201 __isl_take isl_ast_build
*build
, __isl_take isl_space
*space
,
3208 ctx
= isl_ast_build_get_ctx(build
);
3210 space
= isl_space_from_domain(space
);
3211 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
3212 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "unroll");
3213 unroll
= isl_map_universe(space
);
3214 unroll
= isl_map_lower_bound_si(unroll
, isl_dim_out
, 0, first
);
3215 opt
= isl_union_map_from_map(unroll
);
3217 build
= isl_ast_build_set_options(build
, opt
);
3222 /* Return a list of isl_ids of the form "prefix%d".
3224 static __isl_give isl_id_list
*generate_names(isl_ctx
*ctx
,
3225 int n
, const char *prefix
)
3231 names
= isl_id_list_alloc(ctx
, n
);
3232 for (i
= 0; i
< n
; ++i
) {
3235 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
3236 id
= isl_id_alloc(ctx
, name
, NULL
);
3237 names
= isl_id_list_add(names
, id
);
3243 /* Extend the schedule "schedule" with the part of "extension"
3244 * starting at "first" up to "len".
3246 static __isl_give isl_union_map
*extend_schedule(
3247 __isl_take isl_union_map
*schedule
,
3248 __isl_take isl_union_map
*extension
, int first
, int len
)
3252 isl_union_map
*umap
;
3255 space
= isl_union_map_get_space(schedule
);
3256 space
= isl_space_set_from_params(space
);
3257 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
3258 proj
= isl_set_identity(isl_set_universe(space
));
3259 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, first
);
3260 extension
= isl_union_map_apply_range(extension
,
3261 isl_union_map_from_map(proj
));
3263 schedule
= isl_union_map_range_product(schedule
, extension
);
3268 /* Return the gpu_stmt_access in the list "accesses" that corresponds
3271 static struct gpu_stmt_access
*find_access(struct gpu_stmt_access
*accesses
,
3272 __isl_keep isl_id
*ref_id
)
3274 struct gpu_stmt_access
*access
;
3276 for (access
= accesses
; access
; access
= access
->next
)
3277 if (access
->ref_id
== ref_id
)
3283 /* Return the index of the array called "name" in the list of arrays.
3285 static int find_array_index(struct gpu_gen
*gen
, const char *name
)
3289 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
3290 if (!strcmp(name
, gen
->prog
->array
[i
].name
))
3296 /* Internal data structure for the index and AST expression transformation
3297 * callbacks for pet_stmt_build_ast_exprs.
3299 * "accesses" is the list of gpu_stmt_access in the statement.
3300 * "iterator_map" expresses the statement iterators in terms of
3301 * the AST loop iterators.
3302 * "sched2shared" expresses the first shared_len dimensions of
3303 * the computed schedule in terms of the AST loop iterators.
3305 * The following fields are set in transform_index and used in transform_expr.
3306 * "array" is the array that is being accessed.
3307 * "global" is set if the global array is accessed (rather than
3308 * shared/private memory).
3309 * "bound" refers to the bounds on the array specialized to the current kernel.
3311 struct ppcg_transform_data
{
3312 struct gpu_gen
*gen
;
3313 struct gpu_stmt_access
*accesses
;
3314 isl_pw_multi_aff
*iterator_map
;
3315 isl_pw_multi_aff
*sched2shared
;
3317 struct gpu_array_info
*array
;
3319 isl_pw_aff_list
*bound
;
3322 /* Index transformation callback for pet_stmt_build_ast_exprs.
3324 * "index" expresses the array indices in terms of statement iterators
3326 * We first reformulate "index" in terms of the AST loop iterators.
3327 * Then we check if we are accessing the global array or
3328 * a shared/private copy. In the former case, we simply return
3329 * the updated index. If "index" is an affine expression rather
3330 * than an array access, then we also return the updated index here.
3332 * Otherwise, we apply the tiling to the index.
3333 * This tiling is of the form
3337 * The index is of the form
3341 * We update the tiling to refer to the AST loop iteratos
3345 * and modify index to keep track of those iterators
3349 * Combining these two yields a tiled index expression in terms
3350 * of the AST loop iterators
3354 static __isl_give isl_multi_pw_aff
*transform_index(
3355 __isl_take isl_multi_pw_aff
*index
, __isl_keep isl_id
*ref_id
,
3358 struct ppcg_transform_data
*data
= user
;
3359 struct gpu_stmt_access
*access
;
3360 struct gpu_array_ref_group
*group
;
3361 struct gpu_array_tile
*tile
;
3362 isl_pw_multi_aff
*iterator_map
;
3366 isl_multi_pw_aff
*tiling
;
3367 isl_pw_multi_aff
*pma
;
3368 isl_multi_pw_aff
*mpa
;
3372 iterator_map
= isl_pw_multi_aff_copy(data
->iterator_map
);
3373 index
= isl_multi_pw_aff_pullback_pw_multi_aff(index
, iterator_map
);
3375 access
= find_access(data
->accesses
, ref_id
);
3378 if (!isl_map_has_tuple_name(access
->access
, isl_dim_out
))
3381 name
= isl_map_get_tuple_name(access
->access
, isl_dim_out
);
3382 i
= find_array_index(data
->gen
, name
);
3384 isl_die(isl_multi_pw_aff_get_ctx(index
), isl_error_internal
,
3385 "cannot find array reference group",
3386 return isl_multi_pw_aff_free(index
));
3388 data
->array
= &data
->gen
->prog
->array
[i
];
3389 data
->bound
= data
->gen
->kernel
->array
[i
].bound
;
3390 group
= data
->array
->groups
[access
->group
];
3391 tile
= group
->private_tile
;
3393 tile
= group
->shared_tile
;
3394 data
->global
= !tile
;
3398 space
= isl_space_range(isl_multi_pw_aff_get_space(index
));
3399 space
= isl_space_map_from_set(space
);
3400 pma
= isl_pw_multi_aff_identity(space
);
3401 pma
= isl_pw_multi_aff_product(
3402 isl_pw_multi_aff_copy(data
->sched2shared
), pma
);
3403 tiling
= isl_multi_pw_aff_from_multi_aff(
3404 isl_multi_aff_copy(tile
->tiling
));
3405 tiling
= isl_multi_pw_aff_pullback_pw_multi_aff(tiling
, pma
);
3407 space
= isl_space_domain(isl_multi_pw_aff_get_space(index
));
3408 space
= isl_space_map_from_set(space
);
3409 mpa
= isl_multi_pw_aff_identity(space
);
3410 index
= isl_multi_pw_aff_range_product(mpa
, index
);
3411 index
= isl_multi_pw_aff_pullback_multi_pw_aff(tiling
, index
);
3416 /* Dereference "expr" by adding an index [0].
3417 * The original "expr" is assumed not to have any indices.
3419 static __isl_give isl_ast_expr
*dereference(__isl_take isl_ast_expr
*expr
)
3423 isl_ast_expr_list
*list
;
3425 ctx
= isl_ast_expr_get_ctx(expr
);
3426 res
= isl_ast_expr_from_val(isl_val_zero(ctx
));
3427 list
= isl_ast_expr_list_from_ast_expr(res
);
3428 res
= isl_ast_expr_get_op_arg(expr
, 0);
3429 res
= isl_ast_expr_access(res
, list
);
3430 isl_ast_expr_free(expr
);
3435 /* AST expression transformation callback for pet_stmt_build_ast_exprs.
3437 * If the AST expression refers to a global scalar that is not
3438 * a read-only scalar, then its address was passed to the kernel and
3439 * we need to dereference it.
3441 * If the AST expression refers to an access to a global array,
3442 * then we linearize the access exploiting the bounds in data->bounds.
3444 static __isl_give isl_ast_expr
*transform_expr(__isl_take isl_ast_expr
*expr
,
3445 __isl_keep isl_id
*id
, void *user
)
3451 isl_ast_expr_list
*list
;
3452 isl_ast_build
*build
;
3453 struct ppcg_transform_data
*data
= user
;
3457 if (gpu_array_is_read_only_scalar(data
->array
))
3461 if (data
->array
->n_index
== 0)
3462 return dereference(expr
);
3464 ctx
= isl_ast_expr_get_ctx(expr
);
3465 context
= isl_set_universe(isl_space_params_alloc(ctx
, 0));
3466 build
= isl_ast_build_from_context(context
);
3468 n
= isl_ast_expr_get_op_n_arg(expr
);
3469 res
= isl_ast_expr_get_op_arg(expr
, 1);
3470 for (i
= 2; i
< n
; ++i
) {
3471 isl_pw_aff
*bound_i
;
3472 isl_ast_expr
*expr_i
;
3474 bound_i
= isl_pw_aff_list_get_pw_aff(data
->bound
, i
- 1);
3475 expr_i
= isl_ast_build_expr_from_pw_aff(build
, bound_i
);
3476 res
= isl_ast_expr_mul(res
, expr_i
);
3477 expr_i
= isl_ast_expr_get_op_arg(expr
, i
);
3478 res
= isl_ast_expr_add(res
, expr_i
);
3481 isl_ast_build_free(build
);
3483 list
= isl_ast_expr_list_from_ast_expr(res
);
3484 res
= isl_ast_expr_get_op_arg(expr
, 0);
3485 res
= isl_ast_expr_access(res
, list
);
3487 isl_ast_expr_free(expr
);
3492 /* This function is called for each instance of a user statement
3495 * We attach a struct ppcg_kernel_stmt to the "node", containing
3496 * a computed AST expression for each access.
3497 * These AST expressions are computed from iterator_map,
3498 * which expresses the domain
3499 * elements in terms of the generated loops, and sched2shared,
3500 * which expresses the first shared_len dimensions of the schedule
3501 * computed by PPCG in terms of the generated loops.
3503 static __isl_give isl_ast_node
*at_each_domain(__isl_take isl_ast_node
*node
,
3504 __isl_keep isl_ast_build
*build
, void *user
)
3506 struct ppcg_transform_data data
;
3507 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3508 struct ppcg_kernel_stmt
*stmt
;
3510 isl_pw_multi_aff
*sched2shared
;
3512 isl_pw_multi_aff
*iterator_map
;
3513 isl_ast_expr
*expr
, *arg
;
3514 isl_union_map
*schedule
;
3516 struct gpu_stmt_access
*access
;
3518 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3520 return isl_ast_node_free(node
);
3522 expr
= isl_ast_node_user_get_expr(node
);
3523 arg
= isl_ast_expr_get_op_arg(expr
, 0);
3524 id
= isl_ast_expr_get_id(arg
);
3526 schedule
= isl_ast_build_get_schedule(build
);
3527 map
= isl_map_reverse(isl_map_from_union_map(schedule
));
3528 iterator_map
= isl_pw_multi_aff_from_map(map
);
3529 sched2shared
= compute_sched_to_shared(gen
,
3530 isl_pw_multi_aff_copy(iterator_map
));
3532 stmt
->type
= ppcg_kernel_domain
;
3533 stmt
->u
.d
.stmt
= find_stmt(gen
->prog
, id
);
3534 if (!stmt
->u
.d
.stmt
)
3538 data
.accesses
= stmt
->u
.d
.stmt
->accesses
;
3539 data
.iterator_map
= iterator_map
;
3540 data
.sched2shared
= sched2shared
;
3541 stmt
->u
.d
.ref2expr
= pet_stmt_build_ast_exprs(stmt
->u
.d
.stmt
->stmt
,
3542 build
, &transform_index
, &data
,
3543 &transform_expr
, &data
);
3546 isl_pw_multi_aff_free(iterator_map
);
3547 isl_pw_multi_aff_free(sched2shared
);
3548 isl_ast_expr_free(arg
);
3549 isl_ast_expr_free(expr
);
3551 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3552 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3553 return isl_ast_node_set_annotation(node
, id
);
3556 isl_pw_multi_aff_free(iterator_map
);
3557 ppcg_kernel_stmt_free(stmt
);
3558 isl_pw_multi_aff_free(sched2shared
);
3559 return isl_ast_node_free(node
);
3562 /* This function is called when code has been generated for the shared
3563 * tile loops. The "schedule" refers only to the original statements.
3565 * We extend the schedule with that part of gen->local_sched that hasn't
3566 * been taken into account yet. This introduces parameters referring
3567 * to thread ids in the schedule, so we add them (with the appropriate
3568 * bounds to the context as well).
3569 * Finally, we set the appropriate unrolling options
3570 * if gen->first_unroll is set.
3572 static __isl_give isl_ast_node
*create_domain_leaf(
3573 __isl_take isl_union_map
*schedule
, __isl_take isl_ast_build
*build
,
3576 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3578 isl_union_map
*sched
;
3581 isl_id_list
*iterators
;
3584 schedule
= extend_schedule(schedule
,
3585 isl_union_map_copy(gen
->local_sched
),
3586 gen
->shared_len
, gen
->thread_tiled_len
);
3588 space
= isl_ast_build_get_schedule_space(build
);
3589 set
= isl_set_universe(space
);
3590 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
3591 gen
->kernel
->block_dim
, "t");
3592 build
= isl_ast_build_restrict(build
, set
);
3594 n
= gen
->thread_tiled_len
- gen
->shared_len
;
3596 if (gen
->first_unroll
>= 0) {
3597 space
= isl_space_set_alloc(gen
->ctx
, 0, n
);
3598 build
= set_unroll(build
, space
, gen
->first_unroll
);
3600 iterators
= generate_names(gen
->ctx
, n
, "c");
3601 build
= isl_ast_build_set_iterators(build
, iterators
);
3602 build
= isl_ast_build_set_at_each_domain(build
, &at_each_domain
, gen
);
3603 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
3604 isl_ast_build_free(build
);
3609 /* This function is called for each statement node in the AST of the code
3610 * for copying to or from shared/private memory.
3611 * Attach a pointer to a ppcg_kernel_stmt representing the copy
3612 * statement to the node.
3613 * The statement name is "read" or "write", depending on whether we are
3614 * reading from global memory or writing to global memory.
3615 * The name of the T space is {shared,private}_<array>.
3617 * The schedule is of the form
3621 * where A refers to a piece of an array and T to the corresponding
3622 * shifted tile. We split this schedule into mappings L -> A and L -> T
3623 * and store the corresponding expressions in stmt->index and stmt->local_index,
3624 * where stmt points to the ppcg_kernel_stmt that is attached to the node.
3626 static __isl_give isl_ast_node
*attach_copy_stmt(__isl_take isl_ast_node
*node
,
3627 __isl_keep isl_ast_build
*build
, void *user
)
3629 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3630 struct ppcg_kernel_stmt
*stmt
;
3634 isl_map
*access
, *local_access
, *map
;
3635 isl_pw_multi_aff
*pma
;
3639 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3641 return isl_ast_node_free(node
);
3643 access
= isl_map_from_union_map(isl_ast_build_get_schedule(build
));
3644 type
= isl_map_get_tuple_name(access
, isl_dim_in
);
3645 stmt
->u
.c
.read
= !strcmp(type
, "read");
3646 access
= isl_map_reverse(access
);
3647 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(access
)));
3648 local_access
= isl_map_copy(access
);
3650 map
= isl_map_domain_map(isl_map_universe(isl_space_copy(space
)));
3651 id
= isl_map_get_tuple_id(access
, isl_dim_out
);
3652 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
3653 access
= isl_map_apply_range(access
, map
);
3654 pma
= isl_pw_multi_aff_from_map(access
);
3655 expr
= isl_ast_build_call_from_pw_multi_aff(build
, pma
);
3656 stmt
->u
.c
.index
= expr
;
3658 map
= isl_map_range_map(isl_map_universe(space
));
3659 id
= isl_map_get_tuple_id(local_access
, isl_dim_out
);
3660 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
3661 local_access
= isl_map_apply_range(local_access
, map
);
3662 pma
= isl_pw_multi_aff_from_map(local_access
);
3663 expr
= isl_ast_build_call_from_pw_multi_aff(build
, pma
);
3664 stmt
->u
.c
.local_index
= expr
;
3666 stmt
->u
.c
.array
= gen
->copy_group
->array
;
3667 array_index
= stmt
->u
.c
.array
- gen
->prog
->array
;
3668 stmt
->u
.c
.local_array
= &gen
->kernel
->array
[array_index
];
3669 stmt
->type
= ppcg_kernel_copy
;
3671 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3672 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3673 return isl_ast_node_set_annotation(node
, id
);
3676 /* Given a schedule of the form
3680 * (with S the first shared_len dimensions of the computed schedule,
3681 * A the array and L the schedule correponding to the generated loops),
3682 * indicating where the copying the array elements that need to be copied,
3683 * construct code for performing the copying.
3685 * "group" is the array reference group that is being copied
3686 * "type" is either "read" or "write"
3687 * private is set if copying needs to be performed to/from registers
3689 * We first construct a mapping to a shifted tile of the array,
3691 * [S -> A] -> T(S,A) (1)
3693 * If private is set, then we also use this mapping as a schedule
3694 * (which is already thread-specific and will be completely unrolled).
3695 * Otherwise, we wrap/tile the range over the threads.
3698 * [S -> A] -> T'(S,A)
3700 * Combined with the given schedule, we have
3702 * [S -> A] -> [L -> T'(S,A)] (2)
3704 * From the shifted tile mapping, we construct a mapping
3706 * [S -> A] -> [A -> T(S,A)]
3708 * and apply it to the schedule (2), obtaining
3710 * [A -> T(S(L),A)] -> [L -> T'(S(L),A)]
3712 * Note that we can project out S because it is uniquely defined by L.
3714 static __isl_give isl_ast_node
*copy_access(struct gpu_gen
*gen
,
3715 __isl_take isl_map
*sched
,
3716 const char *type
, struct gpu_array_ref_group
*group
,
3717 __isl_take isl_ast_build
*build
, int private)
3721 isl_map
*schedule
, *shift
, *map
;
3723 isl_id_list
*iterators
;
3726 shift
= shift_access(group
);
3728 schedule
= isl_map_copy(shift
);
3729 schedule
= isl_map_reset_tuple_id(schedule
, isl_dim_out
);
3731 schedule
= tile_access_schedule(gen
, schedule
);
3733 n
= isl_map_dim(schedule
, isl_dim_out
);
3734 set
= isl_set_universe(isl_ast_build_get_schedule_space(build
));
3735 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
3736 gen
->kernel
->block_dim
, "t");
3738 schedule
= isl_map_range_product(sched
, schedule
);
3740 space
= isl_space_domain(isl_map_get_space(shift
));
3741 map
= isl_map_range_map(isl_map_universe(isl_space_unwrap(space
)));
3742 map
= isl_map_range_product(map
, shift
);
3744 schedule
= isl_map_apply_domain(schedule
, map
);
3746 schedule
= isl_map_set_tuple_name(schedule
, isl_dim_in
, type
);
3748 build
= isl_ast_build_restrict(build
, set
);
3750 gen
->copy_group
= group
;
3753 space
= isl_space_range(isl_map_get_space(schedule
));
3754 space
= isl_space_range(isl_space_unwrap(space
));
3755 build
= set_unroll(build
, space
, 0);
3757 iterators
= generate_names(gen
->ctx
, n
, "c");
3758 build
= isl_ast_build_set_iterators(build
, iterators
);
3759 build
= isl_ast_build_set_at_each_domain(build
, &attach_copy_stmt
, gen
);
3760 tree
= isl_ast_build_ast_from_schedule(build
,
3761 isl_union_map_from_map(schedule
));
3762 isl_ast_build_free(build
);
3767 /* Return code for reading into or writing from shared memory
3768 * the given array reference group.
3770 * If we are performing a read from global memory to shared memory and
3771 * if the array involved is not a scalar, then we copy
3772 * the entire tile to shared memory. This may result in some extra
3773 * elements getting copied, but it should lead to simpler code
3774 * (which means that fewer registers may be needed) and less divergence.
3776 * Otherwise, we only copy the elements that will be read or have been written
3780 * The input "sched" is of the form.
3784 * with S the first shared_len dimensions of the computed schedule,
3785 * A the array and L the schedule correponding to the generated loops.
3787 * We first drop "type",
3791 * If the above conditions are satisfied, we project out A,
3796 * and then introduce the group tile [S -> T], resulting in
3800 static __isl_give isl_ast_node
*copy_group_shared_accesses(
3801 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
3802 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
3806 isl_union_map
*access
;
3808 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
3809 read
= !strcmp(type
, "read");
3811 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
3813 if (read
&& group
->array
->n_index
> 0) {
3817 space
= isl_space_domain(isl_map_get_space(sched
));
3818 space
= isl_space_unwrap(space
);
3819 map
= isl_map_domain_map(isl_map_universe(space
));
3820 sched
= isl_map_apply_domain(sched
, map
);
3822 map
= group_tile(group
);
3823 map
= isl_map_reverse(isl_map_domain_map(map
));
3824 sched
= isl_map_apply_domain(sched
, map
);
3827 return copy_access(gen
, sched
, type
, group
, build
, 0);
3830 /* Return code for reading into or writing from private memory
3831 * the given array reference group.
3833 * Let S be the first shared_len dimensions of the computed schedule,
3834 * D the iteration domains, A the array and L the schedule correponding
3835 * to the generated loops.
3836 * "sched" is of the form
3840 * where type is either "read" or "write".
3841 * We apply the privatization D -> S(t), with t the thread ids,
3842 * to the access relation D -> A to obtain the privatized access relation
3846 * We drop the type from "sched" and intersect with the privatized access
3847 * relation to obtain
3851 static __isl_give isl_ast_node
*copy_group_private_accesses(
3852 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
3853 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
3857 isl_union_map
*priv
;
3858 isl_union_map
*access
;
3859 isl_map
*access_map
;
3861 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
3862 read
= !strcmp(type
, "read");
3864 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
3865 priv
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
3868 access
= group_access_relation(group
, read
, !read
);
3869 access
= isl_union_map_apply_domain(access
, priv
);
3870 access_map
= isl_map_from_union_map(access
);
3872 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
3873 sched
= isl_map_intersect_domain(sched
, isl_map_wrap(access_map
));
3875 return copy_access(gen
, sched
, type
, group
, build
, 1);
3878 /* Return code for reading into or writing from shared or private memory.
3880 * "schedule" is of the form
3884 * with S be the first shared_len dimensions of the computed schedule,
3885 * A the array and L the schedule correponding to the generated loops.
3886 * The array reference group is attached to "type".
3888 static __isl_give isl_ast_node
*create_access_leaf(
3889 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
3890 __isl_take isl_ast_build
*build
)
3892 struct gpu_array_ref_group
*group
;
3895 id
= isl_map_get_tuple_id(schedule
, isl_dim_in
);
3896 group
= isl_id_get_user(id
);
3899 if (group
->private_tile
)
3900 return copy_group_private_accesses(gen
, group
, schedule
,
3903 return copy_group_shared_accesses(gen
, group
, schedule
,
3907 /* Create a domain node representing a synchronization.
3909 static __isl_give isl_ast_node
*create_sync_leaf(
3910 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
3911 __isl_take isl_ast_build
*build
)
3913 struct ppcg_kernel_stmt
*stmt
;
3919 isl_map_free(schedule
);
3921 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3925 stmt
->type
= ppcg_kernel_sync
;
3927 space
= isl_ast_build_get_schedule_space(build
);
3928 space
= isl_space_from_domain(space
);
3929 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "sync");
3930 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
3931 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
3932 node
= isl_ast_node_alloc_user(expr
);
3933 isl_ast_build_free(build
);
3935 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3936 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3937 return isl_ast_node_set_annotation(node
, id
);
3940 /* This function is called during the code generation at the point
3941 * where the schedule domain element is completely determined by
3942 * the generated code. The input schedule contains the original
3943 * statements as well as synchronization and copy "statements".
3944 * The latter are scheduled at different points than any of the original
3945 * statements, so they will only arrive here in isolation.
3947 * If the current schedule only refers to a single statement,
3948 * we check if it is a copy or synchronization statement and
3949 * call the appropriate functions.
3950 * Otherwise, we assume we are dealing with the original statements
3951 * and we call create_domain_leaf.
3953 static __isl_give isl_ast_node
*create_kernel_leaf(
3954 __isl_take isl_ast_build
*build
, void *user
)
3956 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3958 isl_union_map
*schedule
;
3961 schedule
= isl_ast_build_get_schedule(build
);
3963 if (isl_union_map_n_map(schedule
) != 1)
3964 return create_domain_leaf(schedule
, build
, user
);
3966 map
= isl_map_from_union_map(schedule
);
3967 name
= isl_map_get_tuple_name(map
, isl_dim_in
);
3968 if (!strcmp(name
, "read") || !strcmp(name
, "write"))
3969 return create_access_leaf(gen
, map
, build
);
3970 if (!strcmp(name
, "sync"))
3971 return create_sync_leaf(gen
, map
, build
);
3973 return create_domain_leaf(isl_union_map_from_map(map
), build
, user
);
3976 /* Mark all odd schedule dimensions as "atomic" (when the even dimensions
3977 * have value 0) and all even schedule dimensions as "unroll".
3979 * That is, the options look as follows
3981 * { [0, b, 0, d, ..., 0] -> atomic[i] : exists a : i = 2 a + 1;
3982 * [a, b, c, d, ..., z] -> unroll[i] : exists a : i = 2 a }
3984 * The even positions are used to be able to schedule copying blocks
3985 * and synchronization before or after each level of the shared memory
3986 * tile loops and we want to make sure that code for these is generated
3987 * separately (within each level).
3989 static __isl_give isl_ast_build
*set_atomic_and_unroll(
3990 __isl_take isl_ast_build
*build
,
3991 __isl_take isl_space
*space
, int sched_len
)
3997 isl_local_space
*ls
;
4000 ctx
= isl_ast_build_get_ctx(build
);
4002 space
= isl_space_params(space
);
4003 space
= isl_space_add_dims(space
, isl_dim_set
, sched_len
);
4004 space
= isl_space_from_domain(space
);
4005 space
= isl_space_add_dims(space
, isl_dim_out
, 2);
4006 map
= isl_map_universe(isl_space_copy(space
));
4007 for (i
= 0; i
< sched_len
; i
+= 2)
4008 map
= isl_map_fix_si(map
, isl_dim_in
, i
, 0);
4009 ls
= isl_local_space_from_space(isl_map_get_space(map
));
4010 c
= isl_equality_alloc(ls
);
4011 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
4012 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
4013 c
= isl_constraint_set_constant_si(c
, 1);
4014 map
= isl_map_add_constraint(map
, c
);
4015 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
4016 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "atomic");
4017 opt
= isl_union_map_from_map(map
);
4019 map
= isl_map_universe(space
);
4020 ls
= isl_local_space_from_space(isl_map_get_space(map
));
4021 c
= isl_equality_alloc(ls
);
4022 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
4023 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
4024 map
= isl_map_add_constraint(map
, c
);
4025 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
4026 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "unroll");
4027 opt
= isl_union_map_add_map(opt
, map
);
4029 build
= isl_ast_build_set_options(build
, opt
);
4034 /* Return a map that maps a space of dimension gen->shared_len
4035 * to its last dimensions starting at gen->tile_first.
4036 * The range is of dimension
4038 * 2 * (gen->shared_len - gen->tile_first) + 1
4040 * The input dimensions are mapped to the odd dimensions in the output,
4041 * while the even dimensions (except 2*pos) are fixed to 0.
4042 * Output dimension 2*pos (if pos >= 0) is fixed to "val".
4043 * If pos >= 0, then only the pos first dimensions starting at gen->tile_first
4044 * are mapped to the output. The remaining input dimensions are projected
4045 * out and the corresponding output dimensions are fixed to 0.
4047 static __isl_give isl_map
*insert_even(struct gpu_gen
*gen
,
4048 __isl_take isl_space
*space
, int pos
, int val
)
4053 space
= isl_space_set_from_params(space
);
4054 space
= isl_space_add_dims(space
, isl_dim_set
, gen
->shared_len
);
4055 space
= isl_space_map_from_set(space
);
4056 proj
= isl_map_identity(space
);
4057 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, gen
->tile_first
);
4058 n
= gen
->shared_len
- gen
->tile_first
;
4059 for (i
= 0; i
<= n
; ++i
) {
4060 proj
= isl_map_insert_dims(proj
, isl_dim_out
, 2 * i
, 1);
4062 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, val
);
4064 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, 0);
4070 proj
= isl_map_eliminate(proj
, isl_dim_in
, gen
->tile_first
+ pos
,
4071 gen
->shared_len
- (gen
->tile_first
+ pos
));
4072 for (i
= pos
; i
< n
; ++i
)
4073 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
+ 1, 0);
4078 /* Given the AST context schedule "schedule" and the mapping from
4079 * domains to the shared tile loops "shared_sched", add a schedule
4080 * for a synchronization operation at position "val" of loop level "pos".
4082 * schedule is of the form
4086 * (with D the iteration domains and L the already generated loops),
4087 * while shared_sched is of the form
4091 * We combine them into
4097 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4099 * and use the result as a schedule for "sync".
4101 static __isl_give isl_union_map
*add_sync_schedule(struct gpu_gen
*gen
,
4102 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4103 __isl_keep isl_union_map
*shared_sched
, int pos
, int val
)
4106 isl_map
*proj
, *map
;
4108 shared_sched
= isl_union_map_copy(shared_sched
);
4109 schedule
= isl_union_map_copy(schedule
);
4111 space
= isl_union_map_get_space(shared_sched
);
4112 schedule
= isl_union_map_apply_domain(shared_sched
, schedule
);
4113 map
= isl_map_from_union_map(schedule
);
4115 proj
= insert_even(gen
, space
, pos
, val
);
4116 map
= isl_map_apply_range(map
, proj
);
4117 map
= isl_map_from_range(isl_map_wrap(map
));
4118 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "sync");
4120 res
= isl_union_map_add_map(res
, map
);
4125 /* Given the AST context schedule "schedule" and the mapping from
4126 * domains to the shared tile loops "shared_sched", add a schedule
4127 * for copying an array reference group to/from shared/private memory.
4128 * "read" is set if data should be copied from global memory
4129 * to shared/private memory.
4130 * "k" represents the current group
4131 * "s" is the total number of groups
4133 * We schedule an operation before or after the innermost loop
4134 * of "shared_sched" that affects the tile of the array reference group.
4136 * schedule is of the form
4140 * (with D the iteration domains and L the already generated loops),
4141 * while shared_sched is of the form
4145 * We first compute the access relation for the reference group
4149 * and combine it with shared_sched into
4153 * If this results in an empty relation, no copying needs to be performed
4155 * Otherwise, we invert the relation and combine it with "schedule" into
4159 * The actual additional piece of the schedule is obtained from combining
4165 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4167 * The position of "val" corresponds to the innermost loop that affects
4168 * the tile and the value indicates where the copying is scheduled
4169 * with respect to the actual kernel code (at value 0).
4170 * Reads are schedule before the code, writes to global memory from
4171 * private memory are scheduled at values 1 to s, writes to global
4172 * memory from shared memory are scheduled at values s + 2 to 2 * s + 1.
4174 * If we are scheduling a read from global memory to shared memory,
4175 * we insert a synchronization before the kernel code (at the innermost
4177 * If we are scheduling a write to global memory, then we add
4178 * a synchronization after all writes (at value 2 *s + 2).
4179 * However, there is no need for a synchronization after the outermost loop.
4180 * A write to global memory from private memory at the innermost level
4181 * does not require a synchronization, because it is covered by
4182 * the synchronization after the kernel inserted by body_schedule.
4184 static __isl_give isl_union_map
*add_group_schedule(struct gpu_gen
*gen
,
4185 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4186 __isl_keep isl_union_map
*shared_sched
,
4187 struct gpu_array_ref_group
*group
, int read
, int k
, int s
)
4192 isl_union_map
*access
;
4193 isl_map
*map
, *proj
, *access_map
;
4196 access
= group_access_relation(group
, read
, !read
);
4197 access
= isl_union_map_range_product(isl_union_map_copy(shared_sched
),
4200 if (isl_union_map_is_empty(access
)) {
4201 isl_union_map_free(access
);
4205 access
= isl_union_map_reverse(access
);
4206 access
= isl_union_map_apply_range(access
,
4207 isl_union_map_copy(schedule
));
4208 access_map
= isl_map_from_union_map(access
);
4210 space
= isl_space_copy(group
->array
->dim
);
4211 space
= isl_space_from_range(space
);
4212 space
= isl_space_add_dims(space
, isl_dim_in
, gen
->shared_len
);
4213 map
= isl_map_domain_map(isl_map_universe(space
));
4215 space
= isl_union_map_get_space(schedule
);
4216 pos
= group
->last_shared
+ 1 - gen
->tile_first
;
4220 else if (group
->private_tile
)
4223 val
= 1 + s
+ 1 + k
;
4224 proj
= insert_even(gen
, space
, pos
, val
);
4225 map
= isl_map_apply_range(map
, proj
);
4227 access_map
= isl_map_range_product(access_map
, map
);
4229 id
= isl_id_alloc(gen
->ctx
, read
? "read" : "write", group
);
4230 access_map
= isl_map_set_tuple_id(access_map
, isl_dim_in
, id
);
4232 res
= isl_union_map_add_map(res
, access_map
);
4234 n
= gen
->shared_len
- gen
->tile_first
;
4236 if (!group
->private_tile
)
4237 res
= add_sync_schedule(gen
, res
, schedule
,
4238 shared_sched
, n
, -1);
4242 if (pos
== n
&& group
->private_tile
)
4244 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4251 /* Return a schedule for the shared tile loops based on the current
4252 * AST context schedule.
4254 * We create a "shared_sched" that maps the domains to the first
4255 * shared_len dimensions of the computed schedule, project out the
4256 * first tile_first dimensions (as these are already covered by
4257 * the host code) and insert "statement-level" dimensions at even
4258 * positions so that we can schedule copy blocks and synchronization
4259 * before/after each level.
4261 * In particular, copy blocks are inserted inside the innermost
4262 * level that affect the tile. For the copying to global memory,
4263 * those from private memory are scheduled before those from shared
4264 * memory such that synchronization can be inserted between the two
4265 * at the innermost level.
4266 * Synchronization is inserted at the innermost level before the
4267 * actual kernel code if there is any copying from global memory
4268 * to shared memory. It is inserted unconditionally at the innermost
4269 * level after the actual kernel code and the copying to global memory
4270 * from private memory (if any). Finally, it is inserted after
4271 * any copying to global memory, except at the outermost level
4272 * and at the innermost level if there is no copying from shared
4273 * memory. The copying from private memory is covered by the unconditional
4274 * synchronization at the innermost level.
4276 static __isl_give isl_union_map
*body_schedule(struct gpu_gen
*gen
,
4277 __isl_take isl_union_map
*schedule
)
4281 isl_union_map
*shared_sched
;
4282 isl_union_map
*sched
;
4283 isl_map
*proj
, *map
;
4286 shared_sched
= isl_union_map_copy(gen
->tiled_sched
);
4287 proj
= projection(isl_union_map_get_space(shared_sched
),
4288 gen
->tiled_len
, gen
->shared_len
);
4289 shared_sched
= isl_union_map_apply_range(shared_sched
,
4290 isl_union_map_from_map(proj
));
4291 space
= isl_union_map_get_space(shared_sched
);
4292 proj
= insert_even(gen
, space
, -1, 0);
4293 sched
= isl_union_map_apply_range(isl_union_map_copy(shared_sched
),
4294 isl_union_map_from_map(proj
));
4296 res
= isl_union_map_range_product(isl_union_map_copy(schedule
), sched
);
4299 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
4300 s
+= gen
->prog
->array
[i
].n_group
;
4303 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4304 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
4306 for (j
= 0; j
< array
->n_group
; ++j
) {
4307 struct gpu_array_ref_group
*group
;
4309 group
= array
->groups
[j
];
4310 if (!group
->private_tile
&& !group
->shared_tile
)
4312 res
= add_group_schedule(gen
, res
, schedule
,
4313 shared_sched
, group
, 0, k
, s
);
4314 res
= add_group_schedule(gen
, res
, schedule
,
4315 shared_sched
, group
, 1, k
, s
);
4320 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4321 gen
->shared_len
- gen
->tile_first
, 1 + s
);
4323 isl_union_map_free(shared_sched
);
4324 isl_union_map_free(schedule
);
4329 /* Generate code for "kernel" in the given "context".
4331 * We first generate code for the shared tile loops (T1T, T1P and T2)
4332 * in a context that includes the block ids.
4333 * Within each iteration of these loops an additional code generation
4334 * is performed (within create_kernel_leaf) for the rest of the schedule
4335 * in a context that includes the thread ids.
4337 static __isl_give isl_ast_node
*generate_kernel(struct gpu_gen
*gen
,
4338 __isl_keep isl_ast_build
*build
, __isl_keep isl_set
*host_domain
,
4339 __isl_keep isl_multi_pw_aff
*grid_size
)
4343 isl_id_list
*iterators
;
4344 isl_union_map
*schedule
;
4348 schedule
= isl_ast_build_get_schedule(build
);
4350 build
= isl_ast_build_copy(build
);
4351 build
= isl_ast_build_restrict(build
, isl_set_copy(host_domain
));
4352 space
= isl_ast_build_get_schedule_space(build
);
4353 set
= isl_set_universe(isl_space_copy(space
));
4354 set
= add_bounded_parameters_dynamic(set
, grid_size
, "b");
4355 build
= isl_ast_build_restrict(build
, set
);
4357 schedule
= body_schedule(gen
, schedule
);
4359 sched_len
= 2 * (gen
->shared_len
- gen
->tile_first
) + 1;
4361 build
= set_atomic_and_unroll(build
, space
, sched_len
);
4362 iterators
= generate_names(gen
->ctx
, sched_len
, "g");
4363 build
= isl_ast_build_set_iterators(build
, iterators
);
4364 build
= isl_ast_build_set_create_leaf(build
, &create_kernel_leaf
, gen
);
4365 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
4366 isl_ast_build_free(build
);
4371 /* Attach "id" to the given node.
4373 static __isl_give isl_ast_node
*attach_id(__isl_take isl_ast_node
*node
,
4374 __isl_keep isl_ast_build
*build
, void *user
)
4378 node
= isl_ast_node_set_annotation(node
, id
);
4383 /* Construct an AST node for performing a kernel launch and attach
4384 * the information about the kernel to that node.
4386 * The kernel AST has been constructed in the context of the range
4387 * of "schedule". In particular, the grid size has been computed
4388 * in the context. We therefore still need to make sure that these
4389 * constraints are expressed in the code. We do this by creating a schedule
4391 * kernel[] -> [S -> []]
4393 * where S is the schedule domain, i.e., the range of "schedule".
4394 * The AST generation will then create a single call surrounded by
4395 * all the condition in "S" that have not been expressed yet.
4397 * The kernel information is attached to this node in attach_id.
4399 static __isl_give isl_ast_node
*construct_launch(
4400 __isl_take isl_ast_build
*build
, __isl_take isl_union_map
*schedule
,
4401 __isl_take
struct ppcg_kernel
*kernel
)
4405 isl_union_set
*domain
;
4410 ctx
= isl_ast_build_get_ctx(build
);
4412 id
= isl_id_alloc(ctx
, NULL
, kernel
);
4413 id
= isl_id_set_free_user(id
, &ppcg_kernel_free
);
4415 domain
= isl_union_map_range(schedule
);
4416 set
= isl_set_from_union_set(domain
);
4417 map
= isl_map_from_domain(set
);
4418 map
= isl_map_from_range(isl_map_wrap(map
));
4419 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "kernel");
4420 schedule
= isl_union_map_from_map(map
);
4422 build
= isl_ast_build_set_at_each_domain(build
, &attach_id
, id
);
4423 node
= isl_ast_build_ast_from_schedule(build
, schedule
);
4424 isl_ast_build_free(build
);
4429 /* This function is called for each leaf in the AST of the host code.
4430 * We first specialize the schedule to the site of the leaf, compute
4431 * the size of shared memory and then construct the body of host code
4432 * and the associated kernel.
4434 * The necessary information for printing the kernel launch is
4435 * stored in a struct ppcg_kernel and attached to the leaf node
4436 * created to represent the launch.
4438 static __isl_give isl_ast_node
*create_host_leaf(
4439 __isl_take isl_ast_build
*build
, void *user
)
4441 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4444 struct ppcg_kernel
*kernel
;
4445 isl_set
*host_domain
;
4446 isl_union_map
*schedule
;
4447 isl_union_map
*local_sched
;
4448 isl_union_map
*access
;
4449 isl_union_set
*domain
;
4452 schedule
= isl_ast_build_get_schedule(build
);
4454 isl_union_map_foreach_map(schedule
, &extract_tile_len
, gen
);
4457 domain
= isl_union_map_domain(isl_union_map_copy(schedule
));
4459 local_sched
= isl_union_map_copy(gen
->sched
);
4460 local_sched
= isl_union_map_intersect_domain(local_sched
, domain
);
4461 access
= isl_union_map_union(isl_union_map_copy(gen
->prog
->read
),
4462 isl_union_map_copy(gen
->prog
->write
));
4463 access
= isl_union_map_apply_domain(access
,
4464 isl_union_map_copy(local_sched
));
4466 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
4467 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
4468 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
4470 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
4471 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
4472 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
4474 kernel
= gen
->kernel
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel
);
4478 kernel
->id
= gen
->kernel_id
++;
4479 kernel
->context
= isl_union_map_params(isl_union_map_copy(schedule
));
4480 kernel
->grid_size
= extract_grid_size(gen
, kernel
);
4481 extract_block_size(gen
, kernel
);
4482 kernel
->arrays
= isl_union_map_range(access
);
4483 kernel
->space
= isl_ast_build_get_schedule_space(build
);
4485 gen
->private_access
= NULL
;
4486 compute_shared_sched(gen
);
4487 gen
->privatization
= compute_privatization(gen
);
4488 group_references(gen
);
4489 compute_private_access(gen
);
4490 check_shared_memory_bound(gen
);
4491 compute_group_tilings(gen
);
4492 host_domain
= isl_set_from_union_set(isl_union_map_range(
4493 isl_union_map_copy(schedule
)));
4494 localize_bounds(gen
, kernel
, host_domain
);
4496 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
4498 kernel
->tree
= generate_kernel(gen
, build
, host_domain
,
4500 create_kernel_vars(gen
, kernel
);
4502 free_local_array_info(gen
);
4503 isl_map_free(gen
->privatization
);
4504 isl_union_map_free(gen
->private_access
);
4505 isl_union_map_free(gen
->local_sched
);
4506 isl_union_map_free(gen
->tiled_sched
);
4507 isl_union_map_free(gen
->shared_sched
);
4508 isl_union_map_free(gen
->shared_proj
);
4509 isl_set_free(host_domain
);
4510 free(gen
->tile_size
);
4512 node
= construct_launch(build
, schedule
, kernel
);
4516 isl_union_map_free(schedule
);
4520 /* Use isl to generate code for the outer gen->tile_first loops
4521 * of the global schedule in gen->sched, resulting in the host code.
4522 * Within each iteration of this partial schedule, i.e., for each kernel
4523 * launch, create_host_leaf takes care of generating the kernel code.
4525 static __isl_give isl_ast_node
*generate_host_code(struct gpu_gen
*gen
)
4527 isl_ast_build
*build
;
4529 isl_union_map
*sched
;
4531 isl_id_list
*iterators
;
4533 sched
= isl_union_map_copy(gen
->sched
);
4534 proj
= projection(isl_union_map_get_space(sched
),
4535 gen
->untiled_len
, gen
->tile_first
);
4536 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
4538 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 1);
4539 build
= isl_ast_build_from_context(isl_set_copy(gen
->prog
->context
));
4540 iterators
= generate_names(gen
->ctx
, gen
->tile_first
, "h");
4541 build
= isl_ast_build_set_iterators(build
, iterators
);
4542 build
= isl_ast_build_set_create_leaf(build
, &create_host_leaf
, gen
);
4543 tree
= isl_ast_build_ast_from_schedule(build
, sched
);
4544 isl_ast_build_free(build
);
4549 __isl_give isl_union_map
*extract_sizes_from_str(isl_ctx
*ctx
, const char *str
)
4553 return isl_union_map_read_from_str(ctx
, str
);
4556 /* Information about the outermost tilable bands in the forest of bands.
4558 * tile_len and n_parallel are only sets on band_info structures
4559 * that correspond to outermost bands. For other bands (in particular,
4560 * ancestors of the outermost bands), n_parallal is set to 0.
4562 * prefix is the (padded) schedule leading up to the outermost tilable bands.
4564 * tile_first is the number of schedule dimensions in prefix.
4566 * suffix is the schedule of the outermost tilable bands and their descendants.
4569 struct gpu_gen
*gen
;
4573 isl_union_map
*prefix
;
4574 isl_union_map
*suffix
;
4577 /* Set tile_len and n_parallel of the statement to that of
4578 * their outermost band, recorded in the band_info.
4580 static int set_stmt_tile_len(__isl_take isl_map
*map
, void *user
)
4582 struct band_info
*info
= user
;
4583 struct gpu_stmt
*stmt
;
4586 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
4587 stmt
= find_stmt(info
->gen
->prog
, id
);
4590 stmt
->tile_len
= info
->tile_len
;
4591 stmt
->n_parallel
= info
->n_parallel
;
4598 static void list_select_outer_band(struct gpu_gen
*gen
,
4599 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
);
4601 /* Check if this band has any parallel loops. If so, take it as
4602 * the outermost tilable band. If not, continue looking for the
4603 * outermost tilable band in the children of the current band.
4605 static void band_select_outer_band(struct gpu_gen
*gen
,
4606 __isl_take isl_band
*band
, int pos
, struct band_info
*info
)
4608 int n
= isl_band_n_member(band
);
4611 for (n_parallel
= 0; n_parallel
< n
; ++n_parallel
)
4612 if (!isl_band_member_is_zero_distance(band
, n_parallel
))
4615 info
->n_parallel
= n_parallel
;
4617 gen
->any_parallelism
= 1;
4619 info
->tile_first
= pos
;
4621 info
->prefix
= isl_band_get_prefix_schedule(band
);
4622 info
->suffix
= isl_union_map_flat_range_product(
4623 isl_band_get_partial_schedule(band
),
4624 isl_band_get_suffix_schedule(band
));
4625 isl_union_map_foreach_map(info
->prefix
,
4626 &set_stmt_tile_len
, info
);
4627 } else if (isl_band_has_children(band
)) {
4628 isl_band_list
*children
;
4629 children
= isl_band_get_children(band
);
4630 list_select_outer_band(gen
, children
, pos
+ n
, info
);
4633 info
->tile_first
= pos
+ n
;
4635 info
->prefix
= isl_union_map_flat_range_product(
4636 isl_band_get_prefix_schedule(band
),
4637 isl_band_get_partial_schedule(band
));
4638 info
->suffix
= isl_band_get_suffix_schedule(band
);
4639 isl_union_map_foreach_map(info
->prefix
,
4640 &set_stmt_tile_len
, info
);
4643 isl_band_free(band
);
4646 /* Comparison function that returns a non-zero value for band_infos
4647 * with different tile_len fields or different n_parallel fields.
4649 static int cmp_band(const void *p1
, const void *p2
)
4651 const struct band_info
*info1
= p1
;
4652 const struct band_info
*info2
= p2
;
4654 if (info1
->tile_len
!= info2
->tile_len
)
4655 return info1
->tile_len
- info2
->tile_len
;
4657 return info1
->n_parallel
- info2
->n_parallel
;
4660 /* Extend "umap" with coordinates with fixed value "val"
4661 * to a total length of "dst_len", assuming the original dimension is "src_len".
4663 static __isl_give isl_union_map
*extend_range(
4664 __isl_take isl_union_map
*umap
, int src_len
, int dst_len
, int val
)
4670 dim
= isl_union_map_get_space(umap
);
4671 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
4672 for (i
= src_len
; i
< dst_len
; ++i
)
4673 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
4675 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
4680 /* Group bands with the same values for tile_len and n_parallel.
4681 * The prefix schedule is then extended with a fixed coordinate that
4682 * is different for each such group.
4683 * Note that the actual values for this coordinate are not important.
4684 * The bands have already been effectively separated at a higher level
4685 * or they are independent and may be executed in parallel.
4686 * The list of band_info has been sorted before this functions is called.
4688 static void separate_bands(struct band_info
*info
, int n
)
4693 for (i
= 0; i
< n
; ++i
) {
4694 int l
= info
[i
].tile_first
;
4697 (info
[i
].tile_len
!= info
[i
- 1].tile_len
||
4698 info
[i
].n_parallel
!= info
[i
- 1].n_parallel
))
4701 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4703 info
[i
].tile_first
= l
+ 1;
4707 /* Select the outermost bands in the elements of the list, align
4708 * their prefix schedules, separate bands with different values
4709 * for tile_len and/or n_parallel and then combine the resulting
4710 * prefix and suffix schedules into a single pair of prefix and
4711 * suffix schedules for the entire list.
4713 static void list_select_outer_band(struct gpu_gen
*gen
,
4714 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
)
4718 int n
= isl_band_list_n_band(list
);
4719 isl_ctx
*ctx
= isl_band_list_get_ctx(list
);
4720 struct band_info
*info
;
4722 isl_union_map
*prefix
;
4723 isl_union_map
*suffix
;
4726 info
= isl_calloc_array(ctx
, struct band_info
, n
);
4730 for (i
= 0; i
< n
; ++i
) {
4731 band
= isl_band_list_get_band(list
, i
);
4732 band_select_outer_band(gen
, band
, pos
, &info
[i
]);
4733 if (info
[i
].tile_first
> max_tile_first
)
4734 max_tile_first
= info
[i
].tile_first
;
4737 for (i
= 0; i
< n
; ++i
) {
4738 if (info
[i
].tile_first
== max_tile_first
)
4740 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4741 info
[i
].tile_first
, max_tile_first
, 0);
4742 info
[i
].tile_first
= max_tile_first
;
4745 qsort(info
, n
, sizeof(struct band_info
), &cmp_band
);
4747 for (i
= 0; i
< n
- 1; ++i
)
4748 if (info
[i
].tile_len
!= info
[i
+ 1].tile_len
||
4749 info
[i
].n_parallel
!= info
[i
+ 1].n_parallel
)
4753 separate_bands(info
, n
);
4755 prefix
= info
[0].prefix
;
4756 suffix
= info
[0].suffix
;
4758 for (i
= 1; i
< n
; ++i
) {
4759 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
4760 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
4763 list_info
->tile_first
= info
[0].tile_first
;
4764 list_info
->tile_len
= -1;
4765 list_info
->prefix
= prefix
;
4766 list_info
->suffix
= suffix
;
4768 isl_band_list_free(list
);
4772 /* Select the outermost tilable band that (by construction)
4773 * has at least one parallel loop.
4774 * The starting position of the aligned band is stored in the pair
4776 * The sizes and number of parallel loops may be different in different
4777 * parts of the band forest and are therefore stored in the gpu_stmts.
4779 * Return the complete schedule, with the tilable bands aligned
4780 * at gen->tile_first and padded with zero, if needed.
4782 static __isl_give isl_union_map
*select_outer_tilable_band(struct gpu_gen
*gen
,
4783 __isl_keep isl_schedule
*schedule
)
4785 isl_band_list
*list
;
4786 struct band_info info
;
4788 gen
->n_parallel
= 0;
4791 list
= isl_schedule_get_band_forest(schedule
);
4793 list_select_outer_band(gen
, list
, 0, &info
);
4795 gen
->tile_first
= info
.tile_first
;
4796 info
.suffix
= align_range(info
.suffix
);
4798 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
4801 /* Set gen->untiled_len to the number of scheduling dimensions
4802 * for the schedule of the first domain.
4803 * We assume here that this number is the same for all domains.
4805 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
4807 unsigned *untiled_len
= user
;
4809 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
4815 /* Compute an appropriate schedule based on the accesses in
4816 * gen->read and gen->write.
4818 * We use the dependences in gen->prog->scop to compute
4819 * a schedule that has a parallel loop in each tilable band.
4820 * Finally, we select the outermost tilable band.
4822 static void compute_schedule(struct gpu_gen
*gen
)
4824 isl_union_set
*domain
;
4825 isl_union_map
*dep_raw
, *dep
;
4826 isl_union_map
*sched
;
4827 isl_schedule
*schedule
;
4829 dep_raw
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
4831 dep
= isl_union_map_copy(gen
->prog
->scop
->dep_false
);
4832 dep
= isl_union_map_union(dep
, dep_raw
);
4833 dep
= isl_union_map_coalesce(dep
);
4835 domain
= isl_union_set_copy(gen
->prog
->scop
->domain
);
4836 domain
= isl_union_set_intersect_params(domain
,
4837 isl_set_copy(gen
->prog
->scop
->context
));
4838 schedule
= isl_union_set_compute_schedule(isl_union_set_copy(domain
),
4839 isl_union_map_copy(dep
), dep
);
4840 if (gen
->options
->debug
->dump_schedule
)
4841 isl_schedule_dump(schedule
);
4843 sched
= select_outer_tilable_band(gen
, schedule
);
4845 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
4846 sched
= isl_union_map_intersect_domain(sched
, domain
);
4849 isl_schedule_free(schedule
);
4852 /* Compute the sets of array elements that need to be copied in and out.
4854 * In particular, for each array that is written anywhere in gen->prog and
4855 * that is visible outside the corresponding scop, we copy out its entire
4858 * Any array elements that is read without first being written needs
4859 * to be copied in. Furthermore, if there are any array elements that
4860 * are copied out, but that are not written inside gen->prog, then
4861 * they also need to be copied in to ensure that the value after execution
4862 * is the same as the value before execution.
4863 * While computing the set of array elements that
4864 * are copied out but not written, we intersect both sets with the context.
4865 * This helps in those cases where the arrays are declared with a fixed size,
4866 * while the accesses are parametric and the context assigns a fixed value
4867 * to the parameters.
4869 static void compute_copy_in_and_out(struct gpu_gen
*gen
)
4872 isl_union_set
*write
;
4873 isl_union_set
*copy_in
, *copy_out
;
4874 isl_union_set
*not_written
;
4875 isl_union_map
*uninitialized
;
4877 write
= isl_union_map_range(isl_union_map_copy(gen
->prog
->write
));
4878 write
= isl_union_set_intersect_params(write
,
4879 isl_set_copy(gen
->prog
->context
));
4880 copy_out
= isl_union_set_empty(isl_union_set_get_space(write
));
4882 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4887 if (gen
->prog
->array
[i
].local
)
4890 space
= isl_space_copy(gen
->prog
->array
[i
].dim
);
4891 write_i
= isl_union_set_extract_set(write
, space
);
4892 empty
= isl_set_fast_is_empty(write_i
);
4893 isl_set_free(write_i
);
4897 write_i
= isl_set_copy(gen
->prog
->array
[i
].extent
);
4898 copy_out
= isl_union_set_add_set(copy_out
, write_i
);
4901 copy_out
= isl_union_set_intersect_params(copy_out
,
4902 isl_set_copy(gen
->prog
->context
));
4904 gen
->prog
->copy_out
= isl_union_set_copy(copy_out
);
4906 uninitialized
= isl_union_map_copy(gen
->prog
->scop
->live_in
);
4907 copy_in
= isl_union_map_range(uninitialized
);
4909 not_written
= isl_union_set_subtract(copy_out
, write
);
4910 copy_in
= isl_union_set_union(copy_in
, not_written
);
4911 gen
->prog
->copy_in
= copy_in
;
4914 static struct gpu_stmt_access
**expr_extract_access(struct pet_expr
*expr
,
4915 struct gpu_stmt_access
**next_access
)
4917 struct gpu_stmt_access
*access
;
4918 isl_ctx
*ctx
= isl_map_get_ctx(expr
->acc
.access
);
4920 access
= isl_alloc_type(ctx
, struct gpu_stmt_access
);
4922 access
->next
= NULL
;
4923 access
->read
= expr
->acc
.read
;
4924 access
->write
= expr
->acc
.write
;
4925 access
->access
= isl_map_copy(expr
->acc
.access
);
4926 access
->ref_id
= isl_id_copy(expr
->acc
.ref_id
);
4928 *next_access
= access
;
4929 next_access
= &(*next_access
)->next
;
4933 static struct gpu_stmt_access
**expr_extract_accesses(struct pet_expr
*expr
,
4934 struct gpu_stmt_access
**next_access
)
4938 for (i
= 0; i
< expr
->n_arg
; ++i
)
4939 next_access
= expr_extract_accesses(expr
->args
[i
],
4942 if (expr
->type
== pet_expr_access
)
4943 next_access
= expr_extract_access(expr
, next_access
);
4948 static void pet_stmt_extract_accesses(struct gpu_stmt
*stmt
)
4950 struct gpu_stmt_access
**next_access
= &stmt
->accesses
;
4952 stmt
->accesses
= NULL
;
4953 expr_extract_accesses(stmt
->stmt
->body
, next_access
);
4956 /* Return an array of gpu_stmt representing the statements in "scop".
4958 static struct gpu_stmt
*extract_stmts(isl_ctx
*ctx
, struct ppcg_scop
*scop
,
4959 __isl_keep isl_set
*context
)
4962 struct gpu_stmt
*stmts
;
4964 stmts
= isl_calloc_array(ctx
, struct gpu_stmt
, scop
->n_stmt
);
4968 for (i
= 0; i
< scop
->n_stmt
; ++i
) {
4969 struct gpu_stmt
*s
= &stmts
[i
];
4971 s
->id
= isl_set_get_tuple_id(scop
->stmts
[i
]->domain
);
4972 s
->stmt
= scop
->stmts
[i
];
4973 pet_stmt_extract_accesses(s
);
4979 /* Callback for ppcg_print_guarded that calls the callback for generate_gpu.
4981 static __isl_give isl_printer
*print_gpu(__isl_take isl_printer
*p
, void *user
)
4983 struct gpu_gen
*gen
= user
;
4985 return gen
->print(p
, gen
->prog
, gen
->tree
, gen
->print_user
);
4988 /* Generate CUDA code for "scop" and print it to "p".
4989 * After generating an AST for the transformed scop as explained below,
4990 * we call "gen->print" to print the AST in the desired output format
4993 * If it turns out that it does not make sense to generate GPU code,
4994 * then we generate CPU code instead.
4996 * The GPU code is generated in a context where at least one
4997 * statement instance is executed. The corresponding guard (if any) is printed
4998 * around the entire generated GPU code, except for the declaration
4999 * of the arrays that are visible outside of the scop and that therefore
5000 * cannot be declared inside the body of any possible guard.
5002 * We first compute a schedule that respects the dependences
5003 * of the original program and select the outermost band
5004 * of tilable dimensions that has at least one parallel loop.
5005 * We then have three blocks of dimensions
5009 * The tilable band "B" is first tiled according to "tile" sizes, resulting
5014 * For each iteration of the T loop and for each array, we compute
5015 * the array elements accessed by that iteration, construct a rectangular
5016 * box around it and shift it to the origin. The result is used
5017 * as shared memory for the array.
5019 * We then split off at most 2 parallel loops from the T loops and
5020 * at most 3 parallel loops from the P loops
5024 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
5025 * according to "grid"/"block" sizes.
5027 * H T1T T1P T2 P1T P1P P2 G
5029 * Finally, the T1P and P1P iterators are equated to the block and
5030 * thread dimensions respectively and so are effectively removed.
5031 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
5032 * are run on the GPU.
5034 * Code is generated in three stages. We first generate code for the
5035 * host (the H loops), with iterators h%d. Then, for each leaf node
5036 * of the resulting AST, we generate code for the shared loops (up to
5037 * and including T2), with iterators g%d and after equating the H loops
5038 * to h%d parameters and the T1P loops to the block dimensions.
5039 * Finally, we generate code for the remaining loops in a similar fashion.
5041 static __isl_give isl_printer
*generate(__isl_take isl_printer
*p
,
5042 struct gpu_gen
*gen
, struct ppcg_scop
*scop
,
5043 struct ppcg_options
*options
)
5045 struct gpu_prog
*prog
;
5047 isl_set
*context
, *guard
;
5050 return isl_printer_free(p
);
5052 ctx
= isl_printer_get_ctx(p
);
5053 prog
= gpu_prog_alloc(ctx
, scop
);
5055 return isl_printer_free(p
);
5057 context
= isl_set_copy(prog
->context
);
5058 guard
= isl_union_set_params(isl_union_set_copy(prog
->scop
->domain
));
5059 prog
->context
= isl_set_intersect(prog
->context
, isl_set_copy(guard
));
5062 gen
->any_parallelism
= 0;
5063 compute_schedule(gen
);
5065 if (!gen
->any_parallelism
) {
5066 isl_set_free(context
);
5067 isl_set_free(guard
);
5068 p
= print_cpu(p
, scop
, options
);
5070 compute_copy_in_and_out(gen
);
5071 gen
->tree
= generate_host_code(gen
);
5072 p
= ppcg_print_exposed_declarations(p
, prog
->scop
);
5073 p
= ppcg_print_guarded(p
, guard
, context
, &print_gpu
, gen
);
5074 isl_ast_node_free(gen
->tree
);
5077 isl_union_map_free(gen
->sched
);
5079 gpu_prog_free(prog
);
5084 /* Wrapper around generate for use as a ppcg_transform callback.
5086 static __isl_give isl_printer
*generate_wrap(__isl_take isl_printer
*p
,
5087 struct ppcg_scop
*scop
, void *user
)
5089 struct gpu_gen
*gen
= user
;
5091 return generate(p
, gen
, scop
, gen
->options
);
5094 /* Transform the code in the file called "input" by replacing
5095 * all scops by corresponding GPU code and write the results to "out".
5097 int generate_gpu(isl_ctx
*ctx
, const char *input
, FILE *out
,
5098 struct ppcg_options
*options
,
5099 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
5100 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
5101 void *user
), void *user
)
5107 gen
.sizes
= extract_sizes_from_str(ctx
, options
->sizes
);
5108 gen
.options
= options
;
5111 gen
.print_user
= user
;
5113 r
= ppcg_transform(ctx
, input
, out
, options
, &generate_wrap
, &gen
);
5115 isl_union_map_free(gen
.sizes
);
5120 struct gpu_prog
*gpu_prog_alloc(isl_ctx
*ctx
, struct ppcg_scop
*scop
)
5122 struct gpu_prog
*prog
;
5127 prog
= isl_calloc_type(ctx
, struct gpu_prog
);
5132 prog
->context
= isl_set_copy(scop
->context
);
5133 prog
->n_stmts
= scop
->n_stmt
;
5134 prog
->stmts
= extract_stmts(ctx
, scop
, prog
->context
);
5135 prog
->read
= isl_union_map_copy(scop
->reads
);
5136 prog
->write
= isl_union_map_copy(scop
->writes
);
5139 return gpu_prog_free(prog
);
5141 collect_array_info(prog
);
5146 void *gpu_prog_free(struct gpu_prog
*prog
)
5150 free_array_info(prog
);
5151 free_stmts(prog
->stmts
, prog
->n_stmts
);
5152 isl_union_set_free(prog
->copy_in
);
5153 isl_union_set_free(prog
->copy_out
);
5154 isl_union_map_free(prog
->read
);
5155 isl_union_map_free(prog
->write
);
5156 isl_set_free(prog
->context
);