2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012-2013 Ecole Normale Superieure
5 * Use of this software is governed by the MIT license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
17 #include <isl/polynomial.h>
18 #include <isl/union_set.h>
23 #include <isl/schedule.h>
24 #include <isl/options.h>
25 #include <isl/ast_build.h>
30 #include "ppcg_options.h"
33 /* The fields stride, shift and shift_map only contain valid information
35 * If so, they express that current index is such that if you add shift,
36 * then the result is always a multiple of stride.
37 * shift_map contains the mapping
39 * i -> (i + shift)/stride
41 * Let D represent the initial shared_len dimensions of the computed schedule.
42 * The spaces of "lb" and "shift" are of the form
46 * "shift_map" is of the form
48 * [D -> i] -> [D -> (i + shift(D))/stride]
50 struct gpu_array_bound
{
56 isl_basic_map
*shift_map
;
59 /* A tile of an array.
61 * n is the dimension of the array.
62 * bound is an array of size "n" representing the lower bound
63 * and size for each index.
65 * tiling maps a tile in the global array to the corresponding
66 * shared/private memory tile and is of the form
68 * { [D[i] -> A[a]] -> T[(a + shift(i))/stride - lb(i)] }
70 * where D represents the initial shared_len dimensions
71 * of the computed schedule.
73 struct gpu_array_tile
{
75 struct gpu_array_bound
*bound
;
76 isl_multi_aff
*tiling
;
79 struct gpu_array_info
;
81 /* A group of array references in a kernel that should be handled together.
82 * If private_tile is not NULL, then it is mapped to registers.
83 * Otherwise, if shared_tile is not NULL, it is mapped to shared memory.
84 * Otherwise, it is accessed from global memory.
86 struct gpu_array_ref_group
{
87 /* The references in this group access this array. */
88 struct gpu_array_info
*array
;
89 /* Position of this group in the list of reference groups of array. */
92 /* The following fields are use during the construction of the groups.
93 * access is the combined access relation relative to the shared
94 * memory tiling. In particular, the domain of the map corresponds
95 * to the first shared_len dimensions of the computed schedule.
96 * write is set if any access in the group is a write.
97 * exact_write is set if all writes are definite writes.
103 /* The shared memory tile, NULL if none. */
104 struct gpu_array_tile
*shared_tile
;
106 /* The private memory tile, NULL if none. */
107 struct gpu_array_tile
*private_tile
;
109 /* References in this group; point to elements of a linked list. */
111 struct gpu_stmt_access
**refs
;
113 /* Last shared memory tile dimension that affects tile of this group. */
119 struct ppcg_options
*options
;
121 /* Callback for printing of AST in appropriate format. */
122 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
123 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
124 struct gpu_types
*types
, void *user
);
127 struct gpu_prog
*prog
;
128 /* The generated AST. */
131 /* The sequence of types for which a definition has been printed. */
132 struct gpu_types types
;
134 /* tile, grid and block sizes for each kernel */
135 isl_union_map
*sizes
;
137 /* Identifier of current kernel. */
139 /* Pointer to the current kernel. */
140 struct ppcg_kernel
*kernel
;
141 /* Does the computed schedule exhibit any parallelism? */
144 /* First tile dimension. */
146 /* Number of tile dimensions. */
148 /* Number of initial parallel loops among tile dimensions. */
151 /* Number of dimensions determining shared memory. */
154 /* Number of rows in the untiled schedule. */
156 /* Number of rows in the tiled schedule. */
158 /* Number of rows in schedule after tiling/wrapping over threads. */
159 int thread_tiled_len
;
161 /* Global untiled schedule. */
162 isl_union_map
*sched
;
163 /* Local (per kernel launch) tiled schedule. */
164 isl_union_map
*tiled_sched
;
165 /* Local schedule per shared memory tile loop iteration. */
166 isl_union_map
*local_sched
;
168 /* Local tiled schedule projected onto the shared tile loops and
169 * the loops that will be wrapped over the threads,
170 * with all shared tile loops parametrized.
172 isl_union_map
*shared_sched
;
173 /* Projects out the loops that will be wrapped over the threads
176 isl_union_map
*shared_proj
;
178 /* A map that takes the range of shared_sched as input,
179 * wraps the appropriate loops over the threads and then projects
182 isl_map
*privatization
;
184 /* A map from the shared memory tile loops and the thread indices
185 * (as parameters) to the set of accessed memory elements that
186 * will be accessed through private copies.
188 isl_union_map
*private_access
;
190 /* The schedule for the current private/shared access
191 * (within print_private_access or print_shared_access).
194 /* The array reference group corresponding to copy_sched. */
195 struct gpu_array_ref_group
*copy_group
;
197 /* Is any array in the current kernel marked force_private? */
198 int any_force_private
;
200 /* First loop to unroll (or -1 if none) in the current part of the
207 /* Note: in the input file, the sizes of the grid and the blocks
208 * are specified in the order x, y, z, but internally, the sizes
209 * are stored in reverse order, so that the last element always
210 * refers to the x dimension.
217 /* Print the name of the local copy of a given group of array references.
219 static __isl_give isl_printer
*print_array_name(__isl_take isl_printer
*p
,
220 struct gpu_array_ref_group
*group
)
224 if (group
->private_tile
)
225 p
= isl_printer_print_str(p
, "private_");
226 else if (group
->shared_tile
)
227 p
= isl_printer_print_str(p
, "shared_");
230 p
= isl_printer_print_str(p
, group
->array
->name
);
231 if (!global
&& group
->array
->n_group
> 1) {
232 p
= isl_printer_print_str(p
, "_");
233 p
= isl_printer_print_int(p
, group
->nr
);
239 /* Collect all references to the given array and store pointers to them
242 * If the array contains structures, then there is no need to collect
243 * the references since we will not be computing any reference groups.
245 static void collect_references(struct gpu_prog
*prog
,
246 struct gpu_array_info
*array
)
251 if (array
->has_compound_element
)
255 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
256 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
257 struct gpu_stmt_access
*access
;
259 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
261 name
= isl_map_get_tuple_name(access
->access
,
263 if (name
&& !strcmp(array
->name
, name
))
269 array
->refs
= isl_alloc_array(prog
->ctx
, struct gpu_stmt_access
*, n
);
273 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
274 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
275 struct gpu_stmt_access
*access
;
277 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
279 name
= isl_map_get_tuple_name(access
->access
,
281 if (!name
|| strcmp(array
->name
, name
))
284 array
->refs
[n
++] = access
;
289 /* Create a gpu_array_tile for an array of dimension "n_index".
291 static struct gpu_array_tile
*create_tile(isl_ctx
*ctx
, int n_index
)
294 struct gpu_array_tile
*tile
;
296 tile
= isl_calloc_type(ctx
, struct gpu_array_tile
);
301 tile
->bound
= isl_alloc_array(ctx
, struct gpu_array_bound
, n_index
);
304 for (i
= 0; i
< n_index
; ++i
) {
305 tile
->bound
[i
].size
= NULL
;
306 tile
->bound
[i
].lb
= NULL
;
307 tile
->bound
[i
].stride
= NULL
;
308 tile
->bound
[i
].shift
= NULL
;
309 tile
->bound
[i
].shift_map
= NULL
;
315 static void *free_tile(struct gpu_array_tile
*tile
)
322 for (j
= 0; j
< tile
->n
; ++j
) {
323 isl_val_free(tile
->bound
[j
].size
);
324 isl_val_free(tile
->bound
[j
].stride
);
325 isl_aff_free(tile
->bound
[j
].lb
);
326 isl_aff_free(tile
->bound
[j
].shift
);
327 isl_basic_map_free(tile
->bound
[j
].shift_map
);
330 isl_multi_aff_free(tile
->tiling
);
336 static struct pet_array
*find_array(struct ppcg_scop
*scop
,
337 __isl_keep isl_set
*accessed
)
342 id
= isl_set_get_tuple_id(accessed
);
344 for (i
= 0; i
< scop
->n_array
; ++i
) {
347 id_i
= isl_set_get_tuple_id(scop
->arrays
[i
]->extent
);
354 return i
< scop
->n_array
? scop
->arrays
[i
] : NULL
;
357 /* Compute and return the extent of "array", taking into account the set of
360 * In particular, the extent in the outer dimension is taken
361 * from "accessed", while then extent in the remaing dimensions
362 * are taken from array->extent.
364 * The extent in the outer dimension cannot be taken from array->extent
365 * because that may be unbounded. Furthermore, even if it is bounded,
366 * it may be larger than the piece of the array that is being accessed.
368 static __isl_give isl_set
*compute_extent(struct pet_array
*array
,
369 __isl_keep isl_set
*accessed
)
376 extent
= isl_set_copy(array
->extent
);
378 n_index
= isl_set_dim(accessed
, isl_dim_set
);
382 extent
= isl_set_project_out(extent
, isl_dim_set
, 0, 1);
383 outer
= isl_set_copy(accessed
);
384 outer
= isl_set_project_out(outer
, isl_dim_set
, 1, n_index
- 1);
385 extent
= isl_set_flat_product(outer
, extent
);
386 id
= isl_set_get_tuple_id(accessed
);
387 extent
= isl_set_set_tuple_id(extent
, id
);
392 /* Is the array "array" being extracted a read-only scalar?
394 * That is, is "array" a scalar that is never possibly written to.
395 * An array containing structures is never considered to be a scalar.
397 static int is_read_only_scalar(struct gpu_array_info
*array
,
398 struct gpu_prog
*prog
)
401 isl_union_map
*write
;
404 if (array
->has_compound_element
)
406 if (array
->n_index
!= 0)
409 write
= isl_union_map_copy(prog
->may_write
);
410 space
= isl_set_universe(isl_space_copy(array
->space
));
411 write
= isl_union_map_intersect_range(write
,
412 isl_union_set_from_set(space
));
413 empty
= isl_union_map_is_empty(write
);
414 isl_union_map_free(write
);
419 /* Compute bounds on the host arrays based on the accessed elements
420 * and collect all references to the array.
422 * If the array is zero-dimensional and does not contain structures,
423 * i.e., if the array is a scalar, we check whether it is read-only.
425 static int extract_array_info(__isl_take isl_set
*array
, void *user
)
428 struct gpu_prog
*prog
= (struct gpu_prog
*)user
;
432 struct pet_array
*pa
;
433 struct gpu_array_info
*info
;
436 info
= &prog
->array
[prog
->n_array
];
439 n_index
= isl_set_dim(array
, isl_dim_set
);
440 name
= isl_set_get_tuple_name(array
);
441 bounds
= isl_alloc_array(isl_set_get_ctx(array
),
442 isl_pw_aff
*, n_index
);
446 info
->space
= isl_set_get_space(array
);
447 info
->name
= strdup(name
);
448 info
->n_index
= n_index
;
449 info
->bound
= bounds
;
450 info
->linearize
= prog
->scop
->options
->linearize_device_arrays
;
452 pa
= find_array(prog
->scop
, array
);
454 isl_die(isl_set_get_ctx(array
), isl_error_internal
,
455 "unable to find array in scop", goto error
);
457 info
->type
= strdup(pa
->element_type
);
458 info
->size
= pa
->element_size
;
459 info
->local
= pa
->declared
&& !pa
->exposed
;
460 info
->has_compound_element
= pa
->element_is_record
;
461 info
->read_only_scalar
= is_read_only_scalar(info
, prog
);
463 extent
= compute_extent(pa
, array
);
464 info
->extent
= extent
;
465 for (i
= 0; i
< n_index
; ++i
) {
471 dom
= isl_set_copy(extent
);
472 dom
= isl_set_project_out(dom
, isl_dim_set
, i
+ 1,
474 dom
= isl_set_project_out(dom
, isl_dim_set
, 0, i
);
475 if (!isl_set_dim_has_upper_bound(dom
, isl_dim_set
, 0)) {
476 fprintf(stderr
, "unable to determine extent of '%s' "
477 "in dimension %d\n", info
->name
, i
);
478 dom
= isl_set_free(dom
);
480 bound
= isl_set_dim_max(dom
, 0);
481 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
482 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
483 one
= isl_aff_zero_on_domain(ls
);
484 one
= isl_aff_add_constant_si(one
, 1);
485 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
486 bound
= isl_pw_aff_gist(bound
, isl_set_copy(prog
->context
));
489 if (!isl_pw_aff_is_cst(bound
))
493 collect_references(prog
, info
);
502 /* Compute a mapping from all outer arrays (of structs) in scop
503 * to their innermost arrays.
505 * In particular, for each array of a primitive type, the result
506 * contains the identity mapping on that array.
507 * For each array involving member accesses, the result
508 * contains a mapping from the elements of the outer array of structs
509 * to all corresponding elements of the innermost nested arrays.
511 static __isl_give isl_union_map
*compute_to_inner(struct ppcg_scop
*scop
)
514 isl_union_map
*to_inner
;
516 to_inner
= isl_union_map_empty(isl_set_get_space(scop
->context
));
518 for (i
= 0; i
< scop
->n_array
; ++i
) {
519 struct pet_array
*array
= scop
->arrays
[i
];
523 if (array
->element_is_record
)
526 set
= isl_set_copy(array
->extent
);
527 map
= isl_set_identity(isl_set_copy(set
));
529 while (set
&& isl_set_is_wrapping(set
)) {
533 id
= isl_set_get_tuple_id(set
);
534 wrapped
= isl_set_unwrap(set
);
535 wrapped
= isl_map_domain_map(wrapped
);
536 wrapped
= isl_map_set_tuple_id(wrapped
, isl_dim_in
, id
);
537 map
= isl_map_apply_domain(map
, wrapped
);
538 set
= isl_map_domain(isl_map_copy(map
));
541 map
= isl_map_gist_domain(map
, set
);
543 to_inner
= isl_union_map_add_map(to_inner
, map
);
549 /* For each array in "prog", store the (untagged) order dependences
550 * derived from the array in array->dep_order.
551 * In particular, consider all references that access the given array
552 * and take the order dependences that have one of these references
553 * as source. (Since an order dependence relates two references to
554 * the same array, the target of these order dependences will also
555 * be one of these references.)
556 * Additionally, store the union of these array->dep_order relations
557 * for all non-scalar arrays in prog->array_order.
559 void collect_order_dependences(struct gpu_prog
*prog
)
563 isl_union_map
*accesses
;
565 space
= isl_union_map_get_space(prog
->read
);
566 prog
->array_order
= isl_union_map_empty(space
);
568 accesses
= isl_union_map_copy(prog
->scop
->tagged_reads
);
569 accesses
= isl_union_map_union(accesses
,
570 isl_union_map_copy(prog
->scop
->tagged_may_writes
));
571 accesses
= isl_union_map_universe(accesses
);
572 accesses
= isl_union_map_apply_range(accesses
,
573 isl_union_map_copy(prog
->to_outer
));
575 for (i
= 0; i
< prog
->n_array
; ++i
) {
576 struct gpu_array_info
*array
= &prog
->array
[i
];
579 isl_union_map
*order
;
581 set
= isl_set_universe(isl_space_copy(array
->space
));
582 uset
= isl_union_set_from_set(set
);
583 uset
= isl_union_map_domain(
584 isl_union_map_intersect_range(isl_union_map_copy(accesses
),
586 order
= isl_union_map_copy(prog
->scop
->tagged_dep_order
);
587 order
= isl_union_map_intersect_domain(order
, uset
);
588 order
= isl_union_map_zip(order
);
589 order
= isl_union_set_unwrap(isl_union_map_domain(order
));
590 array
->dep_order
= order
;
592 if (gpu_array_is_scalar(array
))
595 prog
->array_order
= isl_union_map_union(prog
->array_order
,
596 isl_union_map_copy(array
->dep_order
));
599 isl_union_map_free(accesses
);
602 /* Construct a gpu_array_info for each array possibly accessed by "prog" and
603 * collect them in prog->array.
605 * If there are any member accesses involved, then they are first mapped
606 * to the outer arrays of structs.
608 * If we are allowing live range reordering, then also set
609 * the dep_order field. Otherwise leave it NULL.
611 static int collect_array_info(struct gpu_prog
*prog
)
614 isl_union_set
*arrays
;
616 arrays
= isl_union_map_range(isl_union_map_copy(prog
->read
));
617 arrays
= isl_union_set_union(arrays
,
618 isl_union_map_range(isl_union_map_copy(prog
->may_write
)));
620 arrays
= isl_union_set_apply(arrays
,
621 isl_union_map_copy(prog
->to_outer
));
623 arrays
= isl_union_set_coalesce(arrays
);
625 prog
->n_array
= isl_union_set_n_set(arrays
);
626 prog
->array
= isl_calloc_array(prog
->ctx
,
627 struct gpu_array_info
, prog
->n_array
);
630 r
= isl_union_set_foreach_set(arrays
, &extract_array_info
, prog
);
631 isl_union_set_free(arrays
);
633 if (prog
->scop
->options
->live_range_reordering
)
634 collect_order_dependences(prog
);
639 static void free_array_info(struct gpu_prog
*prog
)
643 for (i
= 0; i
< prog
->n_array
; ++i
) {
644 int n_index
= prog
->array
[i
].n_index
;
645 free(prog
->array
[i
].type
);
646 free(prog
->array
[i
].name
);
647 for (j
= 0; j
< n_index
; ++j
)
648 isl_pw_aff_free(prog
->array
[i
].bound
[j
]);
649 isl_space_free(prog
->array
[i
].space
);
650 isl_set_free(prog
->array
[i
].extent
);
651 free(prog
->array
[i
].bound
);
652 free(prog
->array
[i
].refs
);
653 isl_union_map_free(prog
->array
[i
].dep_order
);
658 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
659 * as an array or through a pointer reference, but as a single data element.
660 * At the moment, scalars are represented as zero-dimensional arrays.
661 * A zero-dimensional array containing structures is not considered
664 int gpu_array_is_scalar(struct gpu_array_info
*array
)
666 return !array
->has_compound_element
&& array
->n_index
== 0;
669 /* Is "array" a read-only scalar?
671 int gpu_array_is_read_only_scalar(struct gpu_array_info
*array
)
673 return array
->read_only_scalar
;
676 /* Internal data structure for extract_size_of_type.
677 * "type" specifies the name of the space that we want to extract.
678 * "res" is used to store the subset of that space.
680 struct ppcg_extract_size_data
{
685 /* This function is called for each set in a union_set.
686 * If the name of the set matches data->type, we store the
689 static int extract_size_of_type(__isl_take isl_set
*size
, void *user
)
691 struct ppcg_extract_size_data
*data
= user
;
694 name
= isl_set_get_tuple_name(size
);
695 if (name
&& !strcmp(name
, data
->type
)) {
704 /* Given a union map { kernel[i] -> *[...] },
705 * return the range in the space called "type" for the kernel with
706 * sequence number "id".
708 static __isl_give isl_set
*extract_sizes(__isl_keep isl_union_map
*sizes
,
709 const char *type
, int id
)
713 isl_union_set
*local_sizes
;
714 struct ppcg_extract_size_data data
= { type
, NULL
};
719 space
= isl_union_map_get_space(sizes
);
720 space
= isl_space_set_from_params(space
);
721 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
722 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
723 dom
= isl_set_universe(space
);
724 dom
= isl_set_fix_si(dom
, isl_dim_set
, 0, id
);
726 local_sizes
= isl_union_set_apply(isl_union_set_from_set(dom
),
727 isl_union_map_copy(sizes
));
728 isl_union_set_foreach_set(local_sizes
, &extract_size_of_type
, &data
);
729 isl_union_set_free(local_sizes
);
733 /* Given a singleton set, extract the first (at most *len) elements
734 * of the single integer tuple into *sizes and update *len if needed.
736 static void read_sizes_from_set(__isl_take isl_set
*set
, int *sizes
, int *len
)
744 dim
= isl_set_dim(set
, isl_dim_set
);
748 for (i
= 0; i
< *len
; ++i
) {
751 v
= isl_set_plain_get_val_if_fixed(set
, isl_dim_set
, i
);
754 sizes
[i
] = isl_val_get_num_si(v
);
761 /* Extract user specified "tile" sizes from the "sizes" command line option,
762 * defaulting to option->tile_size in each dimension.
764 static void read_tile_sizes(struct gpu_gen
*gen
)
769 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, gen
->tile_len
);
770 assert(gen
->tile_size
);
771 for (n
= 0; n
< gen
->tile_len
; ++n
)
772 gen
->tile_size
[n
] = gen
->options
->tile_size
;
774 size
= extract_sizes(gen
->sizes
, "tile", gen
->kernel_id
);
775 read_sizes_from_set(size
, gen
->tile_size
, &gen
->tile_len
);
777 if (gen
->n_parallel
> gen
->tile_len
)
778 gen
->n_parallel
= gen
->tile_len
;
781 /* Extract user specified "block" sizes from the "sizes" command line option,
782 * after filling in some potentially useful defaults.
784 static void read_block_sizes(struct gpu_gen
*gen
)
790 gen
->n_block
= (n
<= 3) ? n
: 3;
791 switch (gen
->n_block
) {
793 gen
->block_dim
[0] = 512;
796 gen
->block_dim
[0] = 32;
797 gen
->block_dim
[1] = 16;
800 gen
->block_dim
[0] = 32;
801 gen
->block_dim
[1] = 4;
802 gen
->block_dim
[2] = 4;
806 size
= extract_sizes(gen
->sizes
, "block", gen
->kernel_id
);
807 read_sizes_from_set(size
, gen
->block_dim
, &gen
->n_block
);
810 /* Extract user specified "grid" sizes from the "sizes" command line option,
811 * after filling in some potentially useful defaults.
813 static void read_grid_sizes(struct gpu_gen
*gen
)
815 int n
= gen
->n_parallel
;
818 gen
->n_grid
= (n
<= 2) ? n
: 2;
819 switch (gen
->n_grid
) {
821 gen
->grid_dim
[0] = 32768;
824 gen
->grid_dim
[0] = 256;
825 gen
->grid_dim
[1] = 256;
829 size
= extract_sizes(gen
->sizes
, "grid", gen
->kernel_id
);
830 read_sizes_from_set(size
, gen
->grid_dim
, &gen
->n_grid
);
833 /* Extract user specified sizes from the "sizes" command line option
834 * after filling in some potentially useful defaults.
836 static void read_sizes(struct gpu_gen
*gen
)
838 read_tile_sizes(gen
);
839 read_block_sizes(gen
);
840 read_grid_sizes(gen
);
843 static void *free_stmts(struct gpu_stmt
*stmts
, int n
)
850 for (i
= 0; i
< n
; ++i
) {
851 struct gpu_stmt_access
*access
, *next
;
853 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
855 isl_id_free(access
->ref_id
);
856 isl_map_free(access
->access
);
857 isl_map_free(access
->tagged_access
);
861 isl_id_free(stmts
[i
].id
);
868 /* Construct a map from a domain of dimensionality "len"
869 * to a domain of dimensionality "len" + "tile_len" that tiles
870 * the "tile_len" coordinates starting at "first".
871 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
872 * "dim" prescribes the parameters.
874 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
875 int first
, int tile_len
, int *tile_size
)
882 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
883 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
884 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
885 ls
= isl_local_space_from_space(dim
);
887 for (i
= 0; i
< len
- tile_len
; ++i
) {
888 int j
= i
< first
? i
: i
+ tile_len
;
889 int k
= i
< first
? i
: i
+ 2 * tile_len
;
891 c
= isl_equality_alloc(isl_local_space_copy(ls
));
892 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, j
, -1);
893 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
894 bmap
= isl_basic_map_add_constraint(bmap
, c
);
897 for (i
= 0; i
< tile_len
; ++i
) {
898 c
= isl_equality_alloc(isl_local_space_copy(ls
));
899 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
,
901 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
902 first
+ i
, tile_size
[i
]);
903 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
904 first
+ i
+ tile_len
, 1);
905 bmap
= isl_basic_map_add_constraint(bmap
, c
);
907 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
908 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
909 first
+ i
+ tile_len
, 1);
910 bmap
= isl_basic_map_add_constraint(bmap
, c
);
912 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
913 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
914 first
+ i
+ tile_len
, -1);
915 c
= isl_constraint_set_constant_si(c
, tile_size
[i
] - 1);
916 bmap
= isl_basic_map_add_constraint(bmap
, c
);
919 isl_local_space_free(ls
);
921 return isl_map_from_basic_map(bmap
);
924 /* Construct a map from a domain of dimensionality "len"
925 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
926 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
927 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
928 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
929 * that are projected out at the end.
930 * "dim" prescribes the parameters.
932 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
933 int first
, int wrap_len
, int *wrap_size
)
940 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
941 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
942 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
943 ls
= isl_local_space_from_space(dim
);
945 for (i
= 0; i
< len
; ++i
) {
946 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
948 c
= isl_equality_alloc(isl_local_space_copy(ls
));
949 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
950 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
951 bmap
= isl_basic_map_add_constraint(bmap
, c
);
954 for (i
= 0; i
< wrap_len
; ++i
) {
955 c
= isl_equality_alloc(isl_local_space_copy(ls
));
956 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
958 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
959 first
+ wrap_len
+ i
, 1);
960 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
961 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
962 bmap
= isl_basic_map_add_constraint(bmap
, c
);
964 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
965 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
966 first
+ wrap_len
+ i
, 1);
967 bmap
= isl_basic_map_add_constraint(bmap
, c
);
969 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
970 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
971 first
+ wrap_len
+ i
, -1);
972 c
= isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
973 bmap
= isl_basic_map_add_constraint(bmap
, c
);
976 isl_local_space_free(ls
);
978 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
979 first
+ 2 * wrap_len
, wrap_len
);
981 return isl_map_from_basic_map(bmap
);
984 /* Add "n" parameters named prefix%d.
986 static __isl_give isl_set
*add_params( __isl_take isl_set
*set
,
987 int n
, const char *prefix
)
993 nparam
= isl_set_dim(set
, isl_dim_param
);
994 set
= isl_set_add_dims(set
, isl_dim_param
, n
);
996 for (i
= 0; i
< n
; ++i
) {
997 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
998 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1005 /* Equate the "n" dimensions of "set" starting at "first" to
1006 * freshly created parameters named prefix%d.
1008 static __isl_give isl_set
*parametrize(__isl_take isl_set
*set
,
1009 int first
, int n
, const char *prefix
)
1014 nparam
= isl_set_dim(set
, isl_dim_param
);
1016 set
= add_params(set
, n
, prefix
);
1018 for (i
= 0; i
< n
; ++i
)
1019 set
= isl_set_equate(set
, isl_dim_param
, nparam
+ i
,
1020 isl_dim_set
, first
+ i
);
1025 /* Given a parameter space "space", create a set of dimension "len"
1026 * of which the "n" dimensions starting at "first" are equated to
1027 * freshly created parameters named prefix%d.
1029 static __isl_give isl_set
*parametrization(__isl_take isl_space
*space
,
1030 int len
, int first
, int n
, const char *prefix
)
1034 space
= isl_space_set_from_params(space
);
1035 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
1036 set
= isl_set_universe(space
);
1038 return parametrize(set
, first
, n
, prefix
);
1041 /* Tile the B loops over the tile sizes and then tile/wrap
1042 * the T1 loops over the blocks.
1044 static __isl_give isl_union_map
*tile_schedule(struct gpu_gen
*gen
,
1045 __isl_take isl_union_map
*sched
)
1048 isl_map
*tiling
, *block_tiling
;
1050 dim
= isl_union_map_get_space(sched
);
1051 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
1052 gen
->tile_first
, gen
->tile_len
, gen
->tile_size
);
1054 if (gen
->options
->wrap
)
1055 block_tiling
= wrap(dim
, gen
->untiled_len
+ gen
->tile_len
,
1056 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
1058 block_tiling
= tile(dim
, gen
->untiled_len
+ gen
->tile_len
,
1059 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
1061 gen
->tiled_len
= gen
->untiled_len
+ gen
->tile_len
+ gen
->n_grid
;
1063 tiling
= isl_map_apply_range(tiling
, block_tiling
);
1065 sched
= isl_union_map_apply_range(sched
,
1066 isl_union_map_from_map(tiling
));
1068 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
1073 /* Equate the "T1P" iterators in the tiled schedule "sched"
1074 * to the block dimensions.
1076 static __isl_give isl_union_map
*parametrize_tiled_schedule(
1077 struct gpu_gen
*gen
, __isl_take isl_union_map
*sched
)
1082 dim
= isl_union_map_get_space(sched
);
1083 par
= parametrization(dim
, gen
->tiled_len
,
1084 gen
->tile_first
+ gen
->n_grid
, gen
->n_grid
, "b");
1085 sched
= isl_union_map_intersect_range(sched
,
1086 isl_union_set_from_set(par
));
1091 /* Tile/wrap the P1 loops over the threads.
1093 static __isl_give isl_union_map
*thread_tile_schedule(struct gpu_gen
*gen
,
1094 __isl_take isl_union_map
*sched
)
1100 dim
= isl_union_map_get_space(sched
);
1102 if (gen
->options
->wrap
)
1103 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
1104 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1106 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
1107 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1108 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
1110 sched
= isl_union_map_apply_range(sched
,
1111 isl_union_map_from_map(tiling
));
1113 par
= parametrization(dim
, gen
->thread_tiled_len
,
1114 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
1116 sched
= isl_union_map_intersect_range(sched
,
1117 isl_union_set_from_set(par
));
1119 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
1124 /* If the user asked for it, scale the shared memory tile loops
1125 * (T1T and T2) of "sched" by gen->tile_size[i].
1126 * If we are not performing "wrapping", then additionally scale the T1P
1127 * loops by gen->grid_dim[i].
1129 static __isl_give isl_union_map
*scale_tile_loops(struct gpu_gen
*gen
,
1130 __isl_take isl_union_map
*sched
)
1134 isl_basic_map
*scale
;
1136 isl_local_space
*ls
;
1138 if (!gen
->options
->scale_tile_loops
)
1141 dim
= isl_union_map_get_space(sched
);
1142 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
1143 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
1144 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1145 ls
= isl_local_space_from_space(dim
);
1147 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
1150 if (i
>= gen
->tile_first
&& i
< gen
->tile_first
+ gen
->n_grid
) {
1151 f
= gen
->tile_size
[i
- gen
->tile_first
];
1152 if (!gen
->options
->wrap
)
1153 f
*= gen
->grid_dim
[i
- gen
->tile_first
];
1154 } else if (i
>= gen
->tile_first
+ gen
->n_grid
&&
1155 i
< gen
->tile_first
+ gen
->n_grid
+ gen
->tile_len
) {
1156 f
= gen
->tile_size
[i
- (gen
->tile_first
+ gen
->n_grid
)];
1159 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1160 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1161 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1162 scale
= isl_basic_map_add_constraint(scale
, c
);
1165 isl_local_space_free(ls
);
1167 sched
= isl_union_map_apply_range(sched
,
1168 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1173 /* If we are not performing "wrapping" and if the user asked for it,
1174 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
1176 static __isl_give isl_union_map
*scale_thread_tile_loops(struct gpu_gen
*gen
,
1177 __isl_take isl_union_map
*sched
)
1181 isl_basic_map
*scale
;
1183 isl_local_space
*ls
;
1185 if (gen
->options
->wrap
)
1187 if (!gen
->options
->scale_tile_loops
)
1190 dim
= isl_union_map_get_space(sched
);
1191 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
1192 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
1193 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1194 ls
= isl_local_space_from_space(dim
);
1196 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
1199 if (i
>= gen
->shared_len
&&
1200 i
< gen
->shared_len
+ gen
->n_block
)
1201 f
= gen
->block_dim
[i
- gen
->shared_len
];
1203 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1204 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1205 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1206 scale
= isl_basic_map_add_constraint(scale
, c
);
1209 isl_local_space_free(ls
);
1211 sched
= isl_union_map_apply_range(sched
,
1212 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1217 /* If we are not performing "wrapping" and if the user asked for it,
1218 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
1220 static __isl_give isl_union_map
*scale_access_tile_loops(struct gpu_gen
*gen
,
1221 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
1225 isl_basic_map
*scale
;
1227 isl_local_space
*ls
;
1229 if (gen
->options
->wrap
)
1231 if (!gen
->options
->scale_tile_loops
)
1234 dim
= isl_union_map_get_space(sched
);
1235 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1236 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1237 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1238 ls
= isl_local_space_from_space(dim
);
1240 for (i
= 0; i
< len
; ++i
) {
1243 if (i
>= first
&& i
< first
+ n_tile
)
1244 f
= gen
->kernel
->block_dim
[i
- first
];
1246 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1247 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1248 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1249 scale
= isl_basic_map_add_constraint(scale
, c
);
1252 isl_local_space_free(ls
);
1254 sched
= isl_union_map_apply_range(sched
,
1255 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1260 /* Add "len" parameters p[i] called prefix%d,
1261 * with bounds to 0 <= p[i] < size[i].
1263 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1264 int len
, int *size
, const char *prefix
)
1269 isl_basic_set
*bset
;
1271 isl_local_space
*ls
;
1274 nparam
= isl_set_dim(set
, isl_dim_param
);
1275 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1277 for (i
= 0; i
< len
; ++i
) {
1278 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1279 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1283 dim
= isl_set_get_space(set
);
1284 bset
= isl_basic_set_universe(isl_space_copy(dim
));
1285 ls
= isl_local_space_from_space(dim
);
1287 for (i
= 0; i
< len
; ++i
) {
1288 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1289 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1291 bset
= isl_basic_set_add_constraint(bset
, c
);
1293 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1294 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1296 c
= isl_constraint_set_constant_si(c
, size
[i
] - 1);
1297 bset
= isl_basic_set_add_constraint(bset
, c
);
1300 isl_local_space_free(ls
);
1302 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
1305 /* Add "len" parameters p[i] called prefix%d,
1306 * with bounds to 0 <= p[i] < size[i].
1308 static __isl_give isl_set
*add_bounded_parameters_dynamic(
1309 __isl_take isl_set
*set
, __isl_keep isl_multi_pw_aff
*size
,
1315 isl_local_space
*ls
;
1318 len
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
1319 nparam
= isl_set_dim(set
, isl_dim_param
);
1320 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1322 for (i
= 0; i
< len
; ++i
) {
1323 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1324 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1328 space
= isl_space_params(isl_set_get_space(set
));
1329 ls
= isl_local_space_from_space(space
);
1330 for (i
= 0; i
< len
; ++i
) {
1331 isl_pw_aff
*param
, *size_i
, *zero
;
1334 param
= isl_pw_aff_var_on_domain(isl_local_space_copy(ls
),
1335 isl_dim_param
, nparam
+ i
);
1337 size_i
= isl_multi_pw_aff_get_pw_aff(size
, i
);
1338 bound
= isl_pw_aff_lt_set(isl_pw_aff_copy(param
), size_i
);
1339 set
= isl_set_intersect_params(set
, bound
);
1341 zero
= isl_pw_aff_zero_on_domain(isl_local_space_copy(ls
));
1342 bound
= isl_pw_aff_ge_set(param
, zero
);
1343 set
= isl_set_intersect_params(set
, bound
);
1345 isl_local_space_free(ls
);
1350 /* Construct a map from an access to group->array to the corresponding
1351 * shared/private memory tile.
1352 * The map is of the form
1354 * { [D[i] -> A[a]] -> T[t] }
1356 * where D represents the initial shared_len dimensions
1357 * of the computed schedule.
1359 static __isl_give isl_map
*shift_access(struct gpu_array_ref_group
*group
)
1361 struct gpu_array_tile
*tile
;
1362 isl_multi_aff
*tiling
;
1364 tile
= group
->private_tile
;
1366 tile
= group
->shared_tile
;
1368 tiling
= isl_multi_aff_copy(tile
->tiling
);
1370 return isl_map_from_multi_aff(tiling
);
1373 /* Does "map" have an obviously fixed value at variable "pos" of "type"?
1375 static int map_plain_is_fixed(isl_map
*map
, enum isl_dim_type type
,
1381 v
= isl_map_plain_get_val_if_fixed(map
, type
, pos
);
1384 fixed
= isl_val_is_int(v
);
1390 /* Given a schedule that iterates over all elements in a piece of an array,
1391 * perform tiling/wrapping over the threads.
1393 * In particular, we tile the final iterators so that the final thread
1394 * dimension runs over the final array dimension.
1395 * However, if those final iterators have only a single iteration,
1396 * we try to tile earlier iterators instead.
1398 static __isl_give isl_map
*tile_access_schedule(struct gpu_gen
*gen
,
1399 __isl_take isl_map
*sched
)
1402 isl_union_map
*usched
;
1405 unsigned nvar
= isl_map_dim(sched
, isl_dim_out
);
1409 n_tile
= gen
->kernel
->n_block
;
1410 if (n_tile
> nvar
) {
1412 sched
= isl_map_insert_dims(sched
,
1413 isl_dim_out
, 0, n_tile
- nvar
);
1414 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1415 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1419 first
= nvar
- n_tile
;
1421 for (; first
> 0; first
--)
1422 if (!map_plain_is_fixed(sched
, isl_dim_out
, first
+ n_tile
- 1))
1425 dim
= isl_map_get_space(sched
);
1426 dim
= isl_space_params(dim
);
1427 if (gen
->options
->wrap
)
1428 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1429 n_tile
, gen
->kernel
->block_dim
);
1431 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1432 n_tile
, gen
->kernel
->block_dim
);
1433 sched
= isl_map_apply_range(sched
, tiling
);
1435 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
, n_tile
, "t");
1436 sched
= isl_map_intersect_range(sched
, par
);
1438 usched
= isl_union_map_from_map(sched
);
1439 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1441 sched
= isl_map_from_union_map(usched
);
1446 /* Return the union of all read (read = 1) and/or write (write = 1)
1447 * access relations in the group.
1449 static __isl_give isl_union_map
*group_access_relation(
1450 struct gpu_array_ref_group
*group
, int read
, int write
)
1453 isl_union_map
*access
;
1455 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1456 for (i
= 0; i
< group
->n_ref
; ++i
) {
1459 if (!((read
&& group
->refs
[i
]->read
) ||
1460 (write
&& group
->refs
[i
]->write
)))
1462 map_i
= isl_map_copy(group
->refs
[i
]->access
);
1463 access
= isl_union_map_union(access
,
1464 isl_union_map_from_map(map_i
));
1470 /* Return the union of all tagged access relations in the group.
1472 static __isl_give isl_union_map
*group_tagged_access_relation(
1473 struct gpu_array_ref_group
*group
)
1476 isl_union_map
*access
;
1478 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1479 for (i
= 0; i
< group
->n_ref
; ++i
) {
1482 map_i
= isl_map_copy(group
->refs
[i
]->tagged_access
);
1483 access
= isl_union_map_union(access
,
1484 isl_union_map_from_map(map_i
));
1490 /* Return the extent of "array", recomputed from the bounds.
1491 * The recomputed extent may be simpler than the original extent.
1493 static __isl_give isl_set
*array_extent(struct gpu_array_info
*array
)
1498 isl_local_space
*ls
;
1501 id
= isl_set_get_tuple_id(array
->extent
);
1502 space
= isl_set_get_space(array
->extent
);
1503 extent
= isl_set_universe(isl_space_copy(space
));
1504 ls
= isl_local_space_from_space(space
);
1505 for (i
= 0; i
< array
->n_index
; ++i
) {
1511 extent
= isl_set_lower_bound_si(extent
, isl_dim_set
, i
, 0);
1513 aff
= isl_aff_var_on_domain(isl_local_space_copy(ls
),
1515 index
= isl_pw_aff_from_aff(aff
);
1516 bound
= isl_pw_aff_copy(array
->bound
[i
]);
1517 bound
= isl_pw_aff_from_range(bound
);
1518 bound
= isl_pw_aff_add_dims(bound
, isl_dim_in
, array
->n_index
);
1519 bound
= isl_pw_aff_set_tuple_id(bound
, isl_dim_in
,
1521 lt
= isl_pw_aff_lt_set(index
, bound
);
1522 extent
= isl_set_intersect(extent
, lt
);
1524 isl_local_space_free(ls
);
1530 /* Return a map from the first shared_len dimensions of the computed
1531 * schedule to the array tile in
1532 * global memory that corresponds to the shared memory copy.
1534 * In particular, return a map
1540 * tile_offset(i) <= a <= tile_offset(i) + tile_size - 1 (1)
1544 * 0 <= a <= array_size - 1 (2)
1546 * Note that if some stride has been detected (i.e., when
1547 * group->shared_tile->bound[i].shift is set), then a in (1) refers
1548 * to the shifted and scaled down version.
1550 * Constraints (1) are obtained by mapping the size constraints on the
1551 * shared/private memory tile back to the access relation.
1552 * Constraints (2) are obtained from the (recomputed) extent.
1554 static __isl_give isl_map
*group_tile(struct gpu_array_ref_group
*group
)
1557 int n_index
= group
->array
->n_index
;
1563 space
= isl_multi_aff_get_space(group
->shared_tile
->tiling
);
1564 space
= isl_space_range(space
);
1565 local
= isl_set_universe(space
);
1566 for (i
= 0; i
< n_index
; ++i
) {
1569 local
= isl_set_lower_bound_si(local
, isl_dim_set
, i
, 0);
1570 bound
= isl_val_copy(group
->shared_tile
->bound
[i
].size
);
1571 bound
= isl_val_sub_ui(bound
, 1);
1572 local
= isl_set_upper_bound_val(local
, isl_dim_set
, i
, bound
);
1574 local
= isl_set_preimage_multi_aff(local
,
1575 isl_multi_aff_copy(group
->shared_tile
->tiling
));
1576 tile
= isl_set_unwrap(local
);
1577 extent
= array_extent(group
->array
);
1578 tile
= isl_map_intersect_range(tile
, extent
);
1583 /* Given a mapping "iterator_map" from the AST schedule to a domain,
1584 * return the corresponding mapping from the AST schedule to
1585 * to the first shared_len dimensions of the schedule computed by PPCG.
1587 static __isl_give isl_pw_multi_aff
*compute_sched_to_shared(struct gpu_gen
*gen
,
1588 __isl_take isl_pw_multi_aff
*iterator_map
)
1590 isl_union_map
*umap
;
1592 isl_map
*map
, *sched
;;
1594 space
= isl_space_range(isl_pw_multi_aff_get_space(iterator_map
));
1595 space
= isl_space_from_domain(space
);
1596 space
= isl_space_add_dims(space
, isl_dim_out
, gen
->shared_len
);
1598 umap
= isl_union_map_copy(gen
->shared_sched
);
1599 umap
= isl_union_map_apply_range(umap
,
1600 isl_union_map_copy(gen
->shared_proj
));
1601 map
= isl_union_map_extract_map(umap
, space
);
1602 isl_union_map_free(umap
);
1604 sched
= isl_map_preimage_domain_pw_multi_aff(map
, iterator_map
);
1605 sched
= isl_map_detect_equalities(sched
);
1607 return isl_pw_multi_aff_from_map(sched
);
1610 /* Set unroll[j] if the input dimension j is involved in
1611 * the index expression represented by ma.
1613 static int check_unroll(__isl_take isl_set
*set
, __isl_take isl_multi_aff
*ma
,
1617 int n_in
= isl_multi_aff_dim(ma
, isl_dim_in
);
1618 int n_out
= isl_multi_aff_dim(ma
, isl_dim_out
);
1621 for (i
= 0; i
< n_out
; ++i
) {
1624 aff
= isl_multi_aff_get_aff(ma
, i
);
1625 for (j
= 0; j
< n_in
; ++j
)
1626 if (isl_aff_involves_dims(aff
, isl_dim_in
, j
, 1))
1632 isl_multi_aff_free(ma
);
1636 /* Given an array pos mapping input dimensions to the corresponding
1637 * output dimension, construct the corresponding map.
1639 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
1644 isl_basic_map
*bmap
;
1645 isl_local_space
*ls
;
1647 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1648 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1649 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1650 ls
= isl_local_space_from_space(dim
);
1652 for (i
= 0; i
< len
; ++i
) {
1653 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1654 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
,
1656 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
],
1658 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1660 isl_local_space_free(ls
);
1662 return isl_map_from_basic_map(bmap
);
1665 /* Remove the private tiles from all array reference groups,
1666 * except for the groups of arrays that are marked force_private.
1668 static void remove_private_tiles(struct gpu_gen
*gen
)
1672 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1673 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1675 if (array
->force_private
)
1678 for (j
= 0; j
< array
->n_group
; ++j
) {
1679 struct gpu_array_ref_group
*group
= array
->groups
[j
];
1681 group
->private_tile
= free_tile(group
->private_tile
);
1686 /* Find all loops involved in any of the index expressions for any of
1687 * the private accesses, move them innermost and then mark them as
1688 * requiring unrolling by setting gen->first_unroll.
1689 * The loops involved should all be parallel because of the checks
1690 * we performed in check_private_group_access. Moving them innermost
1691 * is therefore a valid transformation.
1693 * If any of the arrays are marked force_private, however, then
1694 * those loops may not be parallel with respect to the marked arrays.
1695 * If any of the loops would have to be moved innermost for the
1696 * (non forced) private accesses and if there are any force_private
1697 * arrays, then we revert the decision to map the selected arrays
1698 * to private memory. An alternative solution would be to expand
1699 * the force_private arrays.
1701 * Loops up to gen->shared_len are generated before the mapping to
1702 * threads is applied. They should therefore be ignored.
1704 * We compute the hidden equalities of the schedule first
1705 * since we will need them in our calls to isl_pw_multi_aff_from_map
1706 * and because we want to make sure that the same equalities
1707 * are also available to the code generator.
1709 static __isl_give isl_union_map
*interchange_for_unroll(struct gpu_gen
*gen
,
1710 __isl_take isl_union_map
*sched
)
1713 int unroll
[gen
->thread_tiled_len
];
1714 int perm
[gen
->thread_tiled_len
];
1717 int len
= gen
->shared_len
+ gen
->n_parallel
+ gen
->n_block
;
1719 gen
->first_unroll
= -1;
1721 sched
= isl_union_map_detect_equalities(sched
);
1722 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1724 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1725 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1727 for (j
= 0; j
< array
->n_group
; ++j
) {
1728 isl_union_map
*access
;
1730 isl_pw_multi_aff
*pma
;
1732 if (!array
->groups
[j
]->private_tile
)
1735 access
= group_access_relation(array
->groups
[j
], 1, 1);
1736 access
= isl_union_map_apply_domain(access
,
1737 isl_union_map_copy(sched
));
1739 acc
= isl_map_from_union_map(access
);
1740 pma
= isl_pw_multi_aff_from_map(acc
);
1741 isl_pw_multi_aff_foreach_piece(pma
,
1742 &check_unroll
, unroll
);
1744 isl_pw_multi_aff_free(pma
);
1748 for (i
= gen
->shared_len
; i
< len
; ++i
)
1755 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
1759 if (gen
->any_force_private
) {
1760 remove_private_tiles(gen
);
1765 for (i
= 0; i
< gen
->shared_len
; ++i
)
1767 for (i
= gen
->shared_len
; i
< gen
->thread_tiled_len
; ++i
)
1770 gen
->first_unroll
= j
- gen
->shared_len
;
1771 for (i
= gen
->shared_len
; i
< len
; ++i
)
1775 dim
= isl_union_map_get_space(sched
);
1776 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
1777 sched
= isl_union_map_apply_range(sched
,
1778 isl_union_map_from_map(permute
));
1783 /* Given a constraint
1785 * a(p,i) + j = g f(e)
1787 * or -a(p,i) - j = g f(e) if sign < 0,
1788 * store a(p,i) in bound->shift and g (stride) in bound->stride.
1789 * a(p,i) is assumed to be an expression in only the parameters
1790 * and the input dimensions.
1792 static void extract_stride(__isl_keep isl_constraint
*c
,
1793 struct gpu_array_bound
*bound
, __isl_keep isl_val
*stride
, int sign
)
1802 isl_val_free(bound
->stride
);
1803 bound
->stride
= isl_val_copy(stride
);
1805 space
= isl_constraint_get_space(c
);
1806 space
= isl_space_domain(space
);
1808 nparam
= isl_space_dim(space
, isl_dim_param
);
1809 nvar
= isl_space_dim(space
, isl_dim_set
);
1811 v
= isl_constraint_get_constant_val(c
);
1814 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1815 aff
= isl_aff_set_constant_val(aff
, v
);
1817 for (i
= 0; i
< nparam
; ++i
) {
1818 if (!isl_constraint_involves_dims(c
, isl_dim_param
, i
, 1))
1820 v
= isl_constraint_get_coefficient_val(c
, isl_dim_param
, i
);
1823 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_param
, i
, v
);
1826 for (i
= 0; i
< nvar
; ++i
) {
1827 if (!isl_constraint_involves_dims(c
, isl_dim_in
, i
, 1))
1829 v
= isl_constraint_get_coefficient_val(c
, isl_dim_in
, i
);
1832 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_in
, i
, v
);
1838 /* Given an equality constraint of a map with a single output dimension j,
1839 * check if the constraint is of the form
1841 * a(p,i) + j = g f(e)
1843 * with a(p,i) an expression in the parameters and input dimensions
1844 * and f(e) an expression in the existentially quantified variables.
1845 * If so, and if g is larger than any such g from a previously considered
1846 * constraint, then call extract_stride to record the stride information
1849 static int check_stride_constraint(__isl_take isl_constraint
*c
, void *user
)
1855 struct gpu_array_bound
*bound
= user
;
1857 ctx
= isl_constraint_get_ctx(c
);
1858 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1859 v
= isl_constraint_get_coefficient_val(c
, isl_dim_out
, 0);
1861 if (n_div
&& (isl_val_is_one(v
) || isl_val_is_negone(v
))) {
1862 int s
= isl_val_sgn(v
);
1863 isl_val
*stride
= isl_val_zero(ctx
);
1866 for (i
= 0; i
< n_div
; ++i
) {
1867 v
= isl_constraint_get_coefficient_val(c
,
1869 stride
= isl_val_gcd(stride
, v
);
1871 if (!isl_val_is_zero(stride
) &&
1872 isl_val_gt(stride
, bound
->stride
))
1873 extract_stride(c
, bound
, stride
, s
);
1875 isl_val_free(stride
);
1879 isl_constraint_free(c
);
1883 /* Given contraints on an array index i, check if we can find
1884 * a shift a(p) and a stride g such that
1886 * a(p) + i = 0 mod g
1888 * If so, record the information in bound and apply the mapping
1889 * i -> (i + a(p))/g to the array index in bounds and return
1890 * the new constraints.
1891 * If not, simply return the original constraints.
1893 * If bounds is a subset of the space
1897 * then the bound recorded in bound->shift is of the form
1901 * with s(D) equal to a(p) above.
1902 * The mapping recorded in bound->shift_map is of the form
1904 * [D -> i] -> [D -> (i + S(D))/g]
1906 * This mapping is computed as follows.
1907 * We first introduce "i" in the domain through precomposition
1908 * with [D -> i] -> D obtaining
1912 * Adding [D -> i] -> i produces
1914 * [D -> i] -> i + s(D)
1916 * and the domain product with [D -> i] -> D yields
1918 * [D -> i] -> [D -> i + s(D)]
1920 * Composition with [D -> i] -> [D -> i/g] gives the desired result.
1922 static __isl_give isl_basic_map
*check_stride(struct gpu_array_bound
*bound
,
1923 __isl_take isl_basic_map
*bounds
)
1926 isl_basic_map
*hull
;
1927 isl_basic_map
*shift
, *id
, *bmap
, *scale
;
1928 isl_basic_set
*bset
;
1931 bound
->stride
= NULL
;
1933 hull
= isl_basic_map_affine_hull(isl_basic_map_copy(bounds
));
1935 isl_basic_map_foreach_constraint(hull
, &check_stride_constraint
, bound
);
1937 isl_basic_map_free(hull
);
1942 shift
= isl_basic_map_from_aff(isl_aff_copy(bound
->shift
));
1943 space
= isl_basic_map_get_space(bounds
);
1944 bmap
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1945 shift
= isl_basic_map_apply_range(bmap
, shift
);
1946 space
= isl_basic_map_get_space(bounds
);
1947 id
= isl_basic_map_range_map(isl_basic_map_universe(space
));
1948 shift
= isl_basic_map_sum(id
, shift
);
1949 space
= isl_basic_map_get_space(bounds
);
1950 id
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1951 shift
= isl_basic_map_range_product(id
, shift
);
1953 space
= isl_space_domain(isl_basic_map_get_space(bounds
));
1954 id
= isl_basic_map_identity(isl_space_map_from_set(space
));
1955 space
= isl_space_range(isl_basic_map_get_space(bounds
));
1956 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1957 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, 0, 1);
1958 aff
= isl_aff_scale_down_val(aff
, isl_val_copy(bound
->stride
));
1959 scale
= isl_basic_map_from_aff(aff
);
1960 scale
= isl_basic_map_product(id
, scale
);
1962 bound
->shift_map
= isl_basic_map_apply_range(shift
, scale
);
1963 bmap
= isl_basic_map_copy(bound
->shift_map
);
1964 bset
= isl_basic_set_apply(isl_basic_map_wrap(bounds
), bmap
);
1965 bounds
= isl_basic_set_unwrap(bset
);
1970 /* Data used in compute_array_dim_size and compute_size_in_direction.
1972 * pos is the position of the variable representing the array index,
1973 * i.e., the variable for which want to compute the size. This variable
1974 * is also the last variable in the set.
1976 struct gpu_size_info
{
1977 isl_basic_set
*bset
;
1978 struct gpu_array_bound
*bound
;
1982 /* Given a constraint from the basic set describing the bounds on
1983 * an array index, check if it is a lower bound, say m i >= b(x), and,
1984 * if so, check whether the expression "i - ceil(b(x)/m) + 1" has a constant
1985 * upper bound. If so, and if this bound is smaller than any bound
1986 * derived from earlier constraints, set the size to this bound on
1987 * the expression and the lower bound to ceil(b(x)/m).
1989 static int compute_size_in_direction(__isl_take isl_constraint
*c
, void *user
)
1991 struct gpu_size_info
*size
= user
;
1998 nparam
= isl_basic_set_dim(size
->bset
, isl_dim_param
);
1999 n_div
= isl_constraint_dim(c
, isl_dim_div
);
2001 if (isl_constraint_involves_dims(c
, isl_dim_div
, 0, n_div
) ||
2002 !isl_constraint_is_lower_bound(c
, isl_dim_set
, size
->pos
)) {
2003 isl_constraint_free(c
);
2007 aff
= isl_constraint_get_bound(c
, isl_dim_set
, size
->pos
);
2008 aff
= isl_aff_ceil(aff
);
2010 lb
= isl_aff_copy(aff
);
2012 aff
= isl_aff_neg(aff
);
2013 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, size
->pos
, 1);
2015 v
= isl_basic_set_max_val(size
->bset
, aff
);
2018 if (isl_val_is_int(v
)) {
2019 v
= isl_val_add_ui(v
, 1);
2020 if (!size
->bound
->size
|| isl_val_lt(v
, size
->bound
->size
)) {
2021 isl_val_free(size
->bound
->size
);
2022 size
->bound
->size
= isl_val_copy(v
);
2023 lb
= isl_aff_drop_dims(lb
, isl_dim_in
, size
->pos
, 1);
2024 isl_aff_free(size
->bound
->lb
);
2025 size
->bound
->lb
= isl_aff_copy(lb
);
2031 isl_constraint_free(c
);
2036 /* Given a basic map "bounds" that maps parameters and input dimensions
2037 * to a single output dimension, look for an expression in the parameters
2038 * and input dimensions such that the range of the output dimension shifted
2039 * by this expression is a constant.
2041 * In particular, we currently only consider lower bounds on the output
2042 * dimension as candidate expressions.
2044 static int compute_array_dim_size(struct gpu_array_bound
*bound
,
2045 __isl_take isl_basic_map
*bounds
)
2047 struct gpu_size_info size
;
2049 bounds
= isl_basic_map_detect_equalities(bounds
);
2050 bounds
= check_stride(bound
, bounds
);
2056 size
.pos
= isl_basic_map_dim(bounds
, isl_dim_in
);
2057 size
.bset
= isl_basic_map_wrap(bounds
);
2058 size
.bset
= isl_basic_set_flatten(size
.bset
);
2059 size
.bset
= isl_set_simple_hull(isl_basic_set_compute_divs(size
.bset
));
2060 isl_basic_set_foreach_constraint(size
.bset
, &compute_size_in_direction
,
2062 isl_basic_set_free(size
.bset
);
2064 return bound
->size
? 0 : -1;
2067 /* Check if we can find a memory tile for the given array
2068 * based on the given accesses, and if so, put the results in "tile".
2070 * We project the accesses on each index in turn and look for a parametric
2071 * offset such that the size is constant.
2073 static int can_tile(__isl_keep isl_map
*access
, struct gpu_array_tile
*tile
)
2077 for (i
= 0; i
< tile
->n
; ++i
) {
2079 isl_basic_map
*hull
;
2081 access_i
= isl_map_copy(access
);
2082 access_i
= isl_map_project_out(access_i
, isl_dim_out
, 0, i
);
2083 access_i
= isl_map_project_out(access_i
, isl_dim_out
,
2084 1, tile
->n
- (i
+ 1));
2085 access_i
= isl_map_compute_divs(access_i
);
2086 hull
= isl_map_simple_hull(access_i
);
2087 if (compute_array_dim_size(&tile
->bound
[i
], hull
) < 0)
2094 /* Construct a map with input the shared tile loops and the loops that
2095 * will be wrapped around the threads that relates these later loops
2096 * to the thread indices and then projects them out.
2098 static __isl_give isl_map
*compute_privatization(struct gpu_gen
*gen
)
2106 dim
= isl_union_map_get_space(gen
->shared_sched
);
2108 if (gen
->options
->wrap
)
2109 tiling
= wrap(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2110 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2112 tiling
= tile(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2113 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2117 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2118 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
2121 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
2122 priv
= isl_map_intersect_range(priv
, par
);
2124 dim
= isl_map_get_space(priv
);
2125 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
2126 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
2127 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2130 priv
= isl_map_apply_range(priv
, proj
);
2135 /* Construct a map from domain_dim to domain_dim that increments
2136 * the dimension at position "pos" and leaves all other dimensions
2139 static __isl_give isl_map
*next(__isl_take isl_space
*domain_dim
, int pos
)
2142 int len
= isl_space_dim(domain_dim
, isl_dim_set
);
2144 isl_basic_map
*next
;
2145 isl_local_space
*ls
;
2147 dim
= isl_space_map_from_set(domain_dim
);
2148 next
= isl_basic_map_universe(isl_space_copy(dim
));
2149 ls
= isl_local_space_from_space(dim
);
2151 for (i
= 0; i
< len
; ++i
) {
2154 c
= isl_equality_alloc(isl_local_space_copy(ls
));
2155 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, 1);
2156 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
2158 c
= isl_constraint_set_constant_si(c
, 1);
2159 next
= isl_basic_map_add_constraint(next
, c
);
2162 isl_local_space_free(ls
);
2164 return isl_map_from_basic_map(next
);
2167 /* Check if the given access is coalesced.
2168 * That is, check whether incrementing the dimension that will get
2169 * wrapped over the last thread index results in incrementing
2170 * the last array index.
2172 * This function is only called for access relations without reuse.
2174 static int access_is_coalesced(struct gpu_gen
*gen
,
2175 __isl_keep isl_union_map
*access
)
2178 isl_map
*access_map
;
2179 isl_map
*next_thread_x
;
2180 isl_map
*next_element
;
2184 access
= isl_union_map_copy(access
);
2185 access
= isl_union_map_apply_domain(access
,
2186 isl_union_map_copy(gen
->tiled_sched
));
2187 access_map
= isl_map_from_union_map(access
);
2189 dim
= isl_map_get_space(access_map
);
2190 dim
= isl_space_domain(dim
);
2191 next_thread_x
= next(dim
, gen
->shared_len
+ gen
->n_block
- 1);
2193 dim
= isl_map_get_space(access_map
);
2194 dim
= isl_space_range(dim
);
2195 next_element
= next(dim
, isl_space_dim(dim
, isl_dim_set
) - 1);
2197 map
= isl_map_apply_domain(next_thread_x
, isl_map_copy(access_map
));
2198 map
= isl_map_apply_range(map
, access_map
);
2200 coalesced
= isl_map_is_subset(map
, next_element
);
2202 isl_map_free(next_element
);
2208 /* Given an access relation in terms of the first gen->shared_len + gen->n_block
2209 * dimensions of the computed schedule, check if it is bijective for
2210 * fixed values of the first gen->shared_len dimensions.
2211 * We perform this check by equating these dimensions to parameters.
2213 static int access_is_bijective(struct gpu_gen
*gen
, __isl_keep isl_map
*access
)
2219 access
= isl_map_copy(access
);
2220 space
= isl_space_params(isl_map_get_space(access
));
2221 par
= parametrization(space
, gen
->shared_len
+ gen
->n_block
,
2222 0, gen
->shared_len
, "s");
2223 access
= isl_map_intersect_domain(access
, par
);
2224 res
= isl_map_is_bijective(access
);
2225 isl_map_free(access
);
2230 /* Look for the last shared tile loop that affects the offset of "tile"
2231 * and return the result.
2232 * If there is no such loop, then return the index of the loop
2233 * before the first shared tile loop, in particular gen->tile_first - 1.
2235 static int compute_tile_last_shared(struct gpu_gen
*gen
,
2236 struct gpu_array_tile
*tile
)
2240 for (j
= gen
->shared_len
- 1; j
>= gen
->tile_first
; --j
) {
2241 for (i
= 0; i
< tile
->n
; ++i
) {
2245 lb
= tile
->bound
[i
].lb
;
2246 if (isl_aff_involves_dims(lb
, isl_dim_in
, j
, 1))
2249 shift
= tile
->bound
[i
].shift
;
2252 if (isl_aff_involves_dims(shift
, isl_dim_in
, j
, 1))
2262 /* Look for the last shared tile loop that affects the offset of the
2263 * shared or private tile and store the result in group->last_shared.
2264 * If there is no such loop, then group->last_shared is set to a value
2265 * before the first shared tile loop, in particular gen->tile_first - 1.
2266 * If there is no tile defined on the array reference group,
2267 * then set group->last_shared to gen->shared_len - 1.
2269 static void set_last_shared(struct gpu_gen
*gen
,
2270 struct gpu_array_ref_group
*group
)
2272 struct gpu_array_tile
*tile
;
2274 group
->last_shared
= gen
->shared_len
- 1;
2276 tile
= group
->private_tile
;
2278 tile
= group
->shared_tile
;
2282 group
->last_shared
= compute_tile_last_shared(gen
, tile
);
2285 /* Compute a privatized copy of all access relations from reference groups that
2286 * are mapped to private memory and store the result in gen->privatization.
2288 * Read-only scalars and arrays containing structures are not mapped
2289 * to private memory.
2291 static void compute_private_access(struct gpu_gen
*gen
)
2294 isl_union_map
*private;
2296 if (!gen
->options
->use_private_memory
)
2299 private = isl_union_map_empty(isl_union_map_get_space(gen
->shared_sched
));
2301 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2302 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2304 if (gpu_array_is_read_only_scalar(array
))
2306 if (array
->has_compound_element
)
2309 for (j
= 0; j
< array
->n_group
; ++j
) {
2310 if (!array
->groups
[j
]->private_tile
)
2313 private = isl_union_map_union(private,
2314 group_access_relation(array
->groups
[j
], 1, 1));
2318 if (isl_union_map_is_empty(private))
2319 isl_union_map_free(private);
2321 isl_union_map
*priv
;
2323 private = isl_union_map_apply_domain(private,
2324 isl_union_map_copy(gen
->shared_sched
));
2325 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
2326 private = isl_union_map_apply_domain(private, priv
);
2327 gen
->private_access
= private;
2331 /* Compute the size of the tile specified by "tile"
2332 * in number of elements and return the result.
2334 static __isl_give isl_val
*tile_size(isl_ctx
*ctx
, struct gpu_array_tile
*tile
)
2339 size
= isl_val_one(ctx
);
2341 for (i
= 0; i
< tile
->n
; ++i
)
2342 size
= isl_val_mul(size
, isl_val_copy(tile
->bound
[i
].size
));
2347 /* If max_shared_memory is not set to infinity (-1), then make
2348 * sure that the total amount of shared memory required by the
2349 * array reference groups mapped to shared memory is no larger
2350 * than this maximum.
2352 * We apply a greedy approach and discard (keep in global memory)
2353 * those groups that would result in a total memory size that
2354 * is larger than the maximum.
2356 * This function should be called after any function that may
2357 * affect the decision on whether to place a reference group
2358 * in private, shared or global memory.
2360 static void check_shared_memory_bound(struct gpu_gen
*gen
)
2363 isl_val
*left
, *size
;
2365 if (gen
->options
->max_shared_memory
< 0)
2368 left
= isl_val_int_from_si(gen
->ctx
, gen
->options
->max_shared_memory
);
2370 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2371 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2373 for (j
= 0; j
< array
->n_group
; ++j
) {
2374 struct gpu_array_ref_group
*group
;
2376 group
= array
->groups
[j
];
2377 if (group
->private_tile
)
2379 if (!group
->shared_tile
)
2382 size
= tile_size(gen
->ctx
, group
->shared_tile
);
2383 size
= isl_val_mul_ui(size
, array
->size
);
2385 if (isl_val_le(size
, left
)) {
2386 left
= isl_val_sub(left
, size
);
2391 group
->shared_tile
= free_tile(group
->shared_tile
);
2398 /* Given a description of an array tile "tile" and the "space"
2402 * where D represents the first shared_len schedule dimensions
2403 * and A represents the array, construct an isl_multi_aff
2405 * { [D[i] -> A[a]] -> A'[a'] }
2407 * with A' a scaled down copy of A according to the shifts and strides
2408 * in "tile". In particular,
2410 * a' = (a + shift(i))/stride
2412 * "insert_array" represents
2416 * and is used to insert A into the domain of functions that only
2419 static __isl_give isl_multi_aff
*strided_tile(
2420 struct gpu_array_tile
*tile
, __isl_keep isl_space
*space
,
2421 __isl_keep isl_multi_aff
*insert_array
)
2425 isl_multi_aff
*shift
;
2426 isl_multi_val
*stride
;
2428 isl_local_space
*ls
;
2429 isl_multi_aff
*tiling
;
2431 ctx
= isl_space_get_ctx(space
);
2432 space2
= isl_space_domain(isl_space_copy(space
));
2433 ls
= isl_local_space_from_space(space2
);
2434 space2
= isl_space_range(isl_space_copy(space
));
2435 stride
= isl_multi_val_zero(space2
);
2436 shift
= isl_multi_aff_zero(isl_space_copy(space
));
2438 for (i
= 0; i
< tile
->n
; ++i
) {
2439 struct gpu_array_bound
*bound
= &tile
->bound
[i
];
2443 if (tile
->bound
[i
].shift
) {
2444 stride_i
= isl_val_copy(bound
->stride
);
2445 shift_i
= isl_aff_copy(bound
->shift
);
2447 stride_i
= isl_val_one(ctx
);
2448 shift_i
= isl_aff_zero_on_domain(
2449 isl_local_space_copy(ls
));
2452 stride
= isl_multi_val_set_val(stride
, i
, stride_i
);
2453 shift
= isl_multi_aff_set_aff(shift
, i
, shift_i
);
2455 isl_local_space_free(ls
);
2457 shift
= isl_multi_aff_pullback_multi_aff(shift
,
2458 isl_multi_aff_copy(insert_array
));
2460 tiling
= isl_multi_aff_range_map(isl_space_copy(space
));
2461 tiling
= isl_multi_aff_add(tiling
, shift
);
2462 tiling
= isl_multi_aff_scale_down_multi_val(tiling
, stride
);
2467 /* Compute a tiling for the array reference group "group".
2469 * The tiling is of the form
2471 * { [D[i] -> A[a]] -> T[t] }
2473 * where D represents the first shared_len schedule dimensions,
2474 * A represents the global array and T represents the shared or
2475 * private memory tile. The name of T is the name of the local
2478 * If there is any stride in the accesses, then the mapping is
2480 * t = (a + shift(i))/stride - lb(i)
2482 * otherwise, it is simply
2486 static void compute_group_tiling(struct gpu_array_ref_group
*group
)
2489 struct gpu_array_tile
*tile
;
2490 struct gpu_array_info
*array
= group
->array
;
2492 isl_multi_aff
*tiling
, *lb
, *insert_array
;
2496 tile
= group
->private_tile
;
2498 tile
= group
->shared_tile
;
2502 space
= isl_map_get_space(group
->access
);
2503 insert_array
= isl_multi_aff_domain_map(isl_space_copy(space
));
2505 for (i
= 0; i
< tile
->n
; ++i
)
2506 if (tile
->bound
[i
].shift
)
2510 tiling
= strided_tile(tile
, space
, insert_array
);
2512 tiling
= isl_multi_aff_range_map(isl_space_copy(space
));
2514 lb
= isl_multi_aff_zero(space
);
2515 for (i
= 0; i
< tile
->n
; ++i
) {
2516 isl_aff
*lb_i
= isl_aff_copy(tile
->bound
[i
].lb
);
2517 lb
= isl_multi_aff_set_aff(lb
, i
, lb_i
);
2519 lb
= isl_multi_aff_pullback_multi_aff(lb
, insert_array
);
2521 tiling
= isl_multi_aff_sub(tiling
, lb
);
2523 p
= isl_printer_to_str(isl_multi_aff_get_ctx(tiling
));
2524 p
= print_array_name(p
, group
);
2525 local_name
= isl_printer_get_str(p
);
2526 isl_printer_free(p
);
2527 tiling
= isl_multi_aff_set_tuple_name(tiling
, isl_dim_out
, local_name
);
2530 tile
->tiling
= tiling
;
2533 /* Compute a tiling for all the array reference groups.
2535 static void compute_group_tilings(struct gpu_gen
*gen
)
2539 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2540 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2542 for (j
= 0; j
< array
->n_group
; ++j
)
2543 compute_group_tiling(array
->groups
[j
]);
2547 /* Fill up the groups array with singleton groups, i.e., one group
2548 * per reference, initializing the array, access, write, n_ref and refs fields.
2549 * In particular the access field is initialized to the scheduled
2550 * access relation of the array reference.
2552 * Return the number of elements initialized, i.e., the number of
2553 * active references in the current kernel.
2555 static int populate_array_references(struct gpu_array_info
*array
,
2556 __isl_keep isl_union_map
*sched
, struct gpu_array_ref_group
**groups
)
2560 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2563 for (i
= 0; i
< array
->n_ref
; ++i
) {
2564 isl_union_map
*umap
;
2566 struct gpu_array_ref_group
*group
;
2567 struct gpu_stmt_access
*access
= array
->refs
[i
];
2569 map
= isl_map_copy(access
->access
);
2570 umap
= isl_union_map_from_map(map
);
2571 umap
= isl_union_map_apply_domain(umap
,
2572 isl_union_map_copy(sched
));
2574 if (isl_union_map_is_empty(umap
)) {
2575 isl_union_map_free(umap
);
2579 map
= isl_map_from_union_map(umap
);
2580 map
= isl_map_detect_equalities(map
);
2582 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2584 group
->array
= array
;
2585 group
->access
= map
;
2586 group
->write
= access
->write
;
2587 group
->exact_write
= access
->exact_write
;
2588 group
->refs
= &array
->refs
[i
];
2591 groups
[n
++] = group
;
2597 /* If group->n_ref == 1, then group->refs was set by
2598 * populate_array_references to point directly into
2599 * group->array->refs and should not be freed.
2600 * If group->n_ref > 1, then group->refs was set by join_groups
2601 * to point to a newly allocated array.
2603 static void free_array_ref_group(struct gpu_array_ref_group
*group
)
2607 free_tile(group
->shared_tile
);
2608 free_tile(group
->private_tile
);
2609 isl_map_free(group
->access
);
2610 if (group
->n_ref
> 1)
2615 /* Given a map where the input dimensions represent the tile loops,
2616 * eliminate the innermost of those that have a fixed value
2617 * until we reach one that does not (obviously) have a fixed value.
2619 static __isl_give isl_map
*eliminate_fixed_inner_loops(
2620 __isl_take isl_map
*access
)
2624 n
= isl_map_dim(access
, isl_dim_in
);
2626 for (i
= n
- 1; i
>= 0; --i
) {
2627 if (!map_plain_is_fixed(access
, isl_dim_in
, i
))
2629 access
= isl_map_eliminate(access
, isl_dim_in
, i
, 1);
2634 /* Check if the access relations of group1 and group2 overlap within
2635 * the innermost loop. In particular, ignore any inner dimension
2636 * with a fixed value.
2637 * The copying to and from shared memory will be performed within
2638 * the innermost actual loop so we are only allowed to consider
2639 * the dimensions up to that innermost loop while checking whether
2640 * two access relations overlap.
2642 static int accesses_overlap(struct gpu_array_ref_group
*group1
,
2643 struct gpu_array_ref_group
*group2
)
2646 isl_map
*access1
, *access2
;
2648 access1
= isl_map_copy(group1
->access
);
2649 access1
= eliminate_fixed_inner_loops(access1
);
2650 access2
= isl_map_copy(group2
->access
);
2651 access2
= eliminate_fixed_inner_loops(access2
);
2652 access1
= isl_map_intersect(access1
, access2
);
2653 empty
= isl_map_is_empty(access1
);
2654 isl_map_free(access1
);
2659 /* Combine the given two groups into a single group, containing
2660 * the references of both groups.
2662 static struct gpu_array_ref_group
*join_groups(
2663 struct gpu_array_ref_group
*group1
,
2664 struct gpu_array_ref_group
*group2
)
2668 struct gpu_array_ref_group
*group
;
2670 ctx
= isl_map_get_ctx(group1
->access
);
2671 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2673 group
->array
= group1
->array
;
2674 group
->access
= isl_map_union(isl_map_copy(group1
->access
),
2675 isl_map_copy(group2
->access
));
2676 group
->write
= group1
->write
|| group2
->write
;
2677 group
->exact_write
= group1
->exact_write
&& group2
->exact_write
;
2678 group
->n_ref
= group1
->n_ref
+ group2
->n_ref
;
2679 group
->refs
= isl_alloc_array(ctx
, struct gpu_stmt_access
*,
2681 assert(group
->refs
);
2682 for (i
= 0; i
< group1
->n_ref
; ++i
)
2683 group
->refs
[i
] = group1
->refs
[i
];
2684 for (i
= 0; i
< group2
->n_ref
; ++i
)
2685 group
->refs
[group1
->n_ref
+ i
] = group2
->refs
[i
];
2690 /* Combine the given two groups into a single group and free
2691 * the original two groups.
2693 static struct gpu_array_ref_group
*join_groups_and_free(
2694 struct gpu_array_ref_group
*group1
,
2695 struct gpu_array_ref_group
*group2
)
2697 struct gpu_array_ref_group
*group
;
2699 group
= join_groups(group1
, group2
);
2700 free_array_ref_group(group1
);
2701 free_array_ref_group(group2
);
2705 /* Compute the private and/or shared memory tiles for the array
2706 * reference group "group" of array "array".
2707 * Return 0 on success and -1 on error.
2709 * If the array is a read-only scalar or if the user requested
2710 * not to use shared or private memory, then we do not need to do anything.
2712 * If the array group involves any may writes (that are not must writes),
2713 * then we would have to make sure that we load the data into shared/private
2714 * memory first in case the data is not written by the kernel
2715 * (but still written back out to global memory).
2716 * Since we don't have any such mechanism at the moment, we don't
2717 * compute shared/private tiles for groups involving may writes.
2719 * We only try to compute a shared memory tile if there is any reuse
2720 * or if the access is not coalesced.
2722 * For computing a private memory tile, we also require that there is
2723 * some reuse. Moreover, we require that the access is private
2724 * to the thread. That is, we check that any given array element
2725 * is only accessed by a single thread.
2726 * We compute an access relation that maps the shared tile loop iterators
2727 * and the shared point loop iterators that will be wrapped over the
2728 * threads to the array elements.
2729 * We actually check that those iterators that will be wrapped
2730 * partition the array space. This check is stricter than necessary
2731 * since several iterations may be mapped onto the same thread
2732 * and then they could be allowed to access the same memory elements,
2733 * but our check does not allow this situation.
2735 * We also check that the index expression only depends on parallel
2736 * loops. That way, we can move those loops innermost and unroll them.
2737 * Again, we use a test that is stricter than necessary.
2738 * We actually check whether the index expression only depends
2739 * on the iterators that are wrapped over the threads.
2740 * These are necessarily parallel, but there may be more parallel loops.
2742 * Combining the injectivity of the first test with the single-valuedness
2743 * of the second test, we simply test for bijectivity.
2745 * If the array is marked force_private, then we bypass all checks
2746 * and assume we can (and should) use registers.
2748 * If it turns out we can (or have to) use registers, we compute
2749 * the private memory tile size using can_tile, after introducing a dependence
2750 * on the thread indices.
2752 static int compute_group_bounds_core(struct gpu_gen
*gen
,
2753 struct gpu_array_ref_group
*group
)
2755 isl_ctx
*ctx
= isl_space_get_ctx(group
->array
->space
);
2756 isl_union_map
*access
;
2757 int n_index
= group
->array
->n_index
;
2760 int force_private
= group
->array
->force_private
;
2761 int use_shared
= gen
->options
->use_shared_memory
;
2762 int use_private
= force_private
|| gen
->options
->use_private_memory
;
2764 if (!use_shared
&& !use_private
)
2766 if (gpu_array_is_read_only_scalar(group
->array
))
2768 if (!force_private
&& !group
->exact_write
)
2771 access
= group_access_relation(group
, 1, 1);
2772 no_reuse
= isl_union_map_is_injective(access
);
2774 if (use_shared
&& (!no_reuse
|| !access_is_coalesced(gen
, access
))) {
2775 group
->shared_tile
= create_tile(ctx
, group
->array
->n_index
);
2776 if (!can_tile(group
->access
, group
->shared_tile
))
2777 group
->shared_tile
= free_tile(group
->shared_tile
);
2780 if (!force_private
&& (!use_private
|| no_reuse
)) {
2781 isl_union_map_free(access
);
2785 access
= isl_union_map_apply_domain(access
,
2786 isl_union_map_copy(gen
->shared_sched
));
2788 acc
= isl_map_from_union_map(access
);
2790 if (!force_private
&& !access_is_bijective(gen
, acc
)) {
2795 group
->private_tile
= create_tile(gen
->ctx
, n_index
);
2796 acc
= isl_map_apply_domain(acc
, isl_map_copy(gen
->privatization
));
2797 if (!can_tile(acc
, group
->private_tile
))
2798 group
->private_tile
= free_tile(group
->private_tile
);
2802 if (force_private
&& !group
->private_tile
)
2803 isl_die(ctx
, isl_error_internal
,
2804 "unable to map array reference group to registers",
2810 /* Compute the private and/or shared memory tiles for the array
2811 * reference group "group" of array "array" and set last_shared.
2812 * Return 0 on success and -1 on error.
2814 static int compute_group_bounds(struct gpu_gen
*gen
,
2815 struct gpu_array_ref_group
*group
)
2817 if (compute_group_bounds_core(gen
, group
) < 0)
2819 set_last_shared(gen
, group
);
2824 /* If two groups have overlapping access relations (as determined by
2825 * the "overlap" function) and if one of them involves a write,
2826 * then merge the two groups into one.
2827 * If "compute_bounds" is set, then call compute_group_bounds
2828 * on the merged groups.
2830 * Return the updated number of groups.
2831 * Return -1 on error.
2833 static int group_writes(struct gpu_gen
*gen
,
2834 int n
, struct gpu_array_ref_group
**groups
,
2835 int (*overlap
)(struct gpu_array_ref_group
*group1
,
2836 struct gpu_array_ref_group
*group2
), int compute_bounds
)
2840 for (i
= 0; i
< n
; ++i
) {
2841 for (j
= n
- 1; j
> i
; --j
) {
2842 if (!groups
[i
]->write
&& !groups
[j
]->write
)
2845 if (!overlap(groups
[i
], groups
[j
]))
2848 groups
[i
] = join_groups_and_free(groups
[i
], groups
[j
]);
2849 if (compute_bounds
&&
2850 compute_group_bounds(gen
, groups
[i
]) < 0)
2853 groups
[j
] = groups
[n
- 1];
2854 groups
[n
- 1] = NULL
;
2862 /* If two groups have overlapping access relations (within the innermost
2863 * loop) and if one of them involves a write, then merge the two groups
2866 * Return the updated number of groups.
2868 static int group_overlapping_writes(struct gpu_gen
*gen
,
2869 int n
, struct gpu_array_ref_group
**groups
)
2871 return group_writes(gen
, n
, groups
, &accesses_overlap
, 0);
2874 /* Check if the access relations of group1 and group2 overlap within
2875 * the outermost min(group1->last_shared, group2->last_shared) loops.
2877 static int last_shared_accesses_overlap(struct gpu_array_ref_group
*group1
,
2878 struct gpu_array_ref_group
*group2
)
2883 isl_map
*map_i
, *map_j
, *map
;
2885 last_shared
= group1
->last_shared
;
2886 if (group2
->last_shared
< last_shared
)
2887 last_shared
= group2
->last_shared
;
2888 map_i
= isl_map_copy(group1
->access
);
2889 dim
= isl_map_dim(map_i
, isl_dim_in
);
2890 map_i
= isl_map_eliminate(map_i
, isl_dim_in
,
2891 last_shared
+ 1, dim
- (last_shared
+ 1));
2892 map_j
= isl_map_copy(group2
->access
);
2893 map_j
= isl_map_eliminate(map_j
, isl_dim_in
,
2894 last_shared
+ 1, dim
- (last_shared
+ 1));
2895 map
= isl_map_intersect(map_i
, map_j
);
2896 empty
= isl_map_is_empty(map
);
2902 /* If two groups have overlapping access relations (within the outer
2903 * last_shared loops) and if one of them involves a write,
2904 * then merge the two groups into one.
2906 * Return the updated number of groups.
2908 static int group_last_shared_overlapping_writes(struct gpu_gen
*gen
, int n
,
2909 struct gpu_array_ref_group
**groups
)
2911 return group_writes(gen
, n
, groups
, &last_shared_accesses_overlap
, 1);
2914 /* Is the size of the tile specified by "tile" smaller than the sum of
2915 * the sizes of the tiles specified by "tile1" and "tile2"?
2917 static int smaller_tile(isl_ctx
*ctx
, struct gpu_array_tile
*tile
,
2918 struct gpu_array_tile
*tile1
, struct gpu_array_tile
*tile2
)
2921 isl_val
*size
, *size1
, *size2
;
2923 size
= tile_size(ctx
, tile
);
2924 size1
= tile_size(ctx
, tile1
);
2925 size2
= tile_size(ctx
, tile2
);
2927 size
= isl_val_sub(size
, size1
);
2928 size
= isl_val_sub(size
, size2
);
2929 smaller
= isl_val_is_neg(size
);
2936 /* Given an initial grouping of array references and shared memory tiles
2937 * for each group that allows for a shared memory tile, merge two groups
2938 * if both have a shared memory tile, the merged group also has
2939 * a shared memory tile and the size of the tile for the merge group
2940 * is smaller than the sum of the tile sizes of the individual groups.
2942 * If merging two groups decreases the "last_shared" dimension of
2943 * one or both of the two groups, then we need to check for overlapping
2946 * Return the number of groups after merging.
2947 * Return -1 on error.
2949 static int group_common_shared_memory_tile(struct gpu_gen
*gen
,
2950 struct gpu_array_info
*array
, int n
,
2951 struct gpu_array_ref_group
**groups
)
2954 int recompute_overlap
= 0;
2955 isl_ctx
*ctx
= isl_space_get_ctx(array
->space
);
2957 for (i
= 0; i
< n
; ++i
) {
2958 if (!groups
[i
]->shared_tile
)
2960 for (j
= n
- 1; j
> i
; --j
) {
2963 struct gpu_array_ref_group
*group
;
2965 if (!groups
[j
]->shared_tile
)
2968 map
= isl_map_intersect(isl_map_copy(groups
[i
]->access
),
2969 isl_map_copy(groups
[j
]->access
));
2970 empty
= isl_map_is_empty(map
);
2976 group
= join_groups(groups
[i
], groups
[j
]);
2977 if (compute_group_bounds(gen
, group
) < 0) {
2978 free_array_ref_group(group
);
2981 if (!group
->shared_tile
||
2982 !smaller_tile(ctx
, group
->shared_tile
,
2983 groups
[i
]->shared_tile
,
2984 groups
[j
]->shared_tile
)) {
2985 free_array_ref_group(group
);
2989 if (group
->last_shared
< groups
[i
]->last_shared
||
2990 group
->last_shared
< groups
[j
]->last_shared
)
2991 recompute_overlap
= 1;
2992 free_array_ref_group(groups
[i
]);
2993 free_array_ref_group(groups
[j
]);
2996 groups
[j
] = groups
[n
- 1];
3001 if (recompute_overlap
)
3002 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
3006 /* Set array->n_group and array->groups to n and groups.
3008 * Additionally, set the "nr" field of each group
3009 * and the "group" field of each reference in each group.
3011 static void set_array_groups(struct gpu_array_info
*array
,
3012 int n
, struct gpu_array_ref_group
**groups
)
3017 array
->groups
= groups
;
3019 for (i
= 0; i
< n
; ++i
) {
3022 for (j
= 0; j
< groups
[i
]->n_ref
; ++j
)
3023 groups
[i
]->refs
[j
]->group
= i
;
3027 /* Group array references that should be considered together when
3028 * deciding whether to access them from private, shared or global memory.
3029 * Return -1 on error.
3031 * In particular, if two array references overlap and if one of them
3032 * is a write, then the two references are grouped together.
3033 * We first perform an initial grouping based only on the access relation.
3034 * After computing shared and private memory tiles, we check for
3035 * overlapping writes again, but this time taking into account
3036 * the "last_shared" property.
3038 * Furthermore, if two groups admit a shared memory tile and if the
3039 * combination of the two also admits a shared memory tile, we merge
3042 * If the array contains structures, then there is no need to compute
3043 * reference groups since we do not map such arrays to private or shared
3046 static int group_array_references(struct gpu_gen
*gen
,
3047 struct gpu_array_info
*array
, __isl_keep isl_union_map
*sched
)
3051 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
3052 struct gpu_array_ref_group
**groups
;
3054 if (array
->has_compound_element
)
3057 groups
= isl_calloc_array(ctx
, struct gpu_array_ref_group
*,
3062 n
= populate_array_references(array
, sched
, groups
);
3064 n
= group_overlapping_writes(gen
, n
, groups
);
3066 for (i
= 0; i
< n
; ++i
)
3067 if (compute_group_bounds(gen
, groups
[i
]) < 0)
3070 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
3072 n
= group_common_shared_memory_tile(gen
, array
, n
, groups
);
3074 set_array_groups(array
, n
, groups
);
3079 for (i
= 0; i
< array
->n_ref
; ++i
)
3080 free_array_ref_group(groups
[i
]);
3084 /* Take tiled_sched, project it onto the shared tile loops and
3085 * the loops that will be wrapped over the threads and
3086 * store the result in gen->shared_sched.
3087 * Also compute a projection that projects out the loops that will be
3088 * wrapped over the threads and store this projection in gen->shared_proj.
3090 static void compute_shared_sched(struct gpu_gen
*gen
)
3095 isl_union_map
*sched
;
3097 sched
= isl_union_map_copy(gen
->tiled_sched
);
3099 dim
= isl_union_map_get_space(sched
);
3100 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
3101 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3103 dim
= isl_union_map_get_space(sched
);
3104 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
3106 gen
->shared_sched
= sched
;
3107 gen
->shared_proj
= isl_union_map_from_map(proj
);
3110 /* For each scalar in the input program, check if there are any
3111 * order dependences active inside the current kernel, within
3112 * the same iteration of the host schedule.
3113 * If so, mark the scalar as force_private so that it will be
3114 * mapped to a register.
3116 static void check_scalar_live_ranges(struct gpu_gen
*gen
)
3120 isl_union_map
*sched
;
3121 isl_union_set
*domain
;
3122 isl_union_map
*same_host_iteration
;
3124 gen
->any_force_private
= 0;
3126 if (!gen
->options
->live_range_reordering
)
3129 sched
= gen
->shared_sched
;
3130 sched
= isl_union_map_universe(isl_union_map_copy(sched
));
3131 domain
= isl_union_map_domain(sched
);
3133 sched
= isl_union_map_copy(gen
->sched
);
3134 proj
= projection(isl_union_map_get_space(sched
),
3135 gen
->untiled_len
, gen
->tile_first
);
3136 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3137 same_host_iteration
= isl_union_map_apply_range(sched
,
3138 isl_union_map_reverse(isl_union_map_copy(sched
)));
3140 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3141 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3142 isl_union_map
*order
;
3144 array
->force_private
= 0;
3145 if (array
->n_index
!= 0)
3147 order
= isl_union_map_copy(array
->dep_order
);
3148 order
= isl_union_map_intersect_domain(order
,
3149 isl_union_set_copy(domain
));
3150 order
= isl_union_map_intersect_range(order
,
3151 isl_union_set_copy(domain
));
3152 order
= isl_union_map_intersect(order
,
3153 isl_union_map_copy(same_host_iteration
));
3154 if (!isl_union_map_is_empty(order
)) {
3155 array
->force_private
= 1;
3156 gen
->any_force_private
= 1;
3158 isl_union_map_free(order
);
3161 isl_union_map_free(same_host_iteration
);
3162 isl_union_set_free(domain
);
3165 /* Group references of all arrays in the program.
3167 static int group_references(struct gpu_gen
*gen
)
3171 isl_union_map
*sched
;
3173 sched
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
3174 isl_union_map_copy(gen
->shared_proj
));
3176 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3177 r
= group_array_references(gen
, &gen
->prog
->array
[i
], sched
);
3182 isl_union_map_free(sched
);
3187 /* Free all array information that is local to the current kernel.
3189 static void free_local_array_info(struct gpu_gen
*gen
)
3193 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3194 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3196 for (j
= 0; j
< array
->n_group
; ++j
)
3197 free_array_ref_group(array
->groups
[j
]);
3198 free(array
->groups
);
3202 /* Compute the size of a bounding box around the origin and "set",
3203 * where "set" is assumed to contain only non-negative elements.
3204 * In particular, compute the maximal value of "set" in each direction
3207 static __isl_give isl_multi_pw_aff
*extract_size(__isl_take isl_set
*set
,
3208 __isl_keep isl_set
*context
)
3211 isl_multi_pw_aff
*mpa
;
3213 n
= isl_set_dim(set
, isl_dim_set
);
3214 mpa
= isl_multi_pw_aff_zero(isl_set_get_space(set
));
3215 for (i
= 0; i
< n
; ++i
) {
3220 bound
= isl_set_dim_max(isl_set_copy(set
), i
);
3221 bound
= isl_pw_aff_coalesce(bound
);
3222 bound
= isl_pw_aff_gist(bound
, isl_set_copy(context
));
3224 space
= isl_pw_aff_get_domain_space(bound
);
3225 one
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
3226 one
= isl_aff_add_constant_si(one
, 1);
3227 bound
= isl_pw_aff_add(bound
, isl_pw_aff_from_aff(one
));
3228 mpa
= isl_multi_pw_aff_set_pw_aff(mpa
, i
, bound
);
3235 /* Compute the effective grid size as a list of the sizes in each dimension.
3237 * The grid size specified by the user or set by default
3238 * in read_grid_sizes() and applied in tile_schedule(),
3239 * may be too large for the given code in the sense that
3240 * it may contain blocks that don't need to execute anything.
3241 * We therefore don't return this grid size, but instead the
3242 * smallest grid size that ensures that all blocks that actually
3243 * execute code are included in the grid.
3245 * We first extract a description of the grid, i.e., the possible values
3246 * of the block ids, from gen->tiled_sched.
3247 * The block ids are parameters in gen->tiled_sched.
3248 * We simply need to change them into set dimensions.
3250 * Then, for each block dimension, we compute the maximal value of the block id
3253 static __isl_give isl_multi_pw_aff
*extract_grid_size(struct gpu_gen
*gen
,
3254 struct ppcg_kernel
*kernel
)
3259 grid
= isl_union_map_params(isl_union_map_copy(gen
->tiled_sched
));
3260 grid
= isl_set_from_params(grid
);
3261 grid
= isl_set_add_dims(grid
, isl_dim_set
, gen
->n_grid
);
3262 for (i
= 0; i
< gen
->n_grid
; ++i
) {
3266 snprintf(name
, sizeof(name
), "b%d", i
);
3267 pos
= isl_set_find_dim_by_name(grid
, isl_dim_param
, name
);
3269 grid
= isl_set_equate(grid
, isl_dim_param
, pos
, isl_dim_set
, i
);
3270 grid
= isl_set_project_out(grid
, isl_dim_param
, pos
, 1);
3273 return extract_size(grid
, kernel
->context
);
3276 /* Compute the size of a fixed bounding box around the origin and "set",
3277 * where "set" is assumed to contain only non-negative elements,
3278 * and store the results in "size".
3279 * In particular, compute the maximal value of "set" in each direction
3282 static void extract_fixed_size(__isl_take isl_set
*set
, int *size
)
3285 isl_local_space
*ls
;
3288 n
= isl_set_dim(set
, isl_dim_set
);
3289 ls
= isl_local_space_from_space(isl_set_get_space(set
));
3290 obj
= isl_aff_zero_on_domain(ls
);
3291 for (i
= 0; i
< n
; ++i
) {
3294 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 1);
3295 max
= isl_set_max_val(set
, obj
);
3296 size
[i
] = isl_val_get_num_si(max
) + 1;
3298 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 0);
3304 /* Compute the effective block size as a list of the sizes in each dimension
3305 * and store the sizes in kernel->block_dim.
3307 * The block size specified by the user or set by default
3308 * in read_block_sizes() and applied in thread_tile_schedule(),
3309 * may be too large for the given code in the sense that
3310 * it may contain threads that don't need to execute anything.
3311 * We therefore don't store this block size in kernel->block_dim,
3312 * but instead the smallest block size that ensures that all threads
3313 * that actually execute code are included in the block.
3315 * The current implementation eliminates all parameters, ensuring
3316 * that the size is a fixed constant in each dimension.
3317 * In principle we could also compute parametric sizes.
3318 * We would have to make sure to project out all b%d and t%d parameters,
3321 static void extract_block_size(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3326 isl_multi_pw_aff
*mpa
;
3328 block
= isl_union_map_params(isl_union_map_copy(gen
->local_sched
));
3329 block
= isl_set_from_params(block
);
3330 block
= isl_set_add_dims(block
, isl_dim_set
, gen
->n_block
);
3331 kernel
->n_block
= gen
->n_block
;
3332 for (i
= 0; i
< gen
->n_block
; ++i
) {
3336 snprintf(name
, sizeof(name
), "t%d", i
);
3337 pos
= isl_set_find_dim_by_name(block
, isl_dim_param
, name
);
3339 block
= isl_set_equate(block
, isl_dim_param
, pos
,
3342 nparam
= isl_set_dim(block
, isl_dim_param
);
3343 block
= isl_set_project_out(block
, isl_dim_param
, 0, nparam
);
3345 extract_fixed_size(block
, kernel
->block_dim
);
3348 void ppcg_kernel_free(void *user
)
3350 struct ppcg_kernel
*kernel
= user
;
3356 isl_multi_pw_aff_free(kernel
->grid_size
);
3357 isl_set_free(kernel
->context
);
3358 isl_union_set_free(kernel
->arrays
);
3359 isl_space_free(kernel
->space
);
3360 isl_ast_node_free(kernel
->tree
);
3362 for (i
= 0; i
< kernel
->n_array
; ++i
)
3363 isl_pw_aff_list_free(kernel
->array
[i
].bound
);
3364 free(kernel
->array
);
3366 for (i
= 0; i
< kernel
->n_var
; ++i
) {
3367 free(kernel
->var
[i
].name
);
3368 isl_vec_free(kernel
->var
[i
].size
);
3375 static void create_kernel_var(isl_ctx
*ctx
, struct gpu_array_ref_group
*group
,
3376 struct ppcg_kernel_var
*var
)
3379 struct gpu_array_tile
*tile
;
3383 var
->array
= group
->array
;
3385 tile
= group
->private_tile
;
3386 var
->type
= ppcg_access_private
;
3388 tile
= group
->shared_tile
;
3389 var
->type
= ppcg_access_shared
;
3392 p
= isl_printer_to_str(ctx
);
3393 p
= print_array_name(p
, group
);
3394 var
->name
= isl_printer_get_str(p
);
3395 isl_printer_free(p
);
3397 var
->size
= isl_vec_alloc(ctx
, group
->array
->n_index
);
3399 for (j
= 0; j
< group
->array
->n_index
; ++j
)
3400 var
->size
= isl_vec_set_element_val(var
->size
, j
,
3401 isl_val_copy(tile
->bound
[j
].size
));
3404 static void create_kernel_vars(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3409 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3410 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3412 for (j
= 0; j
< array
->n_group
; ++j
) {
3413 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3414 if (group
->private_tile
|| group
->shared_tile
)
3420 kernel
->var
= isl_calloc_array(gen
->ctx
, struct ppcg_kernel_var
, n
);
3421 assert(kernel
->var
);
3424 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3425 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3427 for (j
= 0; j
< array
->n_group
; ++j
) {
3428 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3429 if (!group
->private_tile
&& !group
->shared_tile
)
3431 create_kernel_var(gen
->ctx
, group
, &kernel
->var
[n
]);
3437 /* The sizes of the arrays on the host that have been computed by
3438 * extract_array_info may depend on the parameters. Use the extra
3439 * constraints on the parameters that are valid at "host_domain"
3440 * to simplify these expressions and store the results in kernel->array.
3442 * We only need these localized bounds for arrays that are accessed
3443 * by the current kernel. If we have found at least one reference group
3444 * then the array is accessed by the kernel. If the array has compound
3445 * elements then we skipped the construction of array reference groups.
3447 static void localize_bounds(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
,
3448 __isl_keep isl_set
*host_domain
)
3453 kernel
->array
= isl_calloc_array(gen
->ctx
,
3454 struct gpu_local_array_info
, gen
->prog
->n_array
);
3455 assert(kernel
->array
);
3456 kernel
->n_array
= gen
->prog
->n_array
;
3458 context
= isl_set_copy(host_domain
);
3459 context
= isl_set_params(context
);
3461 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3462 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3463 isl_pw_aff_list
*local
;
3465 if (array
->n_group
== 0 && !array
->has_compound_element
)
3468 local
= isl_pw_aff_list_alloc(gen
->ctx
, array
->n_index
);
3470 for (j
= 0; j
< array
->n_index
; ++j
) {
3473 pwaff
= isl_pw_aff_copy(array
->bound
[j
]);
3474 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
3475 local
= isl_pw_aff_list_add(local
, pwaff
);
3478 kernel
->array
[i
].bound
= local
;
3480 isl_set_free(context
);
3483 /* Find the element in gen->stmt that has the given "id".
3484 * Return NULL if no such gpu_stmt can be found.
3486 static struct gpu_stmt
*find_stmt(struct gpu_prog
*prog
, __isl_keep isl_id
*id
)
3490 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
3491 if (id
== prog
->stmts
[i
].id
)
3495 return i
< prog
->n_stmts
? &prog
->stmts
[i
] : NULL
;
3498 /* Set gen->tile_len and gen->n_parallel to those of the statement
3499 * affected by the first map (part of the schedule)
3500 * on which this function is called.
3501 * Because of the way the schedule is constructed, the other statements
3502 * in the list, if any, should have the same values for these properties.
3504 static int extract_tile_len(__isl_take isl_map
*map
, void *user
)
3506 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3508 struct gpu_stmt
*stmt
;
3510 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
3511 stmt
= find_stmt(gen
->prog
, id
);
3517 isl_die(gen
->ctx
, isl_error_unknown
,
3518 "statement not found", return -1);
3520 gen
->tile_len
= stmt
->tile_len
;
3521 gen
->n_parallel
= stmt
->n_parallel
;
3526 void ppcg_kernel_stmt_free(void *user
)
3529 struct ppcg_kernel_stmt
*stmt
= user
;
3534 switch (stmt
->type
) {
3535 case ppcg_kernel_copy
:
3536 isl_ast_expr_free(stmt
->u
.c
.index
);
3537 isl_ast_expr_free(stmt
->u
.c
.local_index
);
3539 case ppcg_kernel_domain
:
3540 isl_id_to_ast_expr_free(stmt
->u
.d
.ref2expr
);
3542 case ppcg_kernel_sync
:
3549 /* Set the options of "context" to
3551 * { space -> [x] : x >= first }
3553 static __isl_give isl_ast_build
*set_unroll(
3554 __isl_take isl_ast_build
*build
, __isl_take isl_space
*space
,
3561 ctx
= isl_ast_build_get_ctx(build
);
3563 space
= isl_space_from_domain(space
);
3564 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
3565 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "unroll");
3566 unroll
= isl_map_universe(space
);
3567 unroll
= isl_map_lower_bound_si(unroll
, isl_dim_out
, 0, first
);
3568 opt
= isl_union_map_from_map(unroll
);
3570 build
= isl_ast_build_set_options(build
, opt
);
3575 /* Return a list of isl_ids of the form "prefix%d".
3577 static __isl_give isl_id_list
*generate_names(isl_ctx
*ctx
,
3578 int n
, const char *prefix
)
3584 names
= isl_id_list_alloc(ctx
, n
);
3585 for (i
= 0; i
< n
; ++i
) {
3588 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
3589 id
= isl_id_alloc(ctx
, name
, NULL
);
3590 names
= isl_id_list_add(names
, id
);
3596 /* Extend the schedule "schedule" with the part of "extension"
3597 * starting at "first" up to "len".
3599 static __isl_give isl_union_map
*extend_schedule(
3600 __isl_take isl_union_map
*schedule
,
3601 __isl_take isl_union_map
*extension
, int first
, int len
)
3605 isl_union_map
*umap
;
3608 space
= isl_union_map_get_space(schedule
);
3609 space
= isl_space_set_from_params(space
);
3610 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
3611 proj
= isl_set_identity(isl_set_universe(space
));
3612 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, first
);
3613 extension
= isl_union_map_apply_range(extension
,
3614 isl_union_map_from_map(proj
));
3616 schedule
= isl_union_map_range_product(schedule
, extension
);
3621 /* Return the gpu_stmt_access in the list "accesses" that corresponds
3624 static struct gpu_stmt_access
*find_access(struct gpu_stmt_access
*accesses
,
3625 __isl_keep isl_id
*ref_id
)
3627 struct gpu_stmt_access
*access
;
3629 for (access
= accesses
; access
; access
= access
->next
)
3630 if (access
->ref_id
== ref_id
)
3636 /* Return the index of the array called "name" in the list of arrays.
3638 static int find_array_index(struct gpu_gen
*gen
, const char *name
)
3642 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
3643 if (!strcmp(name
, gen
->prog
->array
[i
].name
))
3649 /* Internal data structure for the index and AST expression transformation
3650 * callbacks for pet_stmt_build_ast_exprs.
3652 * "accesses" is the list of gpu_stmt_access in the statement.
3653 * "iterator_map" expresses the statement iterators in terms of
3654 * the AST loop iterators.
3655 * "sched2shared" expresses the first shared_len dimensions of
3656 * the computed schedule in terms of the AST loop iterators.
3658 * The following fields are set in transform_index and used in transform_expr.
3659 * "array" is the array that is being accessed.
3660 * "global" is set if the global array is accessed (rather than
3661 * shared/private memory).
3662 * "local_array" refers to information on the array specialized
3663 * to the current kernel.
3665 struct ppcg_transform_data
{
3666 struct gpu_gen
*gen
;
3667 struct gpu_stmt_access
*accesses
;
3668 isl_pw_multi_aff
*iterator_map
;
3669 isl_pw_multi_aff
*sched2shared
;
3671 struct gpu_array_info
*array
;
3673 struct gpu_local_array_info
*local_array
;
3676 /* Return the name of the outer array (of structs) accessed by "access".
3678 static const char *get_outer_array_name(__isl_keep isl_map
*access
)
3683 space
= isl_space_range(isl_map_get_space(access
));
3684 while (space
&& isl_space_is_wrapping(space
))
3685 space
= isl_space_domain(isl_space_unwrap(space
));
3686 name
= isl_space_get_tuple_name(space
, isl_dim_set
);
3687 isl_space_free(space
);
3692 /* Index transformation callback for pet_stmt_build_ast_exprs.
3694 * "index" expresses the array indices in terms of statement iterators
3696 * We first reformulate "index" in terms of the AST loop iterators.
3697 * Then we check if we are accessing the global array or
3698 * a shared/private copy. In the former case, we simply return
3699 * the updated index. If "index" is an affine expression rather
3700 * than an array access, then we also return the updated index here.
3702 * If no reference groups have been computed for the array,
3703 * then we can only be accessing the global array.
3705 * Otherwise, we apply the tiling to the index.
3706 * This tiling is of the form
3710 * The index is of the form
3714 * We update the tiling to refer to the AST loop iteratos
3718 * and modify index to keep track of those iterators
3722 * Combining these two yields a tiled index expression in terms
3723 * of the AST loop iterators
3727 static __isl_give isl_multi_pw_aff
*transform_index(
3728 __isl_take isl_multi_pw_aff
*index
, __isl_keep isl_id
*ref_id
,
3731 struct ppcg_transform_data
*data
= user
;
3732 struct gpu_stmt_access
*access
;
3733 struct gpu_array_ref_group
*group
;
3734 struct gpu_array_tile
*tile
;
3735 isl_pw_multi_aff
*iterator_map
;
3739 isl_multi_pw_aff
*tiling
;
3740 isl_pw_multi_aff
*pma
;
3741 isl_multi_pw_aff
*mpa
;
3745 iterator_map
= isl_pw_multi_aff_copy(data
->iterator_map
);
3746 index
= isl_multi_pw_aff_pullback_pw_multi_aff(index
, iterator_map
);
3748 access
= find_access(data
->accesses
, ref_id
);
3751 if (!isl_map_has_tuple_name(access
->access
, isl_dim_out
))
3754 name
= get_outer_array_name(access
->access
);
3755 i
= find_array_index(data
->gen
, name
);
3757 isl_die(isl_multi_pw_aff_get_ctx(index
), isl_error_internal
,
3758 "cannot find array",
3759 return isl_multi_pw_aff_free(index
));
3760 data
->array
= &data
->gen
->prog
->array
[i
];
3761 data
->local_array
= &data
->gen
->kernel
->array
[i
];
3763 if (access
->group
< 0) {
3768 group
= data
->array
->groups
[access
->group
];
3769 tile
= group
->private_tile
;
3771 tile
= group
->shared_tile
;
3772 data
->global
= !tile
;
3776 space
= isl_space_range(isl_multi_pw_aff_get_space(index
));
3777 space
= isl_space_map_from_set(space
);
3778 pma
= isl_pw_multi_aff_identity(space
);
3779 pma
= isl_pw_multi_aff_product(
3780 isl_pw_multi_aff_copy(data
->sched2shared
), pma
);
3781 tiling
= isl_multi_pw_aff_from_multi_aff(
3782 isl_multi_aff_copy(tile
->tiling
));
3783 tiling
= isl_multi_pw_aff_pullback_pw_multi_aff(tiling
, pma
);
3785 space
= isl_space_domain(isl_multi_pw_aff_get_space(index
));
3786 space
= isl_space_map_from_set(space
);
3787 mpa
= isl_multi_pw_aff_identity(space
);
3788 index
= isl_multi_pw_aff_range_product(mpa
, index
);
3789 index
= isl_multi_pw_aff_pullback_multi_pw_aff(tiling
, index
);
3794 /* Dereference "expr" by adding an index [0].
3795 * The original "expr" is assumed not to have any indices.
3797 * If "expr" is a member access, then the dereferencing needs
3798 * to be applied to the structure argument of this member access.
3800 static __isl_give isl_ast_expr
*dereference(__isl_take isl_ast_expr
*expr
)
3804 isl_ast_expr_list
*list
;
3806 if (isl_ast_expr_get_op_type(expr
) == isl_ast_op_member
) {
3809 arg
= isl_ast_expr_get_op_arg(expr
, 0);
3810 arg
= dereference(arg
);
3811 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg
);
3816 ctx
= isl_ast_expr_get_ctx(expr
);
3817 res
= isl_ast_expr_from_val(isl_val_zero(ctx
));
3818 list
= isl_ast_expr_list_from_ast_expr(res
);
3819 res
= isl_ast_expr_get_op_arg(expr
, 0);
3820 res
= isl_ast_expr_access(res
, list
);
3821 isl_ast_expr_free(expr
);
3826 /* Linearize the index expression "expr" based on the array bounds
3829 * That is, transform expression
3831 * A[i_0][i_1]...[i_n]
3835 * A[(..((i_0 * b_1 + i_1) ... ) * b_n + i_n]
3837 * where b_0, b_1, ..., b_n are the bounds on the array.
3839 * If the base of "expr" is a member access, then the linearization needs
3840 * to be applied to the structure argument of this member access.
3842 __isl_give isl_ast_expr
*gpu_local_array_info_linearize_index(
3843 struct gpu_local_array_info
*array
, __isl_take isl_ast_expr
*expr
)
3850 isl_ast_expr_list
*list
;
3851 isl_ast_build
*build
;
3853 arg0
= isl_ast_expr_get_op_arg(expr
, 0);
3854 if (isl_ast_expr_get_type(arg0
) == isl_ast_expr_op
&&
3855 isl_ast_expr_get_op_type(arg0
) == isl_ast_op_member
) {
3858 arg
= isl_ast_expr_get_op_arg(arg0
, 0);
3859 arg
= gpu_local_array_info_linearize_index(array
, arg
);
3860 arg0
= isl_ast_expr_set_op_arg(arg0
, 0, arg
);
3861 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg0
);
3865 isl_ast_expr_free(arg0
);
3867 ctx
= isl_ast_expr_get_ctx(expr
);
3868 context
= isl_set_universe(isl_space_params_alloc(ctx
, 0));
3869 build
= isl_ast_build_from_context(context
);
3871 n
= isl_ast_expr_get_op_n_arg(expr
);
3872 res
= isl_ast_expr_get_op_arg(expr
, 1);
3873 for (i
= 2; i
< n
; ++i
) {
3874 isl_pw_aff
*bound_i
;
3875 isl_ast_expr
*expr_i
;
3877 bound_i
= isl_pw_aff_list_get_pw_aff(array
->bound
, i
- 1);
3878 expr_i
= isl_ast_build_expr_from_pw_aff(build
, bound_i
);
3879 res
= isl_ast_expr_mul(res
, expr_i
);
3880 expr_i
= isl_ast_expr_get_op_arg(expr
, i
);
3881 res
= isl_ast_expr_add(res
, expr_i
);
3884 isl_ast_build_free(build
);
3886 list
= isl_ast_expr_list_from_ast_expr(res
);
3887 res
= isl_ast_expr_get_op_arg(expr
, 0);
3888 res
= isl_ast_expr_access(res
, list
);
3890 isl_ast_expr_free(expr
);
3895 /* AST expression transformation callback for pet_stmt_build_ast_exprs.
3897 * If the AST expression refers to a global scalar that is not
3898 * a read-only scalar, then its address was passed to the kernel and
3899 * we need to dereference it.
3901 * If the AST expression refers to an access to a global array,
3902 * then we linearize the access exploiting the bounds in data->local_array.
3904 static __isl_give isl_ast_expr
*transform_expr(__isl_take isl_ast_expr
*expr
,
3905 __isl_keep isl_id
*id
, void *user
)
3907 struct ppcg_transform_data
*data
= user
;
3911 if (gpu_array_is_read_only_scalar(data
->array
))
3915 if (data
->array
->n_index
== 0)
3916 return dereference(expr
);
3917 if (!data
->array
->linearize
)
3920 return gpu_local_array_info_linearize_index(data
->local_array
, expr
);
3923 /* This function is called for each instance of a user statement
3926 * We attach a struct ppcg_kernel_stmt to the "node", containing
3927 * a computed AST expression for each access.
3928 * These AST expressions are computed from iterator_map,
3929 * which expresses the domain
3930 * elements in terms of the generated loops, and sched2shared,
3931 * which expresses the first shared_len dimensions of the schedule
3932 * computed by PPCG in terms of the generated loops.
3934 static __isl_give isl_ast_node
*at_each_domain(__isl_take isl_ast_node
*node
,
3935 __isl_keep isl_ast_build
*build
, void *user
)
3937 struct ppcg_transform_data data
;
3938 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3939 struct ppcg_kernel_stmt
*stmt
;
3941 isl_pw_multi_aff
*sched2shared
;
3943 isl_pw_multi_aff
*iterator_map
;
3944 isl_ast_expr
*expr
, *arg
;
3945 isl_union_map
*schedule
;
3947 struct gpu_stmt_access
*access
;
3949 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3951 return isl_ast_node_free(node
);
3953 expr
= isl_ast_node_user_get_expr(node
);
3954 arg
= isl_ast_expr_get_op_arg(expr
, 0);
3955 id
= isl_ast_expr_get_id(arg
);
3957 schedule
= isl_ast_build_get_schedule(build
);
3958 map
= isl_map_reverse(isl_map_from_union_map(schedule
));
3959 iterator_map
= isl_pw_multi_aff_from_map(map
);
3960 sched2shared
= compute_sched_to_shared(gen
,
3961 isl_pw_multi_aff_copy(iterator_map
));
3963 stmt
->type
= ppcg_kernel_domain
;
3964 stmt
->u
.d
.stmt
= find_stmt(gen
->prog
, id
);
3965 if (!stmt
->u
.d
.stmt
)
3969 data
.accesses
= stmt
->u
.d
.stmt
->accesses
;
3970 data
.iterator_map
= iterator_map
;
3971 data
.sched2shared
= sched2shared
;
3972 stmt
->u
.d
.ref2expr
= pet_stmt_build_ast_exprs(stmt
->u
.d
.stmt
->stmt
,
3973 build
, &transform_index
, &data
,
3974 &transform_expr
, &data
);
3977 isl_pw_multi_aff_free(iterator_map
);
3978 isl_pw_multi_aff_free(sched2shared
);
3979 isl_ast_expr_free(arg
);
3980 isl_ast_expr_free(expr
);
3982 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3983 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3984 return isl_ast_node_set_annotation(node
, id
);
3987 isl_pw_multi_aff_free(iterator_map
);
3988 ppcg_kernel_stmt_free(stmt
);
3989 isl_pw_multi_aff_free(sched2shared
);
3990 return isl_ast_node_free(node
);
3993 /* This function is called when code has been generated for the shared
3994 * tile loops. The "schedule" refers only to the original statements.
3996 * We extend the schedule with that part of gen->local_sched that hasn't
3997 * been taken into account yet. This introduces parameters referring
3998 * to thread ids in the schedule, so we add them (with the appropriate
3999 * bounds to the context as well).
4000 * Finally, we set the appropriate unrolling options
4001 * if gen->first_unroll is set.
4003 static __isl_give isl_ast_node
*create_domain_leaf(
4004 __isl_take isl_union_map
*schedule
, __isl_take isl_ast_build
*build
,
4007 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4009 isl_union_map
*sched
;
4012 isl_id_list
*iterators
;
4015 schedule
= extend_schedule(schedule
,
4016 isl_union_map_copy(gen
->local_sched
),
4017 gen
->shared_len
, gen
->thread_tiled_len
);
4019 space
= isl_ast_build_get_schedule_space(build
);
4020 set
= isl_set_universe(space
);
4021 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
4022 gen
->kernel
->block_dim
, "t");
4023 build
= isl_ast_build_restrict(build
, set
);
4025 n
= gen
->thread_tiled_len
- gen
->shared_len
;
4027 if (gen
->first_unroll
>= 0) {
4028 space
= isl_space_set_alloc(gen
->ctx
, 0, n
);
4029 build
= set_unroll(build
, space
, gen
->first_unroll
);
4031 iterators
= generate_names(gen
->ctx
, n
, "c");
4032 build
= isl_ast_build_set_iterators(build
, iterators
);
4033 build
= isl_ast_build_set_at_each_domain(build
, &at_each_domain
, gen
);
4034 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
4035 isl_ast_build_free(build
);
4040 /* This function is called for each statement node in the AST of the code
4041 * for copying to or from shared/private memory.
4042 * Attach a pointer to a ppcg_kernel_stmt representing the copy
4043 * statement to the node.
4044 * The statement name is "read" or "write", depending on whether we are
4045 * reading from global memory or writing to global memory.
4046 * The name of the T space is {shared,private}_<array>.
4048 * The schedule is of the form
4052 * where A refers to a piece of an array and T to the corresponding
4053 * shifted tile. We split this schedule into mappings L -> A and L -> T
4054 * and store the corresponding expressions in stmt->index and stmt->local_index,
4055 * where stmt points to the ppcg_kernel_stmt that is attached to the node.
4057 static __isl_give isl_ast_node
*attach_copy_stmt(__isl_take isl_ast_node
*node
,
4058 __isl_keep isl_ast_build
*build
, void *user
)
4060 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4061 struct ppcg_kernel_stmt
*stmt
;
4065 isl_map
*access
, *local_access
, *map
;
4066 isl_pw_multi_aff
*pma
;
4070 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
4072 return isl_ast_node_free(node
);
4074 access
= isl_map_from_union_map(isl_ast_build_get_schedule(build
));
4075 type
= isl_map_get_tuple_name(access
, isl_dim_in
);
4076 stmt
->u
.c
.read
= !strcmp(type
, "read");
4077 access
= isl_map_reverse(access
);
4078 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(access
)));
4079 local_access
= isl_map_copy(access
);
4081 map
= isl_map_domain_map(isl_map_universe(isl_space_copy(space
)));
4082 id
= isl_map_get_tuple_id(access
, isl_dim_out
);
4083 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
4084 access
= isl_map_apply_range(access
, map
);
4085 pma
= isl_pw_multi_aff_from_map(access
);
4086 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
4087 stmt
->u
.c
.index
= expr
;
4089 map
= isl_map_range_map(isl_map_universe(space
));
4090 id
= isl_map_get_tuple_id(local_access
, isl_dim_out
);
4091 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
4092 local_access
= isl_map_apply_range(local_access
, map
);
4093 pma
= isl_pw_multi_aff_from_map(local_access
);
4094 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
4095 stmt
->u
.c
.local_index
= expr
;
4097 stmt
->u
.c
.array
= gen
->copy_group
->array
;
4098 array_index
= stmt
->u
.c
.array
- gen
->prog
->array
;
4099 stmt
->u
.c
.local_array
= &gen
->kernel
->array
[array_index
];
4100 stmt
->type
= ppcg_kernel_copy
;
4102 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
4103 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
4104 return isl_ast_node_set_annotation(node
, id
);
4107 /* Given a schedule of the form
4111 * (with S the first shared_len dimensions of the computed schedule,
4112 * A the array and L the schedule correponding to the generated loops),
4113 * indicating where to copy the array elements that need to be copied,
4114 * construct code for performing the copying.
4116 * "group" is the array reference group that is being copied
4117 * "type" is either "read" or "write"
4118 * private is set if copying needs to be performed to/from registers
4120 * We first construct a mapping to a shifted tile of the array,
4122 * [S -> A] -> T(S,A) (1)
4124 * If private is set, then we also use this mapping as a schedule
4125 * (which is already thread-specific and will be completely unrolled).
4126 * Otherwise, we wrap/tile the range over the threads.
4129 * [S -> A] -> T'(S,A)
4131 * Combined with the given schedule, we have
4133 * [S -> A] -> [L -> T'(S,A)] (2)
4135 * From the shifted tile mapping, we construct a mapping
4137 * [S -> A] -> [A -> T(S,A)]
4139 * and apply it to the schedule (2), obtaining
4141 * [A -> T(S(L),A)] -> [L -> T'(S(L),A)]
4143 * Note that we can project out S because it is uniquely defined by L.
4145 static __isl_give isl_ast_node
*copy_access(struct gpu_gen
*gen
,
4146 __isl_take isl_map
*sched
,
4147 const char *type
, struct gpu_array_ref_group
*group
,
4148 __isl_take isl_ast_build
*build
, int private)
4152 isl_map
*schedule
, *shift
, *map
;
4154 isl_id_list
*iterators
;
4157 shift
= shift_access(group
);
4159 schedule
= isl_map_copy(shift
);
4160 schedule
= isl_map_reset_tuple_id(schedule
, isl_dim_out
);
4162 schedule
= tile_access_schedule(gen
, schedule
);
4164 n
= isl_map_dim(schedule
, isl_dim_out
);
4165 set
= isl_set_universe(isl_ast_build_get_schedule_space(build
));
4166 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
4167 gen
->kernel
->block_dim
, "t");
4169 schedule
= isl_map_range_product(sched
, schedule
);
4171 space
= isl_space_domain(isl_map_get_space(shift
));
4172 map
= isl_map_range_map(isl_map_universe(isl_space_unwrap(space
)));
4173 map
= isl_map_range_product(map
, shift
);
4175 schedule
= isl_map_apply_domain(schedule
, map
);
4177 schedule
= isl_map_set_tuple_name(schedule
, isl_dim_in
, type
);
4179 build
= isl_ast_build_restrict(build
, set
);
4181 gen
->copy_group
= group
;
4184 space
= isl_space_range(isl_map_get_space(schedule
));
4185 space
= isl_space_range(isl_space_unwrap(space
));
4186 build
= set_unroll(build
, space
, 0);
4188 iterators
= generate_names(gen
->ctx
, n
, "c");
4189 build
= isl_ast_build_set_iterators(build
, iterators
);
4190 build
= isl_ast_build_set_at_each_domain(build
, &attach_copy_stmt
, gen
);
4191 tree
= isl_ast_build_ast_from_schedule(build
,
4192 isl_union_map_from_map(schedule
));
4193 isl_ast_build_free(build
);
4198 /* Return code for reading into or writing from shared memory
4199 * the given array reference group.
4201 * If we are performing a read from global memory to shared memory and
4202 * if the array involved is not a scalar, then we copy
4203 * the entire tile to shared memory. This may result in some extra
4204 * elements getting copied, but it should lead to simpler code
4205 * (which means that fewer registers may be needed) and less divergence.
4207 * Otherwise, we only copy the elements that will be read or have been written
4211 * The input "sched" is of the form.
4215 * with S the first shared_len dimensions of the computed schedule,
4216 * A the array and L the schedule correponding to the generated loops.
4218 * We first drop "type",
4222 * If the above conditions are satisfied, we project out A,
4227 * and then introduce the group tile [S -> T], resulting in
4231 static __isl_give isl_ast_node
*copy_group_shared_accesses(
4232 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
4233 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
4237 isl_union_map
*access
;
4239 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
4240 read
= !strcmp(type
, "read");
4242 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
4244 if (read
&& !gpu_array_is_scalar(group
->array
)) {
4248 space
= isl_space_domain(isl_map_get_space(sched
));
4249 space
= isl_space_unwrap(space
);
4250 map
= isl_map_domain_map(isl_map_universe(space
));
4251 sched
= isl_map_apply_domain(sched
, map
);
4253 map
= group_tile(group
);
4254 map
= isl_map_reverse(isl_map_domain_map(map
));
4255 sched
= isl_map_apply_domain(sched
, map
);
4258 return copy_access(gen
, sched
, type
, group
, build
, 0);
4261 /* Return code for reading into or writing from private memory
4262 * the given array reference group.
4264 * Let S be the first shared_len dimensions of the computed schedule,
4265 * D the iteration domains, A the array and L the schedule correponding
4266 * to the generated loops.
4267 * "sched" is of the form
4271 * where type is either "read" or "write".
4272 * We apply the privatization D -> S(t), with t the thread ids,
4273 * to the access relation D -> A to obtain the privatized access relation
4277 * We drop the type from "sched" and intersect with the privatized access
4278 * relation to obtain
4282 static __isl_give isl_ast_node
*copy_group_private_accesses(
4283 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
4284 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
4288 isl_union_map
*priv
;
4289 isl_union_map
*access
;
4290 isl_map
*access_map
;
4292 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
4293 read
= !strcmp(type
, "read");
4295 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
4296 priv
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
4299 access
= group_access_relation(group
, read
, !read
);
4300 access
= isl_union_map_apply_domain(access
, priv
);
4301 access_map
= isl_map_from_union_map(access
);
4303 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
4304 sched
= isl_map_intersect_domain(sched
, isl_map_wrap(access_map
));
4306 return copy_access(gen
, sched
, type
, group
, build
, 1);
4309 /* Return code for reading into or writing from shared or private memory.
4311 * "schedule" is of the form
4315 * with S be the first shared_len dimensions of the computed schedule,
4316 * A the array and L the schedule correponding to the generated loops.
4317 * The array reference group is attached to "type".
4319 static __isl_give isl_ast_node
*create_access_leaf(
4320 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
4321 __isl_take isl_ast_build
*build
)
4323 struct gpu_array_ref_group
*group
;
4326 id
= isl_map_get_tuple_id(schedule
, isl_dim_in
);
4327 group
= isl_id_get_user(id
);
4330 if (group
->private_tile
)
4331 return copy_group_private_accesses(gen
, group
, schedule
,
4334 return copy_group_shared_accesses(gen
, group
, schedule
,
4338 /* Create a domain node representing a synchronization.
4340 static __isl_give isl_ast_node
*create_sync_leaf(
4341 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
4342 __isl_take isl_ast_build
*build
)
4344 struct ppcg_kernel_stmt
*stmt
;
4350 isl_map_free(schedule
);
4352 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
4356 stmt
->type
= ppcg_kernel_sync
;
4358 space
= isl_ast_build_get_schedule_space(build
);
4359 space
= isl_space_from_domain(space
);
4360 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "sync");
4361 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
4362 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
4363 node
= isl_ast_node_alloc_user(expr
);
4364 isl_ast_build_free(build
);
4366 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
4367 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
4368 return isl_ast_node_set_annotation(node
, id
);
4371 /* This function is called during the code generation at the point
4372 * where the schedule domain element is completely determined by
4373 * the generated code. The input schedule contains the original
4374 * statements as well as synchronization and copy "statements".
4375 * The latter are scheduled at different points than any of the original
4376 * statements, so they will only arrive here in isolation.
4378 * If the current schedule only refers to a single statement,
4379 * we check if it is a copy or synchronization statement and
4380 * call the appropriate functions.
4381 * Otherwise, we assume we are dealing with the original statements
4382 * and we call create_domain_leaf.
4384 static __isl_give isl_ast_node
*create_kernel_leaf(
4385 __isl_take isl_ast_build
*build
, void *user
)
4387 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4389 isl_union_map
*schedule
;
4392 schedule
= isl_ast_build_get_schedule(build
);
4394 if (isl_union_map_n_map(schedule
) != 1)
4395 return create_domain_leaf(schedule
, build
, user
);
4397 map
= isl_map_from_union_map(schedule
);
4398 name
= isl_map_get_tuple_name(map
, isl_dim_in
);
4399 if (!strcmp(name
, "read") || !strcmp(name
, "write"))
4400 return create_access_leaf(gen
, map
, build
);
4401 if (!strcmp(name
, "sync"))
4402 return create_sync_leaf(gen
, map
, build
);
4404 return create_domain_leaf(isl_union_map_from_map(map
), build
, user
);
4407 /* Mark all odd schedule dimensions as "atomic" (when the even dimensions
4408 * have value 0) and all even schedule dimensions as "unroll".
4410 * That is, the options look as follows
4412 * { [0, b, 0, d, ..., 0] -> atomic[i] : exists a : i = 2 a + 1;
4413 * [a, b, c, d, ..., z] -> unroll[i] : exists a : i = 2 a }
4415 * The even positions are used to be able to schedule copying blocks
4416 * and synchronization before or after each level of the shared memory
4417 * tile loops and we want to make sure that code for these is generated
4418 * separately (within each level).
4420 static __isl_give isl_ast_build
*set_atomic_and_unroll(
4421 __isl_take isl_ast_build
*build
,
4422 __isl_take isl_space
*space
, int sched_len
)
4428 isl_local_space
*ls
;
4431 ctx
= isl_ast_build_get_ctx(build
);
4433 space
= isl_space_params(space
);
4434 space
= isl_space_add_dims(space
, isl_dim_set
, sched_len
);
4435 space
= isl_space_from_domain(space
);
4436 space
= isl_space_add_dims(space
, isl_dim_out
, 2);
4437 map
= isl_map_universe(isl_space_copy(space
));
4438 for (i
= 0; i
< sched_len
; i
+= 2)
4439 map
= isl_map_fix_si(map
, isl_dim_in
, i
, 0);
4440 ls
= isl_local_space_from_space(isl_map_get_space(map
));
4441 c
= isl_equality_alloc(ls
);
4442 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
4443 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
4444 c
= isl_constraint_set_constant_si(c
, 1);
4445 map
= isl_map_add_constraint(map
, c
);
4446 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
4447 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "atomic");
4448 opt
= isl_union_map_from_map(map
);
4450 map
= isl_map_universe(space
);
4451 ls
= isl_local_space_from_space(isl_map_get_space(map
));
4452 c
= isl_equality_alloc(ls
);
4453 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
4454 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
4455 map
= isl_map_add_constraint(map
, c
);
4456 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
4457 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "unroll");
4458 opt
= isl_union_map_add_map(opt
, map
);
4460 build
= isl_ast_build_set_options(build
, opt
);
4465 /* Return a map that maps a space of dimension gen->shared_len
4466 * to its last dimensions starting at gen->tile_first.
4467 * The range is of dimension
4469 * 2 * (gen->shared_len - gen->tile_first) + 1
4471 * The input dimensions are mapped to the odd dimensions in the output,
4472 * while the even dimensions (except 2*pos) are fixed to 0.
4473 * Output dimension 2*pos (if pos >= 0) is fixed to "val".
4474 * If pos >= 0, then only the pos first dimensions starting at gen->tile_first
4475 * are mapped to the output. The remaining input dimensions are projected
4476 * out and the corresponding output dimensions are fixed to 0.
4478 static __isl_give isl_map
*insert_even(struct gpu_gen
*gen
,
4479 __isl_take isl_space
*space
, int pos
, int val
)
4484 space
= isl_space_set_from_params(space
);
4485 space
= isl_space_add_dims(space
, isl_dim_set
, gen
->shared_len
);
4486 space
= isl_space_map_from_set(space
);
4487 proj
= isl_map_identity(space
);
4488 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, gen
->tile_first
);
4489 n
= gen
->shared_len
- gen
->tile_first
;
4490 for (i
= 0; i
<= n
; ++i
) {
4491 proj
= isl_map_insert_dims(proj
, isl_dim_out
, 2 * i
, 1);
4493 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, val
);
4495 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, 0);
4501 proj
= isl_map_eliminate(proj
, isl_dim_in
, gen
->tile_first
+ pos
,
4502 gen
->shared_len
- (gen
->tile_first
+ pos
));
4503 for (i
= pos
; i
< n
; ++i
)
4504 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
+ 1, 0);
4509 /* Given the AST context schedule "schedule" and the mapping from
4510 * domains to the shared tile loops "shared_sched", add a schedule
4511 * for a synchronization operation at position "val" of loop level "pos".
4513 * schedule is of the form
4517 * (with D the iteration domains and L the already generated loops),
4518 * while shared_sched is of the form
4522 * We combine them into
4528 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4530 * and use the result as a schedule for "sync".
4532 static __isl_give isl_union_map
*add_sync_schedule(struct gpu_gen
*gen
,
4533 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4534 __isl_keep isl_union_map
*shared_sched
, int pos
, int val
)
4537 isl_map
*proj
, *map
;
4539 shared_sched
= isl_union_map_copy(shared_sched
);
4540 schedule
= isl_union_map_copy(schedule
);
4542 space
= isl_union_map_get_space(shared_sched
);
4543 schedule
= isl_union_map_apply_domain(shared_sched
, schedule
);
4544 map
= isl_map_from_union_map(schedule
);
4546 proj
= insert_even(gen
, space
, pos
, val
);
4547 map
= isl_map_apply_range(map
, proj
);
4548 map
= isl_map_from_range(isl_map_wrap(map
));
4549 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "sync");
4551 res
= isl_union_map_add_map(res
, map
);
4556 /* Given a set of wrapped references "ref", return the corresponding
4557 * access relations based on the tagged access relations "tagged".
4559 * The elements of "ref" are of the form
4563 * with D an iteration domains and R a reference.
4564 * The elements of "tagged" are of the form
4570 * Extend "tagged" to include the iteration domain in the range, i.e.,
4572 * [D -> R] -> [D -> A]
4574 * apply the result to "ref" and then unwrap the resulting set
4575 * to obtain relations of the form
4579 static __isl_give isl_union_map
*wrapped_reference_to_access(
4580 __isl_take isl_union_set
*ref
, __isl_take isl_union_map
*tagged
)
4582 isl_union_map
*tag2access
;
4584 tag2access
= isl_union_map_copy(tagged
);
4585 tag2access
= isl_union_map_universe(tag2access
);
4586 tag2access
= isl_union_set_unwrap(isl_union_map_domain(tag2access
));
4587 tag2access
= isl_union_map_domain_map(tag2access
);
4588 tag2access
= isl_union_map_range_product(tag2access
, tagged
);
4590 ref
= isl_union_set_coalesce(ref
);
4591 ref
= isl_union_set_apply(ref
, tag2access
);
4593 return isl_union_set_unwrap(ref
);
4596 /* Given an access relation "access" from "group", remove those reads
4597 * if ("read" is 1) or writes (if "read" is 0) that are only needed to
4598 * communicate data within the same iteration of the last_shared dimension
4601 * If the access is a read then it is necessarily an element of
4603 * live_in union (range flow)
4605 * where live_in and flow may be overapproximations.
4606 * If the access is a write then it is necessarily an element of
4608 * live_out union (domain flow)
4610 * In both cases, the access relation is also a subset of
4611 * the group access relation.
4613 * Essentially, we compute the intersection of "access" with either
4615 * live_in union (range non-local-flow)
4619 * live_out union (domain non-local-flow)
4621 * We first construct a relation "local"
4623 * [[D -> R] -> [D' -> R']]
4625 * of pairs of domain iterations accessing the reference group
4626 * and references in the group that are scheduled to the same iteration
4627 * of the last_shared dimension.
4629 * If this relation does not intersect the dataflow dependences,
4630 * then there is nothing we can possibly remove and we simply
4633 * Otherwise, we remove the "local" dataflow dependences from
4634 * the set of all dataflow dependences.
4635 * Note that if the potential dataflow dependences are an overapproximation
4636 * of the actual dataflow dependences, then the result remains an
4637 * overapproximation of the non-local dataflow dependences.
4638 * Copying to/from global memory is only needed for the references
4639 * in the domain/range of the result or for accesses that are live out/in
4640 * for the entire scop.
4642 * We therefore map the domain/range of the "external" relation
4643 * to the corresponding access relation and take the union with
4644 * the live out/in relation.
4646 static __isl_give isl_union_map
*remove_local_accesses(struct gpu_gen
*gen
,
4647 struct gpu_array_ref_group
*group
, __isl_take isl_union_map
*access
,
4651 isl_union_map
*tagger
;
4652 isl_union_set
*domain
;
4654 isl_union_map
*sched
, *local
, *tagged
, *external
;
4655 isl_union_set
*tag_set
;
4658 if (isl_union_map_is_empty(access
))
4661 tagged
= group_tagged_access_relation(group
);
4663 sched
= isl_union_map_copy(gen
->sched
);
4665 space
= isl_union_map_get_space(sched
);
4666 proj
= projection(space
, gen
->untiled_len
, group
->last_shared
+ 1);
4667 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
4669 tagger
= isl_union_map_copy(gen
->prog
->scop
->tagger
);
4670 domain
= isl_union_map_domain(isl_union_map_copy(tagged
));
4671 tagger
= isl_union_map_intersect_range(tagger
, domain
);
4672 sched
= isl_union_map_apply_domain(sched
, tagger
);
4674 local
= isl_union_map_apply_range(sched
,
4675 isl_union_map_reverse(isl_union_map_copy(sched
)));
4676 local
= isl_union_map_intersect(local
,
4677 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
));
4679 empty
= isl_union_map_is_empty(local
);
4680 if (empty
< 0 || empty
) {
4681 isl_union_map_free(tagged
);
4682 isl_union_map_free(local
);
4684 return isl_union_map_free(access
);
4688 external
= isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
);
4689 external
= isl_union_map_intersect_params(external
,
4690 isl_set_copy(gen
->prog
->scop
->context
));
4691 external
= isl_union_map_subtract(external
, local
);
4694 tag_set
= isl_union_map_range(external
);
4695 external
= wrapped_reference_to_access(tag_set
, tagged
);
4696 external
= isl_union_map_union(external
,
4697 isl_union_map_copy(gen
->prog
->scop
->live_in
));
4699 tag_set
= isl_union_map_domain(external
);
4700 external
= wrapped_reference_to_access(tag_set
, tagged
);
4701 external
= isl_union_map_union(external
,
4702 isl_union_map_copy(gen
->prog
->scop
->live_out
));
4705 access
= isl_union_map_intersect(access
, external
);
4710 /* Given the AST context schedule "schedule" and the mapping from
4711 * domains to the shared tile loops "shared_sched", add a schedule
4712 * for copying an array reference group to/from shared/private memory.
4713 * "read" is set if data should be copied from global memory
4714 * to shared/private memory.
4715 * "k" represents the current group
4716 * "s" is the total number of groups
4718 * We schedule an operation before or after the innermost loop
4719 * of "shared_sched" that affects the tile of the array reference group.
4721 * schedule is of the form
4725 * (with D the iteration domains and L the already generated loops),
4726 * while shared_sched is of the form
4730 * We first compute the access relation for the reference group
4734 * and remove from this access relation those reads or writes
4735 * that only needed to communicate data within the same iteration
4736 * of the last_shared dimension of the group.
4737 * We then combine what is left with shared_sched into
4741 * If this results in an empty relation, no copying needs to be performed
4743 * Otherwise, we invert the relation and combine it with "schedule" into
4747 * The actual additional piece of the schedule is obtained from combining
4753 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4755 * The position of "val" corresponds to the innermost loop that affects
4756 * the tile and the value indicates where the copying is scheduled
4757 * with respect to the actual kernel code (at value 0).
4758 * Reads are schedule before the code, writes to global memory from
4759 * private memory are scheduled at values 1 to s, writes to global
4760 * memory from shared memory are scheduled at values s + 2 to 2 * s + 1.
4762 * If we are scheduling a read from global memory to shared memory,
4763 * we insert a synchronization before the kernel code (at the innermost
4765 * If we are scheduling a write to global memory, then we add
4766 * a synchronization after all writes (at value 2 *s + 2).
4767 * However, there is no need for a synchronization after the outermost loop.
4768 * A write to global memory from private memory at the innermost level
4769 * does not require a synchronization, because it is covered by
4770 * the synchronization after the kernel inserted by body_schedule.
4772 static __isl_give isl_union_map
*add_group_schedule(struct gpu_gen
*gen
,
4773 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4774 __isl_keep isl_union_map
*shared_sched
,
4775 struct gpu_array_ref_group
*group
, int read
, int k
, int s
)
4780 isl_union_map
*access
;
4781 isl_map
*map
, *proj
, *access_map
;
4784 access
= group_access_relation(group
, read
, !read
);
4785 access
= remove_local_accesses(gen
, group
, access
, read
);
4786 access
= isl_union_map_range_product(isl_union_map_copy(shared_sched
),
4789 if (isl_union_map_is_empty(access
)) {
4790 isl_union_map_free(access
);
4794 access
= isl_union_map_reverse(access
);
4795 access
= isl_union_map_apply_range(access
,
4796 isl_union_map_copy(schedule
));
4797 access_map
= isl_map_from_union_map(access
);
4799 space
= isl_space_copy(group
->array
->space
);
4800 space
= isl_space_from_range(space
);
4801 space
= isl_space_add_dims(space
, isl_dim_in
, gen
->shared_len
);
4802 map
= isl_map_domain_map(isl_map_universe(space
));
4804 space
= isl_union_map_get_space(schedule
);
4805 pos
= group
->last_shared
+ 1 - gen
->tile_first
;
4809 else if (group
->private_tile
)
4812 val
= 1 + s
+ 1 + k
;
4813 proj
= insert_even(gen
, space
, pos
, val
);
4814 map
= isl_map_apply_range(map
, proj
);
4816 access_map
= isl_map_range_product(access_map
, map
);
4818 id
= isl_id_alloc(gen
->ctx
, read
? "read" : "write", group
);
4819 access_map
= isl_map_set_tuple_id(access_map
, isl_dim_in
, id
);
4821 res
= isl_union_map_add_map(res
, access_map
);
4823 n
= gen
->shared_len
- gen
->tile_first
;
4825 if (!group
->private_tile
)
4826 res
= add_sync_schedule(gen
, res
, schedule
,
4827 shared_sched
, n
, -1);
4831 if (pos
== n
&& group
->private_tile
)
4833 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4840 /* Return a schedule for the shared tile loops based on the current
4841 * AST context schedule.
4843 * We create a "shared_sched" that maps the domains to the first
4844 * shared_len dimensions of the computed schedule, project out the
4845 * first tile_first dimensions (as these are already covered by
4846 * the host code) and insert "statement-level" dimensions at even
4847 * positions so that we can schedule copy blocks and synchronization
4848 * before/after each level.
4850 * In particular, copy blocks are inserted inside the innermost
4851 * level that affect the tile. For the copying to global memory,
4852 * those from private memory are scheduled before those from shared
4853 * memory such that synchronization can be inserted between the two
4854 * at the innermost level.
4855 * Synchronization is inserted at the innermost level before the
4856 * actual kernel code if there is any copying from global memory
4857 * to shared memory. It is inserted unconditionally at the innermost
4858 * level after the actual kernel code and the copying to global memory
4859 * from private memory (if any). Finally, it is inserted after
4860 * any copying to global memory, except at the outermost level
4861 * and at the innermost level if there is no copying from shared
4862 * memory. The copying from private memory is covered by the unconditional
4863 * synchronization at the innermost level.
4865 static __isl_give isl_union_map
*body_schedule(struct gpu_gen
*gen
,
4866 __isl_take isl_union_map
*schedule
)
4870 isl_union_map
*shared_sched
;
4871 isl_union_map
*sched
;
4872 isl_map
*proj
, *map
;
4875 shared_sched
= isl_union_map_copy(gen
->tiled_sched
);
4876 proj
= projection(isl_union_map_get_space(shared_sched
),
4877 gen
->tiled_len
, gen
->shared_len
);
4878 shared_sched
= isl_union_map_apply_range(shared_sched
,
4879 isl_union_map_from_map(proj
));
4880 space
= isl_union_map_get_space(shared_sched
);
4881 proj
= insert_even(gen
, space
, -1, 0);
4882 sched
= isl_union_map_apply_range(isl_union_map_copy(shared_sched
),
4883 isl_union_map_from_map(proj
));
4885 res
= isl_union_map_range_product(isl_union_map_copy(schedule
), sched
);
4888 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
4889 s
+= gen
->prog
->array
[i
].n_group
;
4892 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4893 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
4895 for (j
= 0; j
< array
->n_group
; ++j
) {
4896 struct gpu_array_ref_group
*group
;
4898 group
= array
->groups
[j
];
4899 if (!group
->private_tile
&& !group
->shared_tile
)
4901 res
= add_group_schedule(gen
, res
, schedule
,
4902 shared_sched
, group
, 0, k
, s
);
4903 res
= add_group_schedule(gen
, res
, schedule
,
4904 shared_sched
, group
, 1, k
, s
);
4909 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4910 gen
->shared_len
- gen
->tile_first
, 1 + s
);
4912 isl_union_map_free(shared_sched
);
4913 isl_union_map_free(schedule
);
4918 /* Generate code for "kernel" in the given "context".
4920 * We first generate code for the shared tile loops (T1T, T1P and T2)
4921 * in a context that includes the block ids.
4922 * Within each iteration of these loops an additional code generation
4923 * is performed (within create_kernel_leaf) for the rest of the schedule
4924 * in a context that includes the thread ids.
4926 static __isl_give isl_ast_node
*generate_kernel(struct gpu_gen
*gen
,
4927 __isl_keep isl_ast_build
*build
, __isl_keep isl_set
*host_domain
,
4928 __isl_keep isl_multi_pw_aff
*grid_size
)
4932 isl_id_list
*iterators
;
4933 isl_union_map
*schedule
;
4937 schedule
= isl_ast_build_get_schedule(build
);
4939 build
= isl_ast_build_copy(build
);
4940 build
= isl_ast_build_restrict(build
, isl_set_copy(host_domain
));
4941 space
= isl_ast_build_get_schedule_space(build
);
4942 set
= isl_set_universe(isl_space_copy(space
));
4943 set
= add_bounded_parameters_dynamic(set
, grid_size
, "b");
4944 build
= isl_ast_build_restrict(build
, set
);
4946 schedule
= body_schedule(gen
, schedule
);
4948 sched_len
= 2 * (gen
->shared_len
- gen
->tile_first
) + 1;
4950 build
= set_atomic_and_unroll(build
, space
, sched_len
);
4951 iterators
= generate_names(gen
->ctx
, sched_len
, "g");
4952 build
= isl_ast_build_set_iterators(build
, iterators
);
4953 build
= isl_ast_build_set_create_leaf(build
, &create_kernel_leaf
, gen
);
4954 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
4955 isl_ast_build_free(build
);
4960 /* Attach "id" to the given node.
4962 static __isl_give isl_ast_node
*attach_id(__isl_take isl_ast_node
*node
,
4963 __isl_keep isl_ast_build
*build
, void *user
)
4967 node
= isl_ast_node_set_annotation(node
, id
);
4972 /* Construct an AST node for performing a kernel launch and attach
4973 * the information about the kernel to that node.
4975 * The kernel AST has been constructed in the context of the range
4976 * of "schedule". In particular, the grid size has been computed
4977 * in the context. We therefore still need to make sure that these
4978 * constraints are expressed in the code. We do this by creating a schedule
4980 * kernel[] -> [S -> []]
4982 * where S is the schedule domain, i.e., the range of "schedule".
4983 * The AST generation will then create a single call surrounded by
4984 * all the condition in "S" that have not been expressed yet.
4986 * The kernel information is attached to this node in attach_id.
4988 static __isl_give isl_ast_node
*construct_launch(
4989 __isl_take isl_ast_build
*build
, __isl_take isl_union_map
*schedule
,
4990 __isl_take
struct ppcg_kernel
*kernel
)
4994 isl_union_set
*domain
;
4999 ctx
= isl_ast_build_get_ctx(build
);
5001 id
= isl_id_alloc(ctx
, NULL
, kernel
);
5002 id
= isl_id_set_free_user(id
, &ppcg_kernel_free
);
5004 domain
= isl_union_map_range(schedule
);
5005 set
= isl_set_from_union_set(domain
);
5006 map
= isl_map_from_domain(set
);
5007 map
= isl_map_from_range(isl_map_wrap(map
));
5008 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "kernel");
5009 schedule
= isl_union_map_from_map(map
);
5011 build
= isl_ast_build_set_at_each_domain(build
, &attach_id
, id
);
5012 node
= isl_ast_build_ast_from_schedule(build
, schedule
);
5013 isl_ast_build_free(build
);
5018 /* This function is called for each leaf in the AST of the host code.
5019 * We first specialize the schedule to the site of the leaf, compute
5020 * the size of shared memory and then construct the body of the host code
5021 * and the associated kernel.
5023 * The necessary information for printing the kernel launch is
5024 * stored in a struct ppcg_kernel and attached to the leaf node
5025 * created to represent the launch.
5027 static __isl_give isl_ast_node
*create_host_leaf(
5028 __isl_take isl_ast_build
*build
, void *user
)
5030 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
5033 struct ppcg_kernel
*kernel
;
5034 isl_set
*host_domain
;
5035 isl_union_map
*schedule
;
5036 isl_union_map
*local_sched
;
5037 isl_union_map
*access
;
5038 isl_union_set
*domain
;
5041 schedule
= isl_ast_build_get_schedule(build
);
5043 isl_union_map_foreach_map(schedule
, &extract_tile_len
, gen
);
5046 domain
= isl_union_map_domain(isl_union_map_copy(schedule
));
5048 local_sched
= isl_union_map_copy(gen
->sched
);
5049 local_sched
= isl_union_map_intersect_domain(local_sched
, domain
);
5050 access
= isl_union_map_union(isl_union_map_copy(gen
->prog
->read
),
5051 isl_union_map_copy(gen
->prog
->may_write
));
5052 access
= isl_union_map_apply_domain(access
,
5053 isl_union_map_copy(local_sched
));
5055 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
5056 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
5057 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
5059 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
5060 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
5061 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
5063 kernel
= gen
->kernel
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel
);
5067 kernel
->id
= gen
->kernel_id
++;
5068 kernel
->context
= isl_union_map_params(isl_union_map_copy(schedule
));
5069 kernel
->grid_size
= extract_grid_size(gen
, kernel
);
5070 extract_block_size(gen
, kernel
);
5071 kernel
->arrays
= isl_union_map_range(access
);
5072 kernel
->arrays
= isl_union_set_apply(kernel
->arrays
,
5073 isl_union_map_copy(gen
->prog
->to_outer
));
5074 kernel
->space
= isl_ast_build_get_schedule_space(build
);
5076 gen
->private_access
= NULL
;
5077 compute_shared_sched(gen
);
5078 gen
->privatization
= compute_privatization(gen
);
5079 check_scalar_live_ranges(gen
);
5080 if (group_references(gen
) < 0)
5081 schedule
= isl_union_map_free(schedule
);
5082 compute_private_access(gen
);
5083 host_domain
= isl_set_from_union_set(isl_union_map_range(
5084 isl_union_map_copy(schedule
)));
5085 localize_bounds(gen
, kernel
, host_domain
);
5087 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
5088 check_shared_memory_bound(gen
);
5089 compute_group_tilings(gen
);
5091 kernel
->tree
= generate_kernel(gen
, build
, host_domain
,
5093 create_kernel_vars(gen
, kernel
);
5095 free_local_array_info(gen
);
5096 isl_map_free(gen
->privatization
);
5097 isl_union_map_free(gen
->private_access
);
5098 isl_union_map_free(gen
->local_sched
);
5099 isl_union_map_free(gen
->tiled_sched
);
5100 isl_union_map_free(gen
->shared_sched
);
5101 isl_union_map_free(gen
->shared_proj
);
5102 isl_set_free(host_domain
);
5103 free(gen
->tile_size
);
5105 node
= construct_launch(build
, schedule
, kernel
);
5109 isl_union_map_free(schedule
);
5113 /* Use isl to generate code for the outer gen->tile_first loops
5114 * of the global schedule in gen->sched, resulting in the host code.
5115 * Within each iteration of this partial schedule, i.e., for each kernel
5116 * launch, create_host_leaf takes care of generating the kernel code.
5118 static __isl_give isl_ast_node
*generate_host_code(struct gpu_gen
*gen
)
5120 isl_ast_build
*build
;
5122 isl_union_map
*sched
;
5124 isl_id_list
*iterators
;
5126 sched
= isl_union_map_copy(gen
->sched
);
5127 proj
= projection(isl_union_map_get_space(sched
),
5128 gen
->untiled_len
, gen
->tile_first
);
5129 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
5131 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 1);
5132 build
= isl_ast_build_from_context(isl_set_copy(gen
->prog
->context
));
5133 iterators
= generate_names(gen
->ctx
, gen
->tile_first
, "h");
5134 build
= isl_ast_build_set_iterators(build
, iterators
);
5135 build
= isl_ast_build_set_create_leaf(build
, &create_host_leaf
, gen
);
5136 tree
= isl_ast_build_ast_from_schedule(build
, sched
);
5137 isl_ast_build_free(build
);
5142 __isl_give isl_union_map
*extract_sizes_from_str(isl_ctx
*ctx
, const char *str
)
5146 return isl_union_map_read_from_str(ctx
, str
);
5149 /* Information about the outermost tilable bands in the forest of bands.
5151 * tile_len and n_parallel are only sets on band_info structures
5152 * that correspond to outermost bands. For other bands (in particular,
5153 * ancestors of the outermost bands), n_parallal is set to 0.
5155 * prefix is the (padded) schedule leading up to the outermost tilable bands.
5157 * tile_first is the number of schedule dimensions in prefix.
5159 * suffix is the schedule of the outermost tilable bands and their descendants.
5162 struct gpu_gen
*gen
;
5166 isl_union_map
*prefix
;
5167 isl_union_map
*suffix
;
5170 /* Set tile_len and n_parallel of the statement to that of
5171 * their outermost band, recorded in the band_info.
5173 static int set_stmt_tile_len(__isl_take isl_map
*map
, void *user
)
5175 struct band_info
*info
= user
;
5176 struct gpu_stmt
*stmt
;
5179 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
5180 stmt
= find_stmt(info
->gen
->prog
, id
);
5183 stmt
->tile_len
= info
->tile_len
;
5184 stmt
->n_parallel
= info
->n_parallel
;
5191 static void list_select_outer_band(struct gpu_gen
*gen
,
5192 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
);
5194 /* Check if this band has any parallel loops. If so, take it as
5195 * the outermost tilable band. If not, continue looking for the
5196 * outermost tilable band in the children of the current band.
5198 static void band_select_outer_band(struct gpu_gen
*gen
,
5199 __isl_take isl_band
*band
, int pos
, struct band_info
*info
)
5201 int n
= isl_band_n_member(band
);
5204 for (n_parallel
= 0; n_parallel
< n
; ++n_parallel
)
5205 if (!isl_band_member_is_coincident(band
, n_parallel
))
5208 info
->n_parallel
= n_parallel
;
5210 gen
->any_parallelism
= 1;
5212 info
->tile_first
= pos
;
5214 info
->prefix
= isl_band_get_prefix_schedule(band
);
5215 info
->suffix
= isl_union_map_flat_range_product(
5216 isl_band_get_partial_schedule(band
),
5217 isl_band_get_suffix_schedule(band
));
5218 isl_union_map_foreach_map(info
->prefix
,
5219 &set_stmt_tile_len
, info
);
5220 } else if (isl_band_has_children(band
)) {
5221 isl_band_list
*children
;
5222 children
= isl_band_get_children(band
);
5223 list_select_outer_band(gen
, children
, pos
+ n
, info
);
5226 info
->tile_first
= pos
+ n
;
5228 info
->prefix
= isl_union_map_flat_range_product(
5229 isl_band_get_prefix_schedule(band
),
5230 isl_band_get_partial_schedule(band
));
5231 info
->suffix
= isl_band_get_suffix_schedule(band
);
5232 isl_union_map_foreach_map(info
->prefix
,
5233 &set_stmt_tile_len
, info
);
5236 isl_band_free(band
);
5239 /* Comparison function that returns a non-zero value for band_infos
5240 * with different tile_len fields or different n_parallel fields.
5242 static int cmp_band(const void *p1
, const void *p2
)
5244 const struct band_info
*info1
= p1
;
5245 const struct band_info
*info2
= p2
;
5247 if (info1
->tile_len
!= info2
->tile_len
)
5248 return info1
->tile_len
- info2
->tile_len
;
5250 return info1
->n_parallel
- info2
->n_parallel
;
5253 /* Extend "umap" with coordinates with fixed value "val"
5254 * to a total length of "dst_len", assuming the original dimension is "src_len".
5256 static __isl_give isl_union_map
*extend_range(
5257 __isl_take isl_union_map
*umap
, int src_len
, int dst_len
, int val
)
5263 dim
= isl_union_map_get_space(umap
);
5264 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
5265 for (i
= src_len
; i
< dst_len
; ++i
)
5266 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
5268 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
5273 /* Group bands with the same values for tile_len and n_parallel.
5274 * The prefix schedule is then extended with a fixed coordinate that
5275 * is different for each such group.
5276 * Note that the actual values for this coordinate are not important.
5277 * The bands have already been effectively separated at a higher level
5278 * or they are independent and may be executed in parallel.
5279 * The list of band_info has been sorted before this functions is called.
5281 static void separate_bands(struct band_info
*info
, int n
)
5286 for (i
= 0; i
< n
; ++i
) {
5287 int l
= info
[i
].tile_first
;
5290 (info
[i
].tile_len
!= info
[i
- 1].tile_len
||
5291 info
[i
].n_parallel
!= info
[i
- 1].n_parallel
))
5294 info
[i
].prefix
= extend_range(info
[i
].prefix
,
5296 info
[i
].tile_first
= l
+ 1;
5300 /* Select the outermost bands in the elements of the list, align
5301 * their prefix schedules, separate bands with different values
5302 * for tile_len and/or n_parallel and then combine the resulting
5303 * prefix and suffix schedules into a single pair of prefix and
5304 * suffix schedules for the entire list.
5306 static void list_select_outer_band(struct gpu_gen
*gen
,
5307 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
)
5311 int n
= isl_band_list_n_band(list
);
5312 isl_ctx
*ctx
= isl_band_list_get_ctx(list
);
5313 struct band_info
*info
;
5315 isl_union_map
*prefix
;
5316 isl_union_map
*suffix
;
5319 info
= isl_calloc_array(ctx
, struct band_info
, n
);
5323 for (i
= 0; i
< n
; ++i
) {
5324 band
= isl_band_list_get_band(list
, i
);
5325 band_select_outer_band(gen
, band
, pos
, &info
[i
]);
5326 if (info
[i
].tile_first
> max_tile_first
)
5327 max_tile_first
= info
[i
].tile_first
;
5330 for (i
= 0; i
< n
; ++i
) {
5331 if (info
[i
].tile_first
== max_tile_first
)
5333 info
[i
].prefix
= extend_range(info
[i
].prefix
,
5334 info
[i
].tile_first
, max_tile_first
, 0);
5335 info
[i
].tile_first
= max_tile_first
;
5338 qsort(info
, n
, sizeof(struct band_info
), &cmp_band
);
5340 for (i
= 0; i
< n
- 1; ++i
)
5341 if (info
[i
].tile_len
!= info
[i
+ 1].tile_len
||
5342 info
[i
].n_parallel
!= info
[i
+ 1].n_parallel
)
5346 separate_bands(info
, n
);
5348 prefix
= info
[0].prefix
;
5349 suffix
= info
[0].suffix
;
5351 for (i
= 1; i
< n
; ++i
) {
5352 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
5353 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
5356 list_info
->tile_first
= info
[0].tile_first
;
5357 list_info
->tile_len
= -1;
5358 list_info
->prefix
= prefix
;
5359 list_info
->suffix
= suffix
;
5361 isl_band_list_free(list
);
5365 /* Select the outermost tilable band that (by construction)
5366 * has at least one parallel loop.
5367 * The starting position of the aligned band is stored in the pair
5369 * The sizes and number of parallel loops may be different in different
5370 * parts of the band forest and are therefore stored in the gpu_stmts.
5372 * Return the complete schedule, with the tilable bands aligned
5373 * at gen->tile_first and padded with zero, if needed.
5375 static __isl_give isl_union_map
*select_outer_tilable_band(struct gpu_gen
*gen
,
5376 __isl_keep isl_schedule
*schedule
)
5378 isl_band_list
*list
;
5379 struct band_info info
;
5381 gen
->n_parallel
= 0;
5384 list
= isl_schedule_get_band_forest(schedule
);
5386 if (isl_band_list_n_band(list
) == 0) {
5387 isl_band_list_free(list
);
5388 return isl_schedule_get_map(schedule
);
5391 list_select_outer_band(gen
, list
, 0, &info
);
5393 gen
->tile_first
= info
.tile_first
;
5394 info
.suffix
= align_range(info
.suffix
);
5396 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
5399 /* Set gen->untiled_len to the number of scheduling dimensions
5400 * for the schedule of the first domain.
5401 * We assume here that this number is the same for all domains.
5403 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
5405 unsigned *untiled_len
= user
;
5407 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
5413 /* Compute an appropriate schedule based on the accesses in
5414 * gen->read and gen->write.
5416 * We use the dependences in gen->prog->scop to compute
5417 * a schedule that has a parallel loop in each tilable band.
5418 * Finally, we select the outermost tilable band.
5420 * If live range reordering is allowed, then we need to make sure
5421 * that live ranges on arrays are not run in parallel since doing
5422 * so would require array expansion. We therefore add the array
5423 * order dependences to the coincidence dependences. Non-zero array
5424 * order dependences will then prevent a schedule dimension from being
5425 * considered parallel.
5426 * Live ranges derived from scalars are allowed to be run in parallel
5427 * since we force the scalars to be mapped to private memory in
5428 * check_scalar_live_ranges.
5429 * If live range reordering is allowed, then the false dependences
5430 * are not added to the validity constraints as that would prevent
5431 * reordering. Instead, the external false dependences that enforce that reads
5432 * from potentially live-in data precede any later write and
5433 * that writes of potentially live-out data follow any other earlier write
5434 * are added to the validity constraints.
5435 * The false dependences are still added to the proximity constraints
5436 * for consistency with the case where live range reordering is not allowed.
5438 static void compute_schedule(struct gpu_gen
*gen
)
5440 isl_union_set
*domain
;
5441 isl_union_map
*dep_raw
, *dep
;
5442 isl_union_map
*validity
, *proximity
, *coincidence
;
5443 isl_union_map
*sched
;
5444 isl_schedule_constraints
*sc
;
5445 isl_schedule
*schedule
;
5447 domain
= isl_union_set_copy(gen
->prog
->scop
->domain
);
5448 domain
= isl_union_set_intersect_params(domain
,
5449 isl_set_copy(gen
->prog
->scop
->context
));
5450 sc
= isl_schedule_constraints_on_domain(isl_union_set_copy(domain
));
5451 if (gen
->options
->live_range_reordering
) {
5452 sc
= isl_schedule_constraints_set_conditional_validity(sc
,
5453 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
),
5454 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_order
));
5455 proximity
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
5456 validity
= isl_union_map_copy(proximity
);
5457 validity
= isl_union_map_union(validity
,
5458 isl_union_map_copy(gen
->prog
->scop
->dep_external
));
5459 proximity
= isl_union_map_union(proximity
,
5460 isl_union_map_copy(gen
->prog
->scop
->dep_false
));
5461 coincidence
= isl_union_map_copy(validity
);
5462 coincidence
= isl_union_map_union(coincidence
,
5463 isl_union_map_copy(gen
->prog
->array_order
));
5465 dep_raw
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
5466 dep
= isl_union_map_copy(gen
->prog
->scop
->dep_false
);
5467 dep
= isl_union_map_union(dep
, dep_raw
);
5468 dep
= isl_union_map_coalesce(dep
);
5469 proximity
= isl_union_map_copy(dep
);
5470 coincidence
= isl_union_map_copy(dep
);
5473 sc
= isl_schedule_constraints_set_validity(sc
, validity
);
5474 sc
= isl_schedule_constraints_set_coincidence(sc
, coincidence
);
5475 sc
= isl_schedule_constraints_set_proximity(sc
, proximity
);
5477 if (gen
->options
->debug
->dump_schedule_constraints
)
5478 isl_schedule_constraints_dump(sc
);
5479 schedule
= isl_schedule_constraints_compute_schedule(sc
);
5480 if (gen
->options
->debug
->dump_schedule
)
5481 isl_schedule_dump(schedule
);
5483 sched
= select_outer_tilable_band(gen
, schedule
);
5485 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
5486 sched
= isl_union_map_intersect_domain(sched
, domain
);
5489 isl_schedule_free(schedule
);
5492 /* Compute the sets of outer array elements that need to be copied in and out.
5494 * In particular, for each array that is possibly written anywhere in
5495 * gen->prog and that is visible outside the corresponding scop,
5496 * we copy out its entire extent.
5498 * Any array elements that is read without first being written needs
5499 * to be copied in. Furthermore, if there are any array elements that
5500 * are copied out, but that may not be written inside gen->prog, then
5501 * they also need to be copied in to ensure that the value after execution
5502 * is the same as the value before execution.
5503 * In case the array elements are structures, we need to take into
5504 * account that all members of the structures need to be written
5505 * by gen->prog before we can avoid copying the data structure in.
5507 * While computing the set of array elements that are copied out but
5508 * not necessarily written, we intersect both sets with the context.
5509 * This helps in those cases where the arrays are declared with a fixed size,
5510 * while the accesses are parametric and the context assigns a fixed value
5511 * to the parameters.
5513 * If an element from a local array is read without first being written,
5514 * then there is no point in copying it in since it cannot have been
5515 * written prior to the scop. Warn about the uninitialized read instead.
5517 static void compute_copy_in_and_out(struct gpu_gen
*gen
)
5520 isl_union_set
*local
;
5521 isl_union_set
*may_write
, *must_write
;
5522 isl_union_set
*copy_in
, *copy_out
;
5523 isl_union_set
*not_written
;
5524 isl_union_map
*uninitialized
;
5525 isl_union_map
*local_uninitialized
;
5527 must_write
= isl_union_map_range(
5528 isl_union_map_copy(gen
->prog
->must_write
));
5529 must_write
= isl_union_set_intersect_params(must_write
,
5530 isl_set_copy(gen
->prog
->context
));
5531 may_write
= isl_union_map_range(
5532 isl_union_map_copy(gen
->prog
->may_write
));
5533 may_write
= isl_union_set_intersect_params(may_write
,
5534 isl_set_copy(gen
->prog
->context
));
5535 may_write
= isl_union_set_universe(may_write
);
5536 may_write
= isl_union_set_apply(may_write
,
5537 isl_union_map_copy(gen
->prog
->to_outer
));
5538 copy_out
= isl_union_set_empty(isl_union_set_get_space(may_write
));
5539 local
= isl_union_set_copy(copy_out
);
5541 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
5546 space
= isl_space_copy(gen
->prog
->array
[i
].space
);
5548 if (gen
->prog
->array
[i
].local
) {
5551 set
= isl_set_universe(space
);
5552 local
= isl_union_set_add_set(local
, set
);
5556 write_i
= isl_union_set_extract_set(may_write
, space
);
5557 empty
= isl_set_fast_is_empty(write_i
);
5558 isl_set_free(write_i
);
5562 write_i
= isl_set_copy(gen
->prog
->array
[i
].extent
);
5563 copy_out
= isl_union_set_add_set(copy_out
, write_i
);
5565 isl_union_set_free(may_write
);
5567 copy_out
= isl_union_set_intersect_params(copy_out
,
5568 isl_set_copy(gen
->prog
->context
));
5570 gen
->prog
->copy_out
= isl_union_set_copy(copy_out
);
5572 copy_out
= isl_union_set_apply(copy_out
,
5573 isl_union_map_copy(gen
->prog
->to_inner
));
5574 not_written
= isl_union_set_subtract(copy_out
, must_write
);
5576 uninitialized
= isl_union_map_copy(gen
->prog
->scop
->live_in
);
5577 local_uninitialized
= isl_union_map_copy(uninitialized
);
5579 local
= isl_union_set_apply(local
,
5580 isl_union_map_copy(gen
->prog
->to_inner
));
5581 local_uninitialized
= isl_union_map_intersect_range(local_uninitialized
,
5583 if (!isl_union_map_is_empty(local_uninitialized
)) {
5585 "possibly uninitialized reads (not copied in):\n");
5586 isl_union_map_dump(local_uninitialized
);
5588 uninitialized
= isl_union_map_subtract(uninitialized
,
5589 local_uninitialized
);
5590 copy_in
= isl_union_map_range(uninitialized
);
5591 copy_in
= isl_union_set_union(copy_in
, not_written
);
5592 copy_in
= isl_union_set_apply(copy_in
,
5593 isl_union_map_copy(gen
->prog
->to_outer
));
5595 gen
->prog
->copy_in
= copy_in
;
5598 /* Extract a gpu_stmt_access from "expr", append it to the list
5599 * that ends in *next_access and return the updated end of the list.
5601 static struct gpu_stmt_access
**expr_extract_access(struct pet_expr
*expr
,
5602 struct gpu_stmt_access
**next_access
)
5604 struct gpu_stmt_access
*access
;
5605 isl_ctx
*ctx
= isl_map_get_ctx(expr
->acc
.access
);
5607 access
= isl_alloc_type(ctx
, struct gpu_stmt_access
);
5609 access
->next
= NULL
;
5610 access
->read
= expr
->acc
.read
;
5611 access
->write
= expr
->acc
.write
;
5612 access
->access
= pet_expr_access_get_may_access(expr
);
5613 access
->tagged_access
= pet_expr_access_get_tagged_may_access(expr
);
5614 access
->exact_write
= !expr
->acc
.write
||
5615 isl_map_is_equal(expr
->acc
.access
, access
->access
);
5616 access
->ref_id
= isl_id_copy(expr
->acc
.ref_id
);
5619 *next_access
= access
;
5620 next_access
= &(*next_access
)->next
;
5624 static struct gpu_stmt_access
**expr_extract_accesses(struct pet_expr
*expr
,
5625 struct gpu_stmt_access
**next_access
)
5629 for (i
= 0; i
< expr
->n_arg
; ++i
)
5630 next_access
= expr_extract_accesses(expr
->args
[i
],
5633 if (expr
->type
== pet_expr_access
)
5634 next_access
= expr_extract_access(expr
, next_access
);
5639 static void pet_stmt_extract_accesses(struct gpu_stmt
*stmt
)
5641 struct gpu_stmt_access
**next_access
= &stmt
->accesses
;
5643 stmt
->accesses
= NULL
;
5644 expr_extract_accesses(stmt
->stmt
->body
, next_access
);
5647 /* Return an array of gpu_stmt representing the statements in "scop".
5649 static struct gpu_stmt
*extract_stmts(isl_ctx
*ctx
, struct ppcg_scop
*scop
,
5650 __isl_keep isl_set
*context
)
5653 struct gpu_stmt
*stmts
;
5655 stmts
= isl_calloc_array(ctx
, struct gpu_stmt
, scop
->n_stmt
);
5659 for (i
= 0; i
< scop
->n_stmt
; ++i
) {
5660 struct gpu_stmt
*s
= &stmts
[i
];
5662 s
->id
= isl_set_get_tuple_id(scop
->stmts
[i
]->domain
);
5663 s
->stmt
= scop
->stmts
[i
];
5664 pet_stmt_extract_accesses(s
);
5670 /* Callback for ppcg_print_guarded that calls the callback for generate_gpu.
5672 static __isl_give isl_printer
*print_gpu(__isl_take isl_printer
*p
, void *user
)
5674 struct gpu_gen
*gen
= user
;
5676 return gen
->print(p
, gen
->prog
, gen
->tree
, &gen
->types
,
5680 /* Generate CUDA code for "scop" and print it to "p".
5681 * After generating an AST for the transformed scop as explained below,
5682 * we call "gen->print" to print the AST in the desired output format
5685 * If it turns out that it does not make sense to generate GPU code,
5686 * then we generate CPU code instead.
5688 * The GPU code is generated in a context where at least one
5689 * statement instance is executed. The corresponding guard (if any) is printed
5690 * around the entire generated GPU code, except for the declaration
5691 * of the arrays that are visible outside of the scop and that therefore
5692 * cannot be declared inside the body of any possible guard.
5694 * We first compute a schedule that respects the dependences
5695 * of the original program and select the outermost band
5696 * of tilable dimensions that has at least one parallel loop.
5697 * We then have three blocks of dimensions
5701 * The tilable band "B" is first tiled according to "tile" sizes, resulting
5706 * For each iteration of the T loop and for each array, we compute
5707 * the array elements accessed by that iteration, construct a rectangular
5708 * box around it and shift it to the origin. The result is used
5709 * as shared memory for the array.
5711 * We then split off at most 2 parallel loops from the T loops and
5712 * at most 3 parallel loops from the P loops
5716 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
5717 * according to "grid"/"block" sizes.
5719 * H T1T T1P T2 P1T P1P P2 G
5721 * Finally, the T1P and P1P iterators are equated to the block and
5722 * thread dimensions respectively and so are effectively removed.
5723 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
5724 * are run on the GPU.
5726 * Code is generated in three stages. We first generate code for the
5727 * host (the H loops), with iterators h%d. Then, for each leaf node
5728 * of the resulting AST, we generate code for the shared loops (up to
5729 * and including T2), with iterators g%d and after equating the H loops
5730 * to h%d parameters and the T1P loops to the block dimensions.
5731 * Finally, we generate code for the remaining loops in a similar fashion.
5733 static __isl_give isl_printer
*generate(__isl_take isl_printer
*p
,
5734 struct gpu_gen
*gen
, struct ppcg_scop
*scop
,
5735 struct ppcg_options
*options
)
5737 struct gpu_prog
*prog
;
5739 isl_set
*context
, *guard
;
5742 return isl_printer_free(p
);
5744 ctx
= isl_printer_get_ctx(p
);
5745 prog
= gpu_prog_alloc(ctx
, scop
);
5747 return isl_printer_free(p
);
5749 context
= isl_set_copy(prog
->context
);
5750 guard
= isl_union_set_params(isl_union_set_copy(prog
->scop
->domain
));
5751 prog
->context
= isl_set_intersect(prog
->context
, isl_set_copy(guard
));
5754 gen
->any_parallelism
= 0;
5755 compute_schedule(gen
);
5757 if (!gen
->any_parallelism
) {
5758 isl_set_free(context
);
5759 isl_set_free(guard
);
5760 p
= print_cpu(p
, scop
, options
);
5762 compute_copy_in_and_out(gen
);
5763 gen
->tree
= generate_host_code(gen
);
5764 p
= ppcg_print_exposed_declarations(p
, prog
->scop
);
5765 p
= ppcg_print_guarded(p
, guard
, context
, &print_gpu
, gen
);
5766 isl_ast_node_free(gen
->tree
);
5769 isl_union_map_free(gen
->sched
);
5771 gpu_prog_free(prog
);
5776 /* Wrapper around generate for use as a ppcg_transform callback.
5778 static __isl_give isl_printer
*generate_wrap(__isl_take isl_printer
*p
,
5779 struct ppcg_scop
*scop
, void *user
)
5781 struct gpu_gen
*gen
= user
;
5783 return generate(p
, gen
, scop
, gen
->options
);
5786 /* Transform the code in the file called "input" by replacing
5787 * all scops by corresponding GPU code and write the results to "out".
5789 int generate_gpu(isl_ctx
*ctx
, const char *input
, FILE *out
,
5790 struct ppcg_options
*options
,
5791 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
5792 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
5793 struct gpu_types
*types
, void *user
), void *user
)
5800 gen
.sizes
= extract_sizes_from_str(ctx
, options
->sizes
);
5801 gen
.options
= options
;
5804 gen
.print_user
= user
;
5806 gen
.types
.name
= NULL
;
5808 r
= ppcg_transform(ctx
, input
, out
, options
, &generate_wrap
, &gen
);
5810 isl_union_map_free(gen
.sizes
);
5811 for (i
= 0; i
< gen
.types
.n
; ++i
)
5812 free(gen
.types
.name
[i
]);
5813 free(gen
.types
.name
);
5818 struct gpu_prog
*gpu_prog_alloc(isl_ctx
*ctx
, struct ppcg_scop
*scop
)
5820 struct gpu_prog
*prog
;
5825 prog
= isl_calloc_type(ctx
, struct gpu_prog
);
5830 prog
->context
= isl_set_copy(scop
->context
);
5831 prog
->n_stmts
= scop
->n_stmt
;
5832 prog
->stmts
= extract_stmts(ctx
, scop
, prog
->context
);
5833 prog
->read
= isl_union_map_copy(scop
->reads
);
5834 prog
->may_write
= isl_union_map_copy(scop
->may_writes
);
5835 prog
->must_write
= isl_union_map_copy(scop
->must_writes
);
5836 prog
->to_inner
= compute_to_inner(scop
);
5837 prog
->to_outer
= isl_union_map_copy(prog
->to_inner
);
5838 prog
->to_outer
= isl_union_map_reverse(prog
->to_outer
);
5841 return gpu_prog_free(prog
);
5843 if (collect_array_info(prog
) < 0)
5844 return gpu_prog_free(prog
);
5849 void *gpu_prog_free(struct gpu_prog
*prog
)
5853 free_array_info(prog
);
5854 free_stmts(prog
->stmts
, prog
->n_stmts
);
5855 isl_union_map_free(prog
->to_outer
);
5856 isl_union_map_free(prog
->to_inner
);
5857 isl_union_set_free(prog
->copy_in
);
5858 isl_union_set_free(prog
->copy_out
);
5859 isl_union_map_free(prog
->read
);
5860 isl_union_map_free(prog
->may_write
);
5861 isl_union_map_free(prog
->must_write
);
5862 isl_union_map_free(prog
->array_order
);
5863 isl_set_free(prog
->context
);