gpu_group.h

   1 #ifndef GPU_GROUP_H
   2 #define GPU_GROUP_H
   3
   4 #include "gpu.h"
   5
   6 /* A group of array references in a kernel that should be handled together.
   7  * If private_tile is not NULL, then it is mapped to registers.
   8  * Otherwise, if shared_tile is not NULL, it is mapped to shared memory.
   9  * Otherwise, it is accessed from global memory.
  10  * Note that if both private_tile and shared_tile are set, then shared_tile
  11  * is only used inside group_common_shared_memory_tile.
  12  * "depth" reflects the number of schedule dimensions that affect the tile
  13  * (private_tile if set; shared_tile if shared_tile is set and private_tile
  14  * is not).  The copying into and/or out of the tile is performed at that
  15  * depth.
  16  */
  17 struct gpu_array_ref_group {
  18         /* The references in this group access this local array. */
  19         struct gpu_local_array_info *local_array;
  20         /* This is the corresponding array. */
  21         struct gpu_array_info *array;
  22         /* Position of this group in the list of reference groups of array. */
  23         int nr;
  24
  25         /* The following fields are use during the construction of the groups.
  26          * access is the combined access relation relative to the shared
  27          * memory tiling.  In particular, the domain of the map corresponds
  28          * to the first shared_len dimensions of the computed schedule.
  29          * write is set if any access in the group is a write.
  30          * exact_write is set if all writes are definite writes.
  31          * slice is set if there is at least one access in the group
  32          * that refers to more than one element
  33          */
  34         isl_map *access;
  35         int write;
  36         int exact_write;
  37         int slice;
  38
  39         /* The shared memory tile, NULL if none. */
  40         struct gpu_array_tile *shared_tile;
  41
  42         /* The private memory tile, NULL if none. */
  43         struct gpu_array_tile *private_tile;
  44
  45         int depth;
  46
  47         /* References in this group; point to elements of a linked list. */
  48         int n_ref;
  49         struct gpu_stmt_access **refs;
  50 };
  51
  52 int gpu_group_references(struct gpu_gen *gen);
  53
  54 __isl_give isl_printer *gpu_array_ref_group_print_name(
  55         struct gpu_array_ref_group *group, __isl_take isl_printer *p);
  56 void gpu_array_ref_group_compute_tiling(struct gpu_array_ref_group *group);
  57 __isl_give isl_union_map *gpu_array_ref_group_access_relation(
  58         struct gpu_array_ref_group *group, int read, int write);
  59 int gpu_array_ref_group_requires_unroll(struct gpu_array_ref_group *group);
  60 struct gpu_array_tile *gpu_array_ref_group_tile(
  61         struct gpu_array_ref_group *group);
  62 struct gpu_array_ref_group *gpu_array_ref_group_free(
  63         struct gpu_array_ref_group *group);
  64
  65 #endif