do not map sliced accesses to shared/private memory
[ppcg.git] / gpu.h
bloba18eb7bc46b5c7b2035bdc716bde2abd5f2b26dc
1 #ifndef _GPU_H
2 #define _GPU_H
4 #include <isl/ast.h>
5 #include <isl/id_to_ast_expr.h>
7 #include "ppcg.h"
8 #include "ppcg_options.h"
10 /* Represents an outer array possibly accessed by a gpu_prog.
11 * If this outer array contains structures, then the references are not
12 * collected and the reference groups are not computed.
14 struct gpu_array_info {
15 /* The array data space. */
16 isl_space *space;
17 /* Element type. */
18 char *type;
19 /* Element size. */
20 int size;
21 /* Name of the array. */
22 char *name;
23 /* Extent of the array that needs to be copied. */
24 isl_set *extent;
25 /* Number of indices. */
26 unsigned n_index;
27 /* For each index, a bound on "extent" in that direction. */
28 isl_pw_aff **bound;
30 /* All references to this array; point to elements of a linked list. */
31 int n_ref;
32 struct gpu_stmt_access **refs;
34 /* The reference groups associated to this array. */
35 int n_group;
36 struct gpu_array_ref_group **groups;
38 /* Is this a scalar that is read-only within the entire program? */
39 int read_only_scalar;
41 /* Are the elements of the array structures? */
42 int has_compound_element;
44 /* Is the array local to the scop? */
45 int local;
47 /* Should the array be linearized? */
48 int linearize;
50 /* Order dependences on this array.
51 * Only used if live_range_reordering option is set.
52 * It is set to NULL otherwise.
54 isl_union_map *dep_order;
55 /* Should the array (scalar) be forcibly mapped to a register? */
56 int force_private;
59 /* For each index i with 0 <= i < n_index,
60 * bound[i] is equal to array->bound[i] specialized to the current kernel.
62 struct gpu_local_array_info {
63 unsigned n_index;
64 isl_pw_aff_list *bound;
67 __isl_give isl_ast_expr *gpu_local_array_info_linearize_index(
68 struct gpu_local_array_info *array, __isl_take isl_ast_expr *expr);
70 /* A sequence of "n" names of types.
72 struct gpu_types {
73 int n;
74 char **name;
77 /* "read" and "write" contain the original access relations, possibly
78 * involving member accesses.
80 * The elements of "array", as well as the ranges of "copy_in" and "copy_out"
81 * only refer to the outer arrays of any possible member accesses.
83 struct gpu_prog {
84 isl_ctx *ctx;
86 struct ppcg_scop *scop;
88 /* Set of parameter values */
89 isl_set *context;
91 /* All potential read accesses in the entire program */
92 isl_union_map *read;
94 /* All potential write accesses in the entire program */
95 isl_union_map *may_write;
96 /* All definite write accesses in the entire program */
97 isl_union_map *must_write;
99 /* Set of outer array elements that need to be copied in. */
100 isl_union_set *copy_in;
101 /* Set of outer array elements that need to be copied out. */
102 isl_union_set *copy_out;
104 /* A mapping from all innermost arrays to their outer arrays. */
105 isl_union_map *to_outer;
106 /* A mapping from the outer arrays to all corresponding inner arrays. */
107 isl_union_map *to_inner;
109 /* Order dependences on non-scalars. */
110 isl_union_map *array_order;
112 /* Array of statements */
113 int n_stmts;
114 struct gpu_stmt *stmts;
116 int n_array;
117 struct gpu_array_info *array;
120 enum ppcg_kernel_access_type {
121 ppcg_access_global,
122 ppcg_access_shared,
123 ppcg_access_private
126 enum ppcg_kernel_stmt_type {
127 ppcg_kernel_copy,
128 ppcg_kernel_domain,
129 ppcg_kernel_sync
132 /* Representation of special statements, in particular copy statements
133 * and __syncthreads statements, inside a kernel.
135 * type represents the kind of statement
138 * for ppcg_kernel_copy statements we have
140 * read is set if the statement should copy data from global memory
141 * to shared memory or registers.
143 * index expresses an access to the array element that needs to be copied
144 * local_index expresses the corresponding element in the tile
146 * array refers to the original array being copied
147 * local_array is a pointer to the appropriate element in the "array"
148 * array of the ppcg_kernel to which this copy access belongs
151 * for ppcg_kernel_domain statements we have
153 * stmt is the corresponding input statement
155 * n_access is the number of accesses in stmt
156 * access is an array of local information about the accesses
158 struct ppcg_kernel_stmt {
159 enum ppcg_kernel_stmt_type type;
161 union {
162 struct {
163 int read;
164 isl_ast_expr *index;
165 isl_ast_expr *local_index;
166 struct gpu_array_info *array;
167 struct gpu_local_array_info *local_array;
168 } c;
169 struct {
170 struct gpu_stmt *stmt;
171 isl_id_to_ast_expr *ref2expr;
172 } d;
173 } u;
176 /* Representation of a local variable in a kernel.
178 struct ppcg_kernel_var {
179 struct gpu_array_info *array;
180 enum ppcg_kernel_access_type type;
181 char *name;
182 isl_vec *size;
185 /* Representation of a kernel.
187 * id is the sequence number of the kernel.
189 * the first n_block elements of block_dim represent the effective size
190 * of the block.
192 * grid_size reflects the effective grid size.
194 * context is a parametric set containing the values of the parameters
195 * for which this kernel may be run.
197 * arrays is the set of possibly accessed outer array elements.
199 * space is the schedule space of the AST context. That is, it represents
200 * the loops of the generated host code containing the kernel launch.
202 * n_array is the total number of arrays in the input program and also
203 * the number of element in the array array.
204 * array contains information about each array that is local
205 * to the current kernel. If an array is not used in a kernel,
206 * then the corresponding entry does not contain any information.
208 struct ppcg_kernel {
209 int id;
211 int n_block;
212 int block_dim[3];
214 isl_multi_pw_aff *grid_size;
215 isl_set *context;
217 isl_union_set *arrays;
219 isl_space *space;
221 int n_array;
222 struct gpu_local_array_info *array;
224 int n_var;
225 struct ppcg_kernel_var *var;
227 isl_ast_node *tree;
230 int gpu_array_is_scalar(struct gpu_array_info *array);
231 int gpu_array_is_read_only_scalar(struct gpu_array_info *array);
232 __isl_give isl_set *gpu_array_positive_size_guard(struct gpu_array_info *array);
234 struct gpu_prog *gpu_prog_alloc(isl_ctx *ctx, struct ppcg_scop *scop);
235 void *gpu_prog_free(struct gpu_prog *prog);
237 int generate_gpu(isl_ctx *ctx, const char *input, FILE *out,
238 struct ppcg_options *options,
239 __isl_give isl_printer *(*print)(__isl_take isl_printer *p,
240 struct gpu_prog *prog, __isl_keep isl_ast_node *tree,
241 struct gpu_types *types, void *user), void *user);
243 #endif