src/flash/nand.h

   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Partially based on linux/include/linux/mtd/nand.h                     *
   6  *   Copyright (C) 2000 David Woodhouse <dwmw2@mvhi.com>                   *
   7  *   Copyright (C) 2000 Steven J. Hill <sjhill@realitydiluted.com>         *
   8  *   Copyright (C) 2000 Thomas Gleixner <tglx@linutronix.de>               *
   9  *                                                                         *
  10  *   This program is free software; you can redistribute it and/or modify  *
  11  *   it under the terms of the GNU General Public License as published by  *
  12  *   the Free Software Foundation; either version 2 of the License, or     *
  13  *   (at your option) any later version.                                   *
  14  *                                                                         *
  15  *   This program is distributed in the hope that it will be useful,       *
  16  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  *   GNU General Public License for more details.                          *
  19  *                                                                         *
  20  *   You should have received a copy of the GNU General Public License     *
  21  *   along with this program; if not, write to the                         *
  22  *   Free Software Foundation, Inc.,                                       *
  23  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  ***************************************************************************/
  25 #ifndef NAND_H
  26 #define NAND_H
  27
  28 #include <flash/common.h>
  29 // to be removed later
  30 #include <target/target.h>
  31
  32 struct nand_device;
  33
  34 #define __NAND_DEVICE_COMMAND(name) \
  35                 COMMAND_HELPER(name, struct nand_device *nand)
  36
  37 /**
  38  * Interface for NAND flash controllers.  Not all of these functions are
  39  * required for full functionality of the NAND driver, but better performance
  40  * can be achieved by implementing each function.
  41  */
  42 struct nand_flash_controller
  43 {
  44         /** Driver name that is used to select it from configuration files. */
  45         char *name;
  46
  47     const struct command_registration *commands;
  48
  49         /** NAND device command called when driver is instantiated during configuration. */
  50         __NAND_DEVICE_COMMAND((*nand_device_command));
  51
  52         /** Register controller specific commands as a TCL interface to the driver. */
  53         int (*register_commands)(struct command_context *cmd_ctx);
  54
  55         /** Initialize the NAND device. */
  56         int (*init)(struct nand_device *nand);
  57
  58         /** Reset the NAND device. */
  59         int (*reset)(struct nand_device *nand);
  60
  61         /** Issue a command to the NAND device. */
  62         int (*command)(struct nand_device *nand, uint8_t command);
  63
  64         /** Write an address to the NAND device. */
  65         int (*address)(struct nand_device *nand, uint8_t address);
  66
  67         /** Write word of data to the NAND device. */
  68         int (*write_data)(struct nand_device *nand, uint16_t data);
  69
  70         /** Read word of data from the NAND device. */
  71         int (*read_data)(struct nand_device *nand, void *data);
  72
  73         /** Write a block of data to the NAND device. */
  74         int (*write_block_data)(struct nand_device *nand, uint8_t *data, int size);
  75
  76         /** Read a block of data from the NAND device. */
  77         int (*read_block_data)(struct nand_device *nand, uint8_t *data, int size);
  78
  79         /** Write a page to the NAND device. */
  80         int (*write_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
  81
  82         /** Read a page from the NAND device. */
  83         int (*read_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
  84
  85         /** Check if the controller is ready for more instructions with timeout. */
  86         int (*controller_ready)(struct nand_device *nand, int timeout);
  87
  88         /** Check if the NAND device is ready for more instructions with timeout. */
  89         int (*nand_ready)(struct nand_device *nand, int timeout);
  90 };
  91
  92 #define NAND_DEVICE_COMMAND_HANDLER(name) static __NAND_DEVICE_COMMAND(name)
  93
  94 /**
  95  * Representation of a single NAND block in a NAND device.
  96  */
  97 struct nand_block
  98 {
  99         /** Offset to the block. */
 100         uint32_t offset;
 101
 102         /** Size of the block. */
 103         uint32_t size;
 104
 105         /** True if the block has been erased. */
 106         int is_erased;
 107
 108         /** True if the block is bad. */
 109         int is_bad;
 110 };
 111
 112 struct nand_oobfree {
 113         int offset;
 114         int length;
 115 };
 116
 117 struct nand_ecclayout {
 118         int eccbytes;
 119         int eccpos[64];
 120         int oobavail;
 121         struct nand_oobfree oobfree[2];
 122 };
 123
 124 struct nand_device
 125 {
 126         char *name;
 127         struct nand_flash_controller *controller;
 128         void *controller_priv;
 129         struct nand_manufacturer *manufacturer;
 130         struct nand_info *device;
 131         int bus_width;
 132         int address_cycles;
 133         int page_size;
 134         int erase_size;
 135         int use_raw;
 136         int num_blocks;
 137         struct nand_block *blocks;
 138         struct nand_device *next;
 139 };
 140
 141 /* NAND Flash Manufacturer ID Codes
 142  */
 143 enum
 144 {
 145         NAND_MFR_TOSHIBA = 0x98,
 146         NAND_MFR_SAMSUNG = 0xec,
 147         NAND_MFR_FUJITSU = 0x04,
 148         NAND_MFR_NATIONAL = 0x8f,
 149         NAND_MFR_RENESAS = 0x07,
 150         NAND_MFR_STMICRO = 0x20,
 151         NAND_MFR_HYNIX = 0xad,
 152         NAND_MFR_MICRON = 0x2c,
 153 };
 154
 155 struct nand_manufacturer
 156 {
 157         int id;
 158         char *name;
 159 };
 160
 161 struct nand_info
 162 {
 163         char *name;
 164         int id;
 165         int page_size;
 166         int chip_size;
 167         int erase_size;
 168         int options;
 169 };
 170
 171 /* Option constants for bizarre disfunctionality and real features
 172  */
 173 enum {
 174         /* Chip can not auto increment pages */
 175         NAND_NO_AUTOINCR = 0x00000001,
 176
 177         /* Buswitdh is 16 bit */
 178         NAND_BUSWIDTH_16 = 0x00000002,
 179
 180         /* Device supports partial programming without padding */
 181         NAND_NO_PADDING = 0x00000004,
 182
 183         /* Chip has cache program function */
 184         NAND_CACHEPRG = 0x00000008,
 185
 186         /* Chip has copy back function */
 187         NAND_COPYBACK = 0x00000010,
 188
 189         /* AND Chip which has 4 banks and a confusing page / block
 190          * assignment. See Renesas datasheet for further information */
 191         NAND_IS_AND = 0x00000020,
 192
 193         /* Chip has a array of 4 pages which can be read without
 194          * additional ready /busy waits */
 195         NAND_4PAGE_ARRAY = 0x00000040,
 196
 197         /* Chip requires that BBT is periodically rewritten to prevent
 198          * bits from adjacent blocks from 'leaking' in altering data.
 199          * This happens with the Renesas AG-AND chips, possibly others.  */
 200         BBT_AUTO_REFRESH = 0x00000080,
 201
 202         /* Chip does not require ready check on read. True
 203          * for all large page devices, as they do not support
 204          * autoincrement.*/
 205         NAND_NO_READRDY = 0x00000100,
 206
 207         /* Options valid for Samsung large page devices */
 208         NAND_SAMSUNG_LP_OPTIONS = (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK),
 209
 210         /* Options for new chips with large page size. The pagesize and the
 211          * erasesize is determined from the extended id bytes
 212          */
 213         LP_OPTIONS = (NAND_SAMSUNG_LP_OPTIONS | NAND_NO_READRDY | NAND_NO_AUTOINCR),
 214         LP_OPTIONS16 = (LP_OPTIONS | NAND_BUSWIDTH_16),
 215 };
 216
 217 enum
 218 {
 219         /* Standard NAND flash commands */
 220         NAND_CMD_READ0 = 0x0,
 221         NAND_CMD_READ1 = 0x1,
 222         NAND_CMD_RNDOUT = 0x5,
 223         NAND_CMD_PAGEPROG = 0x10,
 224         NAND_CMD_READOOB = 0x50,
 225         NAND_CMD_ERASE1 = 0x60,
 226         NAND_CMD_STATUS = 0x70,
 227         NAND_CMD_STATUS_MULTI = 0x71,
 228         NAND_CMD_SEQIN = 0x80,
 229         NAND_CMD_RNDIN = 0x85,
 230         NAND_CMD_READID = 0x90,
 231         NAND_CMD_ERASE2 = 0xd0,
 232         NAND_CMD_RESET = 0xff,
 233
 234         /* Extended commands for large page devices */
 235         NAND_CMD_READSTART = 0x30,
 236         NAND_CMD_RNDOUTSTART = 0xE0,
 237         NAND_CMD_CACHEDPROG = 0x15,
 238 };
 239
 240 /* Status bits */
 241 enum
 242 {
 243         NAND_STATUS_FAIL = 0x01,
 244         NAND_STATUS_FAIL_N1 = 0x02,
 245         NAND_STATUS_TRUE_READY = 0x20,
 246         NAND_STATUS_READY = 0x40,
 247         NAND_STATUS_WP = 0x80,
 248 };
 249
 250 /* OOB (spare) data formats */
 251 enum oob_formats
 252 {
 253         NAND_OOB_NONE = 0x0,    /* no OOB data at all */
 254         NAND_OOB_RAW = 0x1,             /* raw OOB data (16 bytes for 512b page sizes, 64 bytes for 2048b page sizes) */
 255         NAND_OOB_ONLY = 0x2,    /* only OOB data */
 256         NAND_OOB_SW_ECC = 0x10, /* when writing, use SW ECC (as opposed to no ECC) */
 257         NAND_OOB_HW_ECC = 0x20, /* when writing, use HW ECC (as opposed to no ECC) */
 258         NAND_OOB_SW_ECC_KW = 0x40, /* when writing, use Marvell's Kirkwood bootrom format */
 259         NAND_OOB_JFFS2 = 0x100, /* when writing, use JFFS2 OOB layout */
 260         NAND_OOB_YAFFS2 = 0x100,/* when writing, use YAFFS2 OOB layout */
 261 };
 262
 263
 264 /**
 265  * Returns the flash bank specified by @a name, which matches the
 266  * driver name and a suffix (option) specify the driver-specific
 267  * bank number. The suffix consists of the '.' and the driver-specific
 268  * bank number: when two davinci banks are defined, then 'davinci.1' refers
 269  * to the second (e.g. DM355EVM).
 270  */
 271 struct nand_device *get_nand_device_by_name(const char *name);
 272
 273 struct nand_device *get_nand_device_by_num(int num);
 274
 275 int nand_page_command(struct nand_device *nand, uint32_t page,
 276                 uint8_t cmd, bool oob_only);
 277
 278 int nand_read_page_raw(struct nand_device *nand, uint32_t page,
 279                 uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
 280 int nand_write_page_raw(struct nand_device *nand, uint32_t page,
 281                 uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
 282
 283 int nand_read_status(struct nand_device *nand, uint8_t *status);
 284
 285 int nand_calculate_ecc(struct nand_device *nand,
 286                 const uint8_t *dat, uint8_t *ecc_code);
 287 int nand_calculate_ecc_kw(struct nand_device *nand,
 288                 const uint8_t *dat, uint8_t *ecc_code);
 289
 290 int nand_register_commands(struct command_context *cmd_ctx);
 291 int nand_init(struct command_context *cmd_ctx);
 292
 293 /// helper for parsing a nand device command argument string
 294 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 295                 struct nand_device **nand);
 296
 297
 298 #define         ERROR_NAND_DEVICE_INVALID               (-1100)
 299 #define         ERROR_NAND_OPERATION_FAILED             (-1101)
 300 #define         ERROR_NAND_OPERATION_TIMEOUT    (-1102)
 301 #define         ERROR_NAND_OPERATION_NOT_SUPPORTED      (-1103)
 302 #define         ERROR_NAND_DEVICE_NOT_PROBED    (-1104)
 303 #define         ERROR_NAND_ERROR_CORRECTION_FAILED      (-1105)
 304 #define         ERROR_NAND_NO_BUFFER                    (-1106)
 305
 306 #endif /* NAND_H */