src/target/xscale.h

   1 /***************************************************************************
   2  *   Copyright (C) 2005 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
   6  *   oyvind.harboe@zylin.com                                               *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program; if not, write to the                         *
  20  *   Free Software Foundation, Inc.,                                       *
  21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  22  ***************************************************************************/
  23 #ifndef XSCALE_H
  24 #define XSCALE_H
  25
  26 #include <target/arm.h>
  27 #include <target/armv4_5_mmu.h>
  28 #include <target/trace.h>
  29
  30 #define XSCALE_COMMON_MAGIC 0x58534341
  31
  32 /* These four JTAG instructions are architecturally defined.
  33  * Lengths are core-specific; originally 5 bits, later 7.
  34  */
  35 #define XSCALE_DBGRX    0x02
  36 #define XSCALE_DBGTX    0x10
  37 #define XSCALE_LDIC     0x07
  38 #define XSCALE_SELDCSR  0x09
  39
  40 /* Possible CPU types */
  41 #define XSCALE_IXP4XX_PXA2XX    0x0
  42 #define XSCALE_PXA3XX           0x4
  43
  44 enum xscale_debug_reason
  45 {
  46         XSCALE_DBG_REASON_GENERIC,
  47         XSCALE_DBG_REASON_RESET,
  48         XSCALE_DBG_REASON_TB_FULL,
  49 };
  50
  51 enum xscale_trace_entry_type
  52 {
  53         XSCALE_TRACE_MESSAGE = 0x0,
  54         XSCALE_TRACE_ADDRESS = 0x1,
  55 };
  56
  57 struct xscale_trace_entry
  58 {
  59         uint8_t data;
  60         enum xscale_trace_entry_type type;
  61 };
  62
  63 struct xscale_trace_data
  64 {
  65         struct xscale_trace_entry *entries;
  66         int depth;
  67         uint32_t chkpt0;
  68         uint32_t chkpt1;
  69         uint32_t last_instruction;
  70         struct xscale_trace_data *next;
  71 };
  72
  73 struct xscale_trace
  74 {
  75         trace_status_t capture_status;  /* current state of capture run */
  76         struct image *image;                                    /* source for target opcodes */
  77         struct xscale_trace_data *data;         /* linked list of collected trace data */
  78         int buffer_enabled;                             /* whether trace buffer is enabled */
  79         int buffer_fill;                                /* maximum number of trace runs to read (-1 for wrap-around) */
  80         int pc_ok;
  81         uint32_t current_pc;
  82         enum arm_state core_state;      /* current core state (ARM, Thumb) */
  83 };
  84
  85 struct xscale_common
  86 {
  87         /* armv4/5 common stuff */
  88         struct arm armv4_5_common;
  89
  90         int common_magic;
  91
  92         /* XScale registers (CP15, DBG) */
  93         struct reg_cache *reg_cache;
  94
  95         /* current state of the debug handler */
  96         uint32_t handler_address;
  97
  98         /* target-endian buffers with exception vectors */
  99         uint32_t low_vectors[8];
 100         uint32_t high_vectors[8];
 101
 102         /* static low vectors */
 103         uint8_t static_low_vectors_set; /* bit field with static vectors set by the user */
 104         uint8_t static_high_vectors_set; /* bit field with static vectors set by the user */
 105         uint32_t static_low_vectors[8];
 106         uint32_t static_high_vectors[8];
 107
 108         /* DCache cleaning */
 109         uint32_t cache_clean_address;
 110
 111         /* whether hold_rst and ext_dbg_break should be set */
 112         int hold_rst;
 113         int external_debug_break;
 114
 115         /* breakpoint / watchpoint handling */
 116         int dbr_available;
 117         int dbr0_used;
 118         int dbr1_used;
 119         int ibcr_available;
 120         int ibcr0_used;
 121         int     ibcr1_used;
 122         uint32_t arm_bkpt;
 123         uint16_t thumb_bkpt;
 124
 125         uint8_t vector_catch;
 126
 127         struct xscale_trace trace;
 128
 129         int arch_debug_reason;
 130
 131         /* MMU/Caches */
 132         struct armv4_5_mmu_common armv4_5_mmu;
 133         uint32_t cp15_control_reg;
 134
 135         int fast_memory_access;
 136
 137         /* CPU variant */
 138         int xscale_variant;
 139 };
 140
 141 static inline struct xscale_common *
 142 target_to_xscale(struct target *target)
 143 {
 144         return container_of(target->arch_info, struct xscale_common,
 145                         armv4_5_common);
 146 }
 147
 148 struct xscale_reg
 149 {
 150         int dbg_handler_number;
 151         struct target *target;
 152 };
 153
 154 enum
 155 {
 156         XSCALE_MAINID,          /* 0 */
 157         XSCALE_CACHETYPE,
 158         XSCALE_CTRL,
 159         XSCALE_AUXCTRL,
 160         XSCALE_TTB,
 161         XSCALE_DAC,
 162         XSCALE_FSR,
 163         XSCALE_FAR,
 164         XSCALE_PID,
 165         XSCALE_CPACCESS,
 166         XSCALE_IBCR0,           /* 10 */
 167         XSCALE_IBCR1,
 168         XSCALE_DBR0,
 169         XSCALE_DBR1,
 170         XSCALE_DBCON,
 171         XSCALE_TBREG,
 172         XSCALE_CHKPT0,
 173         XSCALE_CHKPT1,
 174         XSCALE_DCSR,
 175         XSCALE_TX,
 176         XSCALE_RX,                      /* 20 */
 177         XSCALE_TXRXCTRL,
 178 };
 179
 180 #define ERROR_XSCALE_NO_TRACE_DATA      (-1500)
 181
 182 #endif /* XSCALE_H */