1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
3 * Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
5 * Partially based on linux/include/linux/mtd/nand.h *
6 * Copyright (C) 2000 David Woodhouse <dwmw2@mvhi.com> *
7 * Copyright (C) 2000 Steven J. Hill <sjhill@realitydiluted.com> *
8 * Copyright (C) 2000 Thomas Gleixner <tglx@linutronix.de> *
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
24 ***************************************************************************/
25 #ifndef FLASH_NAND_CORE_H
26 #define FLASH_NAND_CORE_H
28 #include <flash/common.h>
31 * Representation of a single NAND block in a NAND device.
35 /** Offset to the block. */
38 /** Size of the block. */
41 /** True if the block has been erased. */
44 /** True if the block is bad. */
53 struct nand_ecclayout
{
57 struct nand_oobfree oobfree
[2];
63 struct nand_flash_controller
*controller
;
64 void *controller_priv
;
65 struct nand_manufacturer
*manufacturer
;
66 struct nand_info
*device
;
73 struct nand_block
*blocks
;
74 struct nand_device
*next
;
77 /* NAND Flash Manufacturer ID Codes
81 NAND_MFR_TOSHIBA
= 0x98,
82 NAND_MFR_SAMSUNG
= 0xec,
83 NAND_MFR_FUJITSU
= 0x04,
84 NAND_MFR_NATIONAL
= 0x8f,
85 NAND_MFR_RENESAS
= 0x07,
86 NAND_MFR_STMICRO
= 0x20,
87 NAND_MFR_HYNIX
= 0xad,
88 NAND_MFR_MICRON
= 0x2c,
91 struct nand_manufacturer
107 /* Option constants for bizarre disfunctionality and real features
110 /* Chip can not auto increment pages */
111 NAND_NO_AUTOINCR
= 0x00000001,
113 /* Buswitdh is 16 bit */
114 NAND_BUSWIDTH_16
= 0x00000002,
116 /* Device supports partial programming without padding */
117 NAND_NO_PADDING
= 0x00000004,
119 /* Chip has cache program function */
120 NAND_CACHEPRG
= 0x00000008,
122 /* Chip has copy back function */
123 NAND_COPYBACK
= 0x00000010,
125 /* AND Chip which has 4 banks and a confusing page / block
126 * assignment. See Renesas datasheet for further information */
127 NAND_IS_AND
= 0x00000020,
129 /* Chip has a array of 4 pages which can be read without
130 * additional ready /busy waits */
131 NAND_4PAGE_ARRAY
= 0x00000040,
133 /* Chip requires that BBT is periodically rewritten to prevent
134 * bits from adjacent blocks from 'leaking' in altering data.
135 * This happens with the Renesas AG-AND chips, possibly others. */
136 BBT_AUTO_REFRESH
= 0x00000080,
138 /* Chip does not require ready check on read. True
139 * for all large page devices, as they do not support
141 NAND_NO_READRDY
= 0x00000100,
143 /* Options valid for Samsung large page devices */
144 NAND_SAMSUNG_LP_OPTIONS
= (NAND_NO_PADDING
| NAND_CACHEPRG
| NAND_COPYBACK
),
146 /* Options for new chips with large page size. The pagesize and the
147 * erasesize is determined from the extended id bytes
149 LP_OPTIONS
= (NAND_SAMSUNG_LP_OPTIONS
| NAND_NO_READRDY
| NAND_NO_AUTOINCR
),
150 LP_OPTIONS16
= (LP_OPTIONS
| NAND_BUSWIDTH_16
),
155 /* Standard NAND flash commands */
156 NAND_CMD_READ0
= 0x0,
157 NAND_CMD_READ1
= 0x1,
158 NAND_CMD_RNDOUT
= 0x5,
159 NAND_CMD_PAGEPROG
= 0x10,
160 NAND_CMD_READOOB
= 0x50,
161 NAND_CMD_ERASE1
= 0x60,
162 NAND_CMD_STATUS
= 0x70,
163 NAND_CMD_STATUS_MULTI
= 0x71,
164 NAND_CMD_SEQIN
= 0x80,
165 NAND_CMD_RNDIN
= 0x85,
166 NAND_CMD_READID
= 0x90,
167 NAND_CMD_ERASE2
= 0xd0,
168 NAND_CMD_RESET
= 0xff,
170 /* Extended commands for large page devices */
171 NAND_CMD_READSTART
= 0x30,
172 NAND_CMD_RNDOUTSTART
= 0xE0,
173 NAND_CMD_CACHEDPROG
= 0x15,
179 NAND_STATUS_FAIL
= 0x01,
180 NAND_STATUS_FAIL_N1
= 0x02,
181 NAND_STATUS_TRUE_READY
= 0x20,
182 NAND_STATUS_READY
= 0x40,
183 NAND_STATUS_WP
= 0x80,
186 /* OOB (spare) data formats */
189 NAND_OOB_NONE
= 0x0, /* no OOB data at all */
190 NAND_OOB_RAW
= 0x1, /* raw OOB data (16 bytes for 512b page sizes, 64 bytes for 2048b page sizes) */
191 NAND_OOB_ONLY
= 0x2, /* only OOB data */
192 NAND_OOB_SW_ECC
= 0x10, /* when writing, use SW ECC (as opposed to no ECC) */
193 NAND_OOB_HW_ECC
= 0x20, /* when writing, use HW ECC (as opposed to no ECC) */
194 NAND_OOB_SW_ECC_KW
= 0x40, /* when writing, use Marvell's Kirkwood bootrom format */
195 NAND_OOB_JFFS2
= 0x100, /* when writing, use JFFS2 OOB layout */
196 NAND_OOB_YAFFS2
= 0x100,/* when writing, use YAFFS2 OOB layout */
200 struct nand_device
*get_nand_device_by_num(int num
);
202 int nand_page_command(struct nand_device
*nand
, uint32_t page
,
203 uint8_t cmd
, bool oob_only
);
205 int nand_read_data_page(struct nand_device
*nand
, uint8_t *data
, uint32_t size
);
206 int nand_write_data_page(struct nand_device
*nand
,
207 uint8_t *data
, uint32_t size
);
209 int nand_write_finish(struct nand_device
*nand
);
211 int nand_read_page_raw(struct nand_device
*nand
, uint32_t page
,
212 uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
213 int nand_write_page_raw(struct nand_device
*nand
, uint32_t page
,
214 uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
216 int nand_read_status(struct nand_device
*nand
, uint8_t *status
);
218 int nand_calculate_ecc(struct nand_device
*nand
,
219 const uint8_t *dat
, uint8_t *ecc_code
);
220 int nand_calculate_ecc_kw(struct nand_device
*nand
,
221 const uint8_t *dat
, uint8_t *ecc_code
);
223 int nand_register_commands(struct command_context
*cmd_ctx
);
225 /// helper for parsing a nand device command argument string
226 COMMAND_HELPER(nand_command_get_device
, unsigned name_index
,
227 struct nand_device
**nand
);
230 #define ERROR_NAND_DEVICE_INVALID (-1100)
231 #define ERROR_NAND_OPERATION_FAILED (-1101)
232 #define ERROR_NAND_OPERATION_TIMEOUT (-1102)
233 #define ERROR_NAND_OPERATION_NOT_SUPPORTED (-1103)
234 #define ERROR_NAND_DEVICE_NOT_PROBED (-1104)
235 #define ERROR_NAND_ERROR_CORRECTION_FAILED (-1105)
236 #define ERROR_NAND_NO_BUFFER (-1106)
238 #endif // FLASH_NAND_CORE_H