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Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - trivial fixes
[openocd/cmsis-dap.git] / src / flash / nor / em357.c
bloba62be6afa5280855bd83461d534227fc10030ec0
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 *
8 * Copyright (C) 2011 by Erik Botö
9 * erik.boto@pelagicore.com
10 *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
15 * *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
20 * *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc., *
24 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 ***************************************************************************/
26 #ifdef HAVE_CONFIG_H
27 #include "config.h"
28 #endif
29
30 #include "imp.h"
31 #include <helper/binarybuffer.h>
32 #include <target/algorithm.h>
33 #include <target/armv7m.h>
34
35 /* em357 register locations */
36
37 #define EM357_FLASH_ACR 0x40008000
38 #define EM357_FLASH_KEYR 0x40008004
39 #define EM357_FLASH_OPTKEYR 0x40008008
40 #define EM357_FLASH_SR 0x4000800C
41 #define EM357_FLASH_CR 0x40008010
42 #define EM357_FLASH_AR 0x40008014
43 #define EM357_FLASH_OBR 0x4000801C
44 #define EM357_FLASH_WRPR 0x40008020
45
46 #define EM357_FPEC_CLK 0x4000402c
47 /* option byte location */
48
49 #define EM357_OB_RDP 0x08040800
50 #define EM357_OB_WRP0 0x08040808
51 #define EM357_OB_WRP1 0x0804080A
52 #define EM357_OB_WRP2 0x0804080C
53
54 /* FLASH_CR register bits */
55
56 #define FLASH_PG (1 << 0)
57 #define FLASH_PER (1 << 1)
58 #define FLASH_MER (1 << 2)
59 #define FLASH_OPTPG (1 << 4)
60 #define FLASH_OPTER (1 << 5)
61 #define FLASH_STRT (1 << 6)
62 #define FLASH_LOCK (1 << 7)
63 #define FLASH_OPTWRE (1 << 9)
64
65 /* FLASH_SR register bits */
66
67 #define FLASH_BSY (1 << 0)
68 #define FLASH_PGERR (1 << 2)
69 #define FLASH_WRPRTERR (1 << 4)
70 #define FLASH_EOP (1 << 5)
71
72 /* EM357_FLASH_OBR bit definitions (reading) */
73
74 #define OPT_ERROR 0
75 #define OPT_READOUT 1
76
77 /* register unlock keys */
78
79 #define KEY1 0x45670123
80 #define KEY2 0xCDEF89AB
81
82 struct em357_options
83 {
84 uint16_t RDP;
85 uint16_t user_options;
86 uint16_t protection[3];
87 };
88
89 struct em357_flash_bank
90 {
91 struct em357_options option_bytes;
92 struct working_area *write_algorithm;
93 int ppage_size;
94 int probed;
95 };
96
97 static int em357_mass_erase(struct flash_bank *bank);
98
99 /* flash bank em357 <base> <size> 0 0 <target#>
100 */
101 FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command)
102 {
103 struct em357_flash_bank *em357_info;
104
105 if (CMD_ARGC < 6)
106 {
107 LOG_WARNING("incomplete flash_bank em357 configuration");
108 return ERROR_FLASH_BANK_INVALID;
109 }
110
111 em357_info = malloc(sizeof(struct em357_flash_bank));
112 bank->driver_priv = em357_info;
113
114 em357_info->write_algorithm = NULL;
115 em357_info->probed = 0;
116
117 return ERROR_OK;
118 }
119
120 static inline int em357_get_flash_status(struct flash_bank *bank, uint32_t *status)
121 {
122 struct target *target = bank->target;
123 return target_read_u32(target, EM357_FLASH_SR, status);
124 }
125
126 static int em357_wait_status_busy(struct flash_bank *bank, int timeout)
127 {
128 struct target *target = bank->target;
129 uint32_t status;
130 int retval = ERROR_OK;
131
132 /* wait for busy to clear */
133 for (;;)
134 {
135 retval = em357_get_flash_status(bank, &status);
136 if (retval != ERROR_OK)
137 return retval;
138 LOG_DEBUG("status: 0x%" PRIx32 "", status);
139 if ((status & FLASH_BSY) == 0)
140 break;
141 if (timeout-- <= 0)
142 {
143 LOG_ERROR("timed out waiting for flash");
144 return ERROR_FAIL;
145 }
146 alive_sleep(1);
147 }
148
149 if (status & FLASH_WRPRTERR)
150 {
151 LOG_ERROR("em357 device protected");
152 retval = ERROR_FAIL;
153 }
154
155 if (status & FLASH_PGERR)
156 {
157 LOG_ERROR("em357 device programming failed");
158 retval = ERROR_FAIL;
159 }
160
161 /* Clear but report errors */
162 if (status & (FLASH_WRPRTERR | FLASH_PGERR))
163 {
164 /* If this operation fails, we ignore it and report the original
165 * retval
166 */
167 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR);
168 }
169 return retval;
170 }
171
172 static int em357_read_options(struct flash_bank *bank)
173 {
174 uint32_t optiondata;
175 struct em357_flash_bank *em357_info = NULL;
176 struct target *target = bank->target;
177
178 em357_info = bank->driver_priv;
179
180 /* read current option bytes */
181 int retval = target_read_u32(target, EM357_FLASH_OBR, &optiondata);
182 if (retval != ERROR_OK)
183 return retval;
184
185 em357_info->option_bytes.user_options = (uint16_t)0xFFFC | ((optiondata >> 2) & 0x03);
186 em357_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
187
188 if (optiondata & (1 << OPT_READOUT))
189 LOG_INFO("Device Security Bit Set");
190
191 /* each bit refers to a 4bank protection */
192 retval = target_read_u32(target, EM357_FLASH_WRPR, &optiondata);
193 if (retval != ERROR_OK)
194 return retval;
195
196 em357_info->option_bytes.protection[0] = (uint16_t)optiondata;
197 em357_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
198 em357_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
199
200 return ERROR_OK;
201 }
202
203 static int em357_erase_options(struct flash_bank *bank)
204 {
205 struct em357_flash_bank *em357_info = NULL;
206 struct target *target = bank->target;
207
208 em357_info = bank->driver_priv;
209
210 /* read current options */
211 em357_read_options(bank);
212
213 /* unlock flash registers */
214 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
215 if (retval != ERROR_OK)
216 return retval;
217
218 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
219 if (retval != ERROR_OK)
220 return retval;
221
222 /* unlock option flash registers */
223 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
224 if (retval != ERROR_OK)
225 return retval;
226 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
227 if (retval != ERROR_OK)
228 return retval;
229
230 /* erase option bytes */
231 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
232 if (retval != ERROR_OK)
233 return retval;
234 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
235 if (retval != ERROR_OK)
236 return retval;
237
238 retval = em357_wait_status_busy(bank, 10);
239 if (retval != ERROR_OK)
240 return retval;
241
242 /* clear readout protection and complementary option bytes
243 * this will also force a device unlock if set */
244 em357_info->option_bytes.RDP = 0x5AA5;
245
246 return ERROR_OK;
247 }
248
249 static int em357_write_options(struct flash_bank *bank)
250 {
251 struct em357_flash_bank *em357_info = NULL;
252 struct target *target = bank->target;
253
254 em357_info = bank->driver_priv;
255
256 /* unlock flash registers */
257 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
258 if (retval != ERROR_OK)
259 return retval;
260 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
261 if (retval != ERROR_OK)
262 return retval;
263
264 /* unlock option flash registers */
265 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
266 if (retval != ERROR_OK)
267 return retval;
268 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
269 if (retval != ERROR_OK)
270 return retval;
271
272 /* program option bytes */
273 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
274 if (retval != ERROR_OK)
275 return retval;
276
277 retval = em357_wait_status_busy(bank, 10);
278 if (retval != ERROR_OK)
279 return retval;
280
281 /* write protection byte 1 */
282 retval = target_write_u16(target, EM357_OB_WRP0, em357_info->option_bytes.protection[0]);
283 if (retval != ERROR_OK)
284 return retval;
285
286 retval = em357_wait_status_busy(bank, 10);
287 if (retval != ERROR_OK)
288 return retval;
289
290 /* write protection byte 2 */
291 retval = target_write_u16(target, EM357_OB_WRP1, em357_info->option_bytes.protection[1]);
292 if (retval != ERROR_OK)
293 return retval;
294
295 retval = em357_wait_status_busy(bank, 10);
296 if (retval != ERROR_OK)
297 return retval;
298
299 /* write protection byte 3 */
300 retval = target_write_u16(target, EM357_OB_WRP2, em357_info->option_bytes.protection[2]);
301 if (retval != ERROR_OK)
302 return retval;
303
304 retval = em357_wait_status_busy(bank, 10);
305 if (retval != ERROR_OK)
306 return retval;
307
308 /* write readout protection bit */
309 retval = target_write_u16(target, EM357_OB_RDP, em357_info->option_bytes.RDP);
310 if (retval != ERROR_OK)
311 return retval;
312
313 retval = em357_wait_status_busy(bank, 10);
314 if (retval != ERROR_OK)
315 return retval;
316
317 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
318 if (retval != ERROR_OK)
319 return retval;
320
321 return ERROR_OK;
322 }
323
324 static int em357_protect_check(struct flash_bank *bank)
325 {
326 struct target *target = bank->target;
327 struct em357_flash_bank *em357_info = bank->driver_priv;
328
329 uint32_t protection;
330 int i, s;
331 int num_bits;
332 int set;
333
334 if (target->state != TARGET_HALTED)
335 {
336 LOG_ERROR("Target not halted");
337 return ERROR_TARGET_NOT_HALTED;
338 }
339
340 /* each bit refers to a 4bank protection (bit 0-23) */
341 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
342 if (retval != ERROR_OK)
343 return retval;
344
345 /* each protection bit is for 4 * 2K pages */
346 num_bits = (bank->num_sectors / em357_info->ppage_size);
347
348 for (i = 0; i < num_bits; i++)
349 {
350 set = 1;
351 if (protection & (1 << i))
352 set = 0;
353
354 for (s = 0; s < em357_info->ppage_size; s++)
355 bank->sectors[(i * em357_info->ppage_size) + s].is_protected = set;
356 }
357
358 return ERROR_OK;
359 }
360
361 static int em357_erase(struct flash_bank *bank, int first, int last)
362 {
363 struct target *target = bank->target;
364 int i;
365
366 if (bank->target->state != TARGET_HALTED)
367 {
368 LOG_ERROR("Target not halted");
369 return ERROR_TARGET_NOT_HALTED;
370 }
371
372 if ((first == 0) && (last == (bank->num_sectors - 1)))
373 {
374 return em357_mass_erase(bank);
375 }
376
377 /* unlock flash registers */
378 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
379 if (retval != ERROR_OK)
380 return retval;
381 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
382 if (retval != ERROR_OK)
383 return retval;
384
385 for (i = first; i <= last; i++)
386 {
387 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER);
388 if (retval != ERROR_OK)
389 return retval;
390 retval = target_write_u32(target, EM357_FLASH_AR,
391 bank->base + bank->sectors[i].offset);
392 if (retval != ERROR_OK)
393 return retval;
394 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER | FLASH_STRT);
395 if (retval != ERROR_OK)
396 return retval;
397
398 retval = em357_wait_status_busy(bank, 100);
399 if (retval != ERROR_OK)
400 return retval;
401
402 bank->sectors[i].is_erased = 1;
403 }
404
405 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
406 if (retval != ERROR_OK)
407 return retval;
408
409 return ERROR_OK;
410 }
411
412 static int em357_protect(struct flash_bank *bank, int set, int first, int last)
413 {
414 struct em357_flash_bank *em357_info = NULL;
415 struct target *target = bank->target;
416 uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
417 int i, reg, bit;
418 int status;
419 uint32_t protection;
420
421 em357_info = bank->driver_priv;
422
423 if (target->state != TARGET_HALTED)
424 {
425 LOG_ERROR("Target not halted");
426 return ERROR_TARGET_NOT_HALTED;
427 }
428
429 if ((first % em357_info->ppage_size) != 0)
430 {
431 LOG_WARNING("aligned start protect sector to a %d sector boundary",
432 em357_info->ppage_size);
433 first = first - (first % em357_info->ppage_size);
434 }
435 if (((last + 1) % em357_info->ppage_size) != 0)
436 {
437 LOG_WARNING("aligned end protect sector to a %d sector boundary",
438 em357_info->ppage_size);
439 last++;
440 last = last - (last % em357_info->ppage_size);
441 last--;
442 }
443
444 /* each bit refers to a 4bank protection */
445 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
446 if (retval != ERROR_OK)
447 return retval;
448
449 prot_reg[0] = (uint16_t)protection;
450 prot_reg[1] = (uint16_t)(protection >> 8);
451 prot_reg[2] = (uint16_t)(protection >> 16);
452
453 for (i = first; i <= last; i++)
454 {
455 reg = (i / em357_info->ppage_size) / 8;
456 bit = (i / em357_info->ppage_size) - (reg * 8);
457
458 LOG_WARNING("reg, bit: %d, %d", reg, bit);
459 if (set)
460 prot_reg[reg] &= ~(1 << bit);
461 else
462 prot_reg[reg] |= (1 << bit);
463 }
464
465 if ((status = em357_erase_options(bank)) != ERROR_OK)
466 return status;
467
468 em357_info->option_bytes.protection[0] = prot_reg[0];
469 em357_info->option_bytes.protection[1] = prot_reg[1];
470 em357_info->option_bytes.protection[2] = prot_reg[2];
471
472 return em357_write_options(bank);
473 }
474
475 static int em357_write_block(struct flash_bank *bank, uint8_t *buffer,
476 uint32_t offset, uint32_t count)
477 {
478 struct em357_flash_bank *em357_info = bank->driver_priv;
479 struct target *target = bank->target;
480 uint32_t buffer_size = 16384;
481 struct working_area *source;
482 uint32_t address = bank->base + offset;
483 struct reg_param reg_params[4];
484 struct armv7m_algorithm armv7m_info;
485 int retval = ERROR_OK;
486
487 /* see contib/loaders/flash/stm32x.s for src, the same is used here except for
488 * a modified *_FLASH_BASE */
489
490 static const uint8_t em357_flash_write_code[] = {
491 /* #define EM357_FLASH_CR_OFFSET 0x10 */
492 /* #define EM357_FLASH_SR_OFFSET 0x0C */
493 /* write: */
494 0x08, 0x4c, /* ldr r4, EM357_FLASH_BASE */
495 0x1c, 0x44, /* add r4, r3 */
496 /* write_half_word: */
497 0x01, 0x23, /* movs r3, #0x01 */
498 0x23, 0x61, /* str r3, [r4, #EM357_FLASH_CR_OFFSET] */
499 0x30, 0xf8, 0x02, 0x3b, /* ldrh r3, [r0], #0x02 */
500 0x21, 0xf8, 0x02, 0x3b, /* strh r3, [r1], #0x02 */
501 /* busy: */
502 0xe3, 0x68, /* ldr r3, [r4, #EM357_FLASH_SR_OFFSET] */
503 0x13, 0xf0, 0x01, 0x0f, /* tst r3, #0x01 */
504 0xfb, 0xd0, /* beq busy */
505 0x13, 0xf0, 0x14, 0x0f, /* tst r3, #0x14 */
506 0x01, 0xd1, /* bne exit */
507 0x01, 0x3a, /* subs r2, r2, #0x01 */
508 0xf0, 0xd1, /* bne write_half_word */
509 /* exit: */
510 0x00, 0xbe, /* bkpt #0x00 */
511 0x00, 0x80, 0x00, 0x40, /* EM357_FLASH_BASE: .word 0x40008000 */
512 };
513
514 /* flash write code */
515 if (target_alloc_working_area(target, sizeof(em357_flash_write_code),
516 &em357_info->write_algorithm) != ERROR_OK)
517 {
518 LOG_WARNING("no working area available, can't do block memory writes");
519 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
520 };
521
522 if ((retval = target_write_buffer(target, em357_info->write_algorithm->address,
523 sizeof(em357_flash_write_code),
524 (uint8_t*)em357_flash_write_code)) != ERROR_OK)
525 return retval;
526
527 /* memory buffer */
528 while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK)
529 {
530 buffer_size /= 2;
531 if (buffer_size <= 256)
532 {
533 /* if we already allocated the writing code, but failed to get a
534 * buffer, free the algorithm */
535 if (em357_info->write_algorithm)
536 target_free_working_area(target, em357_info->write_algorithm);
537
538 LOG_WARNING("no large enough working area available, can't do block memory writes");
539 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
540 }
541 };
542
543 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
544 armv7m_info.core_mode = ARMV7M_MODE_ANY;
545
546 init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
547 init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
548 init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
549 init_reg_param(&reg_params[3], "r3", 32, PARAM_IN_OUT);
550
551 while (count > 0)
552 {
553 uint32_t thisrun_count = (count > (buffer_size / 2)) ?
554 (buffer_size / 2) : count;
555
556 if ((retval = target_write_buffer(target, source->address,
557 thisrun_count * 2, buffer)) != ERROR_OK)
558 break;
559
560 buf_set_u32(reg_params[0].value, 0, 32, source->address);
561 buf_set_u32(reg_params[1].value, 0, 32, address);
562 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
563 buf_set_u32(reg_params[3].value, 0, 32, 0);
564
565 if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
566 em357_info->write_algorithm->address,
567 0,
568 10000, &armv7m_info)) != ERROR_OK)
569 {
570 LOG_ERROR("error executing em357 flash write algorithm");
571 break;
572 }
573
574 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_PGERR)
575 {
576 LOG_ERROR("flash memory not erased before writing");
577 /* Clear but report errors */
578 target_write_u32(target, EM357_FLASH_SR, FLASH_PGERR);
579 retval = ERROR_FAIL;
580 break;
581 }
582
583 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_WRPRTERR)
584 {
585 LOG_ERROR("flash memory write protected");
586 /* Clear but report errors */
587 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR);
588 retval = ERROR_FAIL;
589 break;
590 }
591
592 buffer += thisrun_count * 2;
593 address += thisrun_count * 2;
594 count -= thisrun_count;
595 }
596
597 target_free_working_area(target, source);
598 target_free_working_area(target, em357_info->write_algorithm);
599
600 destroy_reg_param(&reg_params[0]);
601 destroy_reg_param(&reg_params[1]);
602 destroy_reg_param(&reg_params[2]);
603 destroy_reg_param(&reg_params[3]);
604
605 return retval;
606 }
607
608 static int em357_write(struct flash_bank *bank, uint8_t *buffer,
609 uint32_t offset, uint32_t count)
610 {
611 struct target *target = bank->target;
612 uint32_t words_remaining = (count / 2);
613 uint32_t bytes_remaining = (count & 0x00000001);
614 uint32_t address = bank->base + offset;
615 uint32_t bytes_written = 0;
616 int retval;
617
618 if (bank->target->state != TARGET_HALTED)
619 {
620 LOG_ERROR("Target not halted");
621 return ERROR_TARGET_NOT_HALTED;
622 }
623
624 if (offset & 0x1)
625 {
626 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
627 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
628 }
629
630 /* unlock flash registers */
631 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
632 if (retval != ERROR_OK)
633 return retval;
634 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
635 if (retval != ERROR_OK)
636 return retval;
637
638 /* multiple half words (2-byte) to be programmed? */
639 if (words_remaining > 0)
640 {
641 /* try using a block write */
642 if ((retval = em357_write_block(bank, buffer, offset, words_remaining)) != ERROR_OK)
643 {
644 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
645 {
646 /* if block write failed (no sufficient working area),
647 * we use normal (slow) single dword accesses */
648 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
649 }
650 }
651 else
652 {
653 buffer += words_remaining * 2;
654 address += words_remaining * 2;
655 words_remaining = 0;
656 }
657 }
658
659 if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
660 return retval;
661
662 while (words_remaining > 0)
663 {
664 uint16_t value;
665 memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
666
667 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
668 if (retval != ERROR_OK)
669 return retval;
670 retval = target_write_u16(target, address, value);
671 if (retval != ERROR_OK)
672 return retval;
673
674 retval = em357_wait_status_busy(bank, 5);
675 if (retval != ERROR_OK)
676 return retval;
677
678 bytes_written += 2;
679 words_remaining--;
680 address += 2;
681 }
682
683 if (bytes_remaining)
684 {
685 uint16_t value = 0xffff;
686 memcpy(&value, buffer + bytes_written, bytes_remaining);
687
688 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
689 if (retval != ERROR_OK)
690 return retval;
691 retval = target_write_u16(target, address, value);
692 if (retval != ERROR_OK)
693 return retval;
694
695 retval = em357_wait_status_busy(bank, 5);
696 if (retval != ERROR_OK)
697 return retval;
698 }
699
700 return target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
701 }
702
703 static int em357_probe(struct flash_bank *bank)
704 {
705 struct target *target = bank->target;
706 struct em357_flash_bank *em357_info = bank->driver_priv;
707 int i;
708 uint16_t num_pages;
709 int page_size;
710 uint32_t base_address = 0x08000000;
711
712 em357_info->probed = 0;
713
714 /* Enable FPEC CLK */
715 int retval = target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
716 if (retval != ERROR_OK)
717 return retval;
718
719 page_size = 2048;
720 em357_info->ppage_size = 4;
721 num_pages = 96;
722
723 LOG_INFO("flash size = %dkbytes", num_pages*page_size/1024);
724
725 if (bank->sectors)
726 {
727 free(bank->sectors);
728 bank->sectors = NULL;
729 }
730
731 bank->base = base_address;
732 bank->size = (num_pages * page_size);
733 bank->num_sectors = num_pages;
734 bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
735
736 for (i = 0; i < num_pages; i++)
737 {
738 bank->sectors[i].offset = i * page_size;
739 bank->sectors[i].size = page_size;
740 bank->sectors[i].is_erased = -1;
741 bank->sectors[i].is_protected = 1;
742 }
743
744 em357_info->probed = 1;
745
746 return ERROR_OK;
747 }
748
749 static int em357_auto_probe(struct flash_bank *bank)
750 {
751 struct em357_flash_bank *em357_info = bank->driver_priv;
752 if (em357_info->probed)
753 return ERROR_OK;
754 return em357_probe(bank);
755 }
756
757
758 static int get_em357_info(struct flash_bank *bank, char *buf, int buf_size)
759 {
760 int printed;
761 printed = snprintf(buf, buf_size, "em357\n");
762 buf += printed;
763 buf_size -= printed;
764 return ERROR_OK;
765 }
766
767 COMMAND_HANDLER(em357_handle_lock_command)
768 {
769 struct target *target = NULL;
770 struct em357_flash_bank *em357_info = NULL;
771
772 if (CMD_ARGC < 1)
773 {
774 command_print(CMD_CTX, "em357 lock <bank>");
775 return ERROR_OK;
776 }
777
778 struct flash_bank *bank;
779 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
780 if (ERROR_OK != retval)
781 return retval;
782
783 em357_info = bank->driver_priv;
784
785 target = bank->target;
786
787 if (target->state != TARGET_HALTED)
788 {
789 LOG_ERROR("Target not halted");
790 return ERROR_TARGET_NOT_HALTED;
791 }
792
793 if (em357_erase_options(bank) != ERROR_OK)
794 {
795 command_print(CMD_CTX, "em357 failed to erase options");
796 return ERROR_OK;
797 }
798
799 /* set readout protection */
800 em357_info->option_bytes.RDP = 0;
801
802 if (em357_write_options(bank) != ERROR_OK)
803 {
804 command_print(CMD_CTX, "em357 failed to lock device");
805 return ERROR_OK;
806 }
807
808 command_print(CMD_CTX, "em357 locked");
809
810 return ERROR_OK;
811 }
812
813 COMMAND_HANDLER(em357_handle_unlock_command)
814 {
815 struct target *target = NULL;
816
817 if (CMD_ARGC < 1)
818 {
819 command_print(CMD_CTX, "em357 unlock <bank>");
820 return ERROR_OK;
821 }
822
823 struct flash_bank *bank;
824 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
825 if (ERROR_OK != retval)
826 return retval;
827
828 target = bank->target;
829
830 if (target->state != TARGET_HALTED)
831 {
832 LOG_ERROR("Target not halted");
833 return ERROR_TARGET_NOT_HALTED;
834 }
835
836 if (em357_erase_options(bank) != ERROR_OK)
837 {
838 command_print(CMD_CTX, "em357 failed to unlock device");
839 return ERROR_OK;
840 }
841
842 if (em357_write_options(bank) != ERROR_OK)
843 {
844 command_print(CMD_CTX, "em357 failed to lock device");
845 return ERROR_OK;
846 }
847
848 command_print(CMD_CTX, "em357 unlocked.\n"
849 "INFO: a reset or power cycle is required "
850 "for the new settings to take effect.");
851
852 return ERROR_OK;
853 }
854
855 static int em357_mass_erase(struct flash_bank *bank)
856 {
857 struct target *target = bank->target;
858
859 if (target->state != TARGET_HALTED)
860 {
861 LOG_ERROR("Target not halted");
862 return ERROR_TARGET_NOT_HALTED;
863 }
864
865 /* unlock option flash registers */
866 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
867 if (retval != ERROR_OK)
868 return retval;
869 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
870 if (retval != ERROR_OK)
871 return retval;
872
873 /* mass erase flash memory */
874 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER);
875 if (retval != ERROR_OK)
876 return retval;
877 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER | FLASH_STRT);
878 if (retval != ERROR_OK)
879 return retval;
880
881 retval = em357_wait_status_busy(bank, 100);
882 if (retval != ERROR_OK)
883 return retval;
884
885 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
886 if (retval != ERROR_OK)
887 return retval;
888
889 return ERROR_OK;
890 }
891
892 COMMAND_HANDLER(em357_handle_mass_erase_command)
893 {
894 int i;
895
896 if (CMD_ARGC < 1)
897 {
898 command_print(CMD_CTX, "em357 mass_erase <bank>");
899 return ERROR_OK;
900 }
901
902 struct flash_bank *bank;
903 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
904 if (ERROR_OK != retval)
905 return retval;
906
907 retval = em357_mass_erase(bank);
908 if (retval == ERROR_OK)
909 {
910 /* set all sectors as erased */
911 for (i = 0; i < bank->num_sectors; i++)
912 {
913 bank->sectors[i].is_erased = 1;
914 }
915
916 command_print(CMD_CTX, "em357 mass erase complete");
917 }
918 else
919 {
920 command_print(CMD_CTX, "em357 mass erase failed");
921 }
922
923 return retval;
924 }
925
926 static const struct command_registration em357_exec_command_handlers[] = {
927 {
928 .name = "lock",
929 .handler = em357_handle_lock_command,
930 .mode = COMMAND_EXEC,
931 .usage = "bank_id",
932 .help = "Lock entire flash device.",
933 },
934 {
935 .name = "unlock",
936 .handler = em357_handle_unlock_command,
937 .mode = COMMAND_EXEC,
938 .usage = "bank_id",
939 .help = "Unlock entire protected flash device.",
940 },
941 {
942 .name = "mass_erase",
943 .handler = em357_handle_mass_erase_command,
944 .mode = COMMAND_EXEC,
945 .usage = "bank_id",
946 .help = "Erase entire flash device.",
947 },
948 COMMAND_REGISTRATION_DONE
949 };
950
951 static const struct command_registration em357_command_handlers[] = {
952 {
953 .name = "em357",
954 .mode = COMMAND_ANY,
955 .help = "em357 flash command group",
956 .chain = em357_exec_command_handlers,
957 },
958 COMMAND_REGISTRATION_DONE
959 };
960
961 struct flash_driver em357_flash = {
962 .name = "em357",
963 .commands = em357_command_handlers,
964 .flash_bank_command = em357_flash_bank_command,
965 .erase = em357_erase,
966 .protect = em357_protect,
967 .write = em357_write,
968 .read = default_flash_read,
969 .probe = em357_probe,
970 .auto_probe = em357_auto_probe,
971 .erase_check = default_flash_mem_blank_check,
972 .protect_check = em357_protect_check,
973 .info = get_em357_info,
974 };
Add cmsis-dap support