contrib/loaders/flash/stm32f2x.S

   1 /***************************************************************************
   2  *   Copyright (C) 2010 by Spencer Oliver                                  *
   3  *   spen@spen-soft.co.uk                                                  *
   4  *                                                                         *
   5  *   Copyright (C) 2011 Øyvind Harboe                                      *
   6  *   oyvind.harboe@zylin.com                                               *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program; if not, write to the                         *
  20  *   Free Software Foundation, Inc.,                                       *
  21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  22  ***************************************************************************/
  23
  24
  25 // Build : arm-eabi-gcc -c stm32f2xxx.S
  26         .text
  27         .syntax unified
  28         .cpu cortex-m3
  29         .thumb
  30         .thumb_func
  31         .global write
  32
  33 /*
  34         r0 - source address
  35         r1 - target address
  36         r2 - count (halfword-16bit)
  37         r3 - result out
  38         r4 - flash base
  39 */
  40
  41 #define STM32_FLASH_CR_OFFSET   0x10                    /* offset of CR register in FLASH struct */
  42 #define STM32_FLASH_SR_OFFSET   0x0c                    /* offset of CR register in FLASH struct */
  43
  44 write:
  45
  46 write_half_word:
  47         ldr             r3, STM32_PROG16
  48         str             r3, [r4, #STM32_FLASH_CR_OFFSET]
  49         ldrh    r3, [r0], #0x02                                         /* read one half-word from src, increment ptr */
  50         strh    r3, [r1], #0x02                                         /* write one half-word from src, increment ptr */
  51 busy:
  52         ldr     r3, [r4, #STM32_FLASH_SR_OFFSET]
  53         tst     r3, #0x10000                                            /* BSY (bit0) == 1 => operation in progress */
  54         beq     busy                                                            /* wait more... */
  55         tst             r3, #0xf0                                                       /* PGSERR | PGPERR | PGAERR | WRPERR */
  56         bne             exit                                                            /* fail... */
  57         subs    r2, r2, #0x01                                           /* decrement counter */
  58         bne             write_half_word                                         /* write next half-word if anything left */
  59 exit:
  60         bkpt    #0x00
  61
  62
  63 STM32_PROG16: .word 0x101                                               /* PG | PSIZE_16*/