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Remove FSF address from GPL notices
[openocd.git] / src / jtag / drivers / bitbang.c
blobc9ec9c9d6fa33b4b2ede7d329a8c276e3c696209
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2007,2008 Øyvind Harboe *
6 * oyvind.harboe@zylin.com *
7 * *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
12 * *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
17 * *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
20 ***************************************************************************/
21
22 /* 2014-12: Addition of the SWD protocol support is based on the initial work
23 * by Paul Fertser and modifications by Jean-Christian de Rivaz. */
24
25 #ifdef HAVE_CONFIG_H
26 #include "config.h"
27 #endif
28
29 #include "bitbang.h"
30 #include <jtag/interface.h>
31 #include <jtag/commands.h>
32
33 /* YUK! - but this is currently a global.... */
34 extern struct jtag_interface *jtag_interface;
35
36 /**
37 * Function bitbang_stableclocks
38 * issues a number of clock cycles while staying in a stable state.
39 * Because the TMS value required to stay in the RESET state is a 1, whereas
40 * the TMS value required to stay in any of the other stable states is a 0,
41 * this function checks the current stable state to decide on the value of TMS
42 * to use.
43 */
44 static void bitbang_stableclocks(int num_cycles);
45
46 static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk);
47
48 struct bitbang_interface *bitbang_interface;
49
50 /* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work!
51 *
52 * Set this to 1 and str912 reset halt will fail.
53 *
54 * If someone can submit a patch with an explanation it will be greatly
55 * appreciated, but as far as I can tell (ØH) DCLK is generated upon
56 * clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
57 * The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
58 * state". With hardware there is no such thing as *while* in a state. There
59 * are only edges. So clk => 0 is in fact a very subtle state transition that
60 * happens *while* in the TAP_IDLE state. "#&¤"#¤&"#&"#&
61 *
62 * For "reset halt" the last thing that happens before srst is asserted
63 * is that the breakpoint is set up. If DCLK is not wiggled one last
64 * time before the reset, then the breakpoint is not set up and
65 * "reset halt" will fail to halt.
66 *
67 */
68 #define CLOCK_IDLE() 0
69
70 /* The bitbang driver leaves the TCK 0 when in idle */
71 static void bitbang_end_state(tap_state_t state)
72 {
73 if (tap_is_state_stable(state))
74 tap_set_end_state(state);
75 else {
76 LOG_ERROR("BUG: %i is not a valid end state", state);
77 exit(-1);
78 }
79 }
80
81 static void bitbang_state_move(int skip)
82 {
83 int i = 0, tms = 0;
84 uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
85 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
86
87 for (i = skip; i < tms_count; i++) {
88 tms = (tms_scan >> i) & 1;
89 bitbang_interface->write(0, tms, 0);
90 bitbang_interface->write(1, tms, 0);
91 }
92 bitbang_interface->write(CLOCK_IDLE(), tms, 0);
93
94 tap_set_state(tap_get_end_state());
95 }
96
97 /**
98 * Clock a bunch of TMS (or SWDIO) transitions, to change the JTAG
99 * (or SWD) state machine.
100 */
101 static int bitbang_execute_tms(struct jtag_command *cmd)
102 {
103 unsigned num_bits = cmd->cmd.tms->num_bits;
104 const uint8_t *bits = cmd->cmd.tms->bits;
105
106 DEBUG_JTAG_IO("TMS: %d bits", num_bits);
107
108 int tms = 0;
109 for (unsigned i = 0; i < num_bits; i++) {
110 tms = ((bits[i/8] >> (i % 8)) & 1);
111 bitbang_interface->write(0, tms, 0);
112 bitbang_interface->write(1, tms, 0);
113 }
114 bitbang_interface->write(CLOCK_IDLE(), tms, 0);
115
116 return ERROR_OK;
117 }
118
119 static void bitbang_path_move(struct pathmove_command *cmd)
120 {
121 int num_states = cmd->num_states;
122 int state_count;
123 int tms = 0;
124
125 state_count = 0;
126 while (num_states) {
127 if (tap_state_transition(tap_get_state(), false) == cmd->path[state_count])
128 tms = 0;
129 else if (tap_state_transition(tap_get_state(), true) == cmd->path[state_count])
130 tms = 1;
131 else {
132 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
133 tap_state_name(tap_get_state()),
134 tap_state_name(cmd->path[state_count]));
135 exit(-1);
136 }
137
138 bitbang_interface->write(0, tms, 0);
139 bitbang_interface->write(1, tms, 0);
140
141 tap_set_state(cmd->path[state_count]);
142 state_count++;
143 num_states--;
144 }
145
146 bitbang_interface->write(CLOCK_IDLE(), tms, 0);
147
148 tap_set_end_state(tap_get_state());
149 }
150
151 static void bitbang_runtest(int num_cycles)
152 {
153 int i;
154
155 tap_state_t saved_end_state = tap_get_end_state();
156
157 /* only do a state_move when we're not already in IDLE */
158 if (tap_get_state() != TAP_IDLE) {
159 bitbang_end_state(TAP_IDLE);
160 bitbang_state_move(0);
161 }
162
163 /* execute num_cycles */
164 for (i = 0; i < num_cycles; i++) {
165 bitbang_interface->write(0, 0, 0);
166 bitbang_interface->write(1, 0, 0);
167 }
168 bitbang_interface->write(CLOCK_IDLE(), 0, 0);
169
170 /* finish in end_state */
171 bitbang_end_state(saved_end_state);
172 if (tap_get_state() != tap_get_end_state())
173 bitbang_state_move(0);
174 }
175
176 static void bitbang_stableclocks(int num_cycles)
177 {
178 int tms = (tap_get_state() == TAP_RESET ? 1 : 0);
179 int i;
180
181 /* send num_cycles clocks onto the cable */
182 for (i = 0; i < num_cycles; i++) {
183 bitbang_interface->write(1, tms, 0);
184 bitbang_interface->write(0, tms, 0);
185 }
186 }
187
188 static void bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size)
189 {
190 tap_state_t saved_end_state = tap_get_end_state();
191 int bit_cnt;
192
193 if (!((!ir_scan &&
194 (tap_get_state() == TAP_DRSHIFT)) ||
195 (ir_scan && (tap_get_state() == TAP_IRSHIFT)))) {
196 if (ir_scan)
197 bitbang_end_state(TAP_IRSHIFT);
198 else
199 bitbang_end_state(TAP_DRSHIFT);
200
201 bitbang_state_move(0);
202 bitbang_end_state(saved_end_state);
203 }
204
205 for (bit_cnt = 0; bit_cnt < scan_size; bit_cnt++) {
206 int val = 0;
207 int tms = (bit_cnt == scan_size-1) ? 1 : 0;
208 int tdi;
209 int bytec = bit_cnt/8;
210 int bcval = 1 << (bit_cnt % 8);
211
212 /* if we're just reading the scan, but don't care about the output
213 * default to outputting 'low', this also makes valgrind traces more readable,
214 * as it removes the dependency on an uninitialised value
215 */
216 tdi = 0;
217 if ((type != SCAN_IN) && (buffer[bytec] & bcval))
218 tdi = 1;
219
220 bitbang_interface->write(0, tms, tdi);
221
222 if (type != SCAN_OUT)
223 val = bitbang_interface->read();
224
225 bitbang_interface->write(1, tms, tdi);
226
227 if (type != SCAN_OUT) {
228 if (val)
229 buffer[bytec] |= bcval;
230 else
231 buffer[bytec] &= ~bcval;
232 }
233 }
234
235 if (tap_get_state() != tap_get_end_state()) {
236 /* we *KNOW* the above loop transitioned out of
237 * the shift state, so we skip the first state
238 * and move directly to the end state.
239 */
240 bitbang_state_move(1);
241 }
242 }
243
244 int bitbang_execute_queue(void)
245 {
246 struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
247 int scan_size;
248 enum scan_type type;
249 uint8_t *buffer;
250 int retval;
251
252 if (!bitbang_interface) {
253 LOG_ERROR("BUG: Bitbang interface called, but not yet initialized");
254 exit(-1);
255 }
256
257 /* return ERROR_OK, unless a jtag_read_buffer returns a failed check
258 * that wasn't handled by a caller-provided error handler
259 */
260 retval = ERROR_OK;
261
262 if (bitbang_interface->blink)
263 bitbang_interface->blink(1);
264
265 while (cmd) {
266 switch (cmd->type) {
267 case JTAG_RESET:
268 #ifdef _DEBUG_JTAG_IO_
269 LOG_DEBUG("reset trst: %i srst %i",
270 cmd->cmd.reset->trst,
271 cmd->cmd.reset->srst);
272 #endif
273 if ((cmd->cmd.reset->trst == 1) ||
274 (cmd->cmd.reset->srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
275 tap_set_state(TAP_RESET);
276 bitbang_interface->reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
277 break;
278 case JTAG_RUNTEST:
279 #ifdef _DEBUG_JTAG_IO_
280 LOG_DEBUG("runtest %i cycles, end in %s",
281 cmd->cmd.runtest->num_cycles,
282 tap_state_name(cmd->cmd.runtest->end_state));
283 #endif
284 bitbang_end_state(cmd->cmd.runtest->end_state);
285 bitbang_runtest(cmd->cmd.runtest->num_cycles);
286 break;
287
288 case JTAG_STABLECLOCKS:
289 /* this is only allowed while in a stable state. A check for a stable
290 * state was done in jtag_add_clocks()
291 */
292 bitbang_stableclocks(cmd->cmd.stableclocks->num_cycles);
293 break;
294
295 case JTAG_TLR_RESET:
296 #ifdef _DEBUG_JTAG_IO_
297 LOG_DEBUG("statemove end in %s",
298 tap_state_name(cmd->cmd.statemove->end_state));
299 #endif
300 bitbang_end_state(cmd->cmd.statemove->end_state);
301 bitbang_state_move(0);
302 break;
303 case JTAG_PATHMOVE:
304 #ifdef _DEBUG_JTAG_IO_
305 LOG_DEBUG("pathmove: %i states, end in %s",
306 cmd->cmd.pathmove->num_states,
307 tap_state_name(cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]));
308 #endif
309 bitbang_path_move(cmd->cmd.pathmove);
310 break;
311 case JTAG_SCAN:
312 #ifdef _DEBUG_JTAG_IO_
313 LOG_DEBUG("%s scan end in %s",
314 (cmd->cmd.scan->ir_scan) ? "IR" : "DR",
315 tap_state_name(cmd->cmd.scan->end_state));
316 #endif
317 bitbang_end_state(cmd->cmd.scan->end_state);
318 scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
319 type = jtag_scan_type(cmd->cmd.scan);
320 bitbang_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size);
321 if (jtag_read_buffer(buffer, cmd->cmd.scan) != ERROR_OK)
322 retval = ERROR_JTAG_QUEUE_FAILED;
323 if (buffer)
324 free(buffer);
325 break;
326 case JTAG_SLEEP:
327 #ifdef _DEBUG_JTAG_IO_
328 LOG_DEBUG("sleep %" PRIi32, cmd->cmd.sleep->us);
329 #endif
330 jtag_sleep(cmd->cmd.sleep->us);
331 break;
332 case JTAG_TMS:
333 retval = bitbang_execute_tms(cmd);
334 break;
335 default:
336 LOG_ERROR("BUG: unknown JTAG command type encountered");
337 exit(-1);
338 }
339 cmd = cmd->next;
340 }
341 if (bitbang_interface->blink)
342 bitbang_interface->blink(0);
343
344 return retval;
345 }
346
347
348 bool swd_mode;
349 static int queued_retval;
350
351 static int bitbang_swd_init(void)
352 {
353 LOG_DEBUG("bitbang_swd_init");
354 swd_mode = true;
355 return ERROR_OK;
356 }
357
358 static void bitbang_exchange(bool rnw, uint8_t buf[], unsigned int offset, unsigned int bit_cnt)
359 {
360 LOG_DEBUG("bitbang_exchange");
361 int tdi;
362
363 for (unsigned int i = offset; i < bit_cnt + offset; i++) {
364 int bytec = i/8;
365 int bcval = 1 << (i % 8);
366 tdi = !rnw && (buf[bytec] & bcval);
367
368 bitbang_interface->write(0, 0, tdi);
369
370 if (rnw && buf) {
371 if (bitbang_interface->swdio_read())
372 buf[bytec] |= bcval;
373 else
374 buf[bytec] &= ~bcval;
375 }
376
377 bitbang_interface->write(1, 0, tdi);
378 }
379 }
380
381 int bitbang_swd_switch_seq(enum swd_special_seq seq)
382 {
383 LOG_DEBUG("bitbang_swd_switch_seq");
384
385 switch (seq) {
386 case LINE_RESET:
387 LOG_DEBUG("SWD line reset");
388 bitbang_exchange(false, (uint8_t *)swd_seq_line_reset, 0, swd_seq_line_reset_len);
389 break;
390 case JTAG_TO_SWD:
391 LOG_DEBUG("JTAG-to-SWD");
392 bitbang_exchange(false, (uint8_t *)swd_seq_jtag_to_swd, 0, swd_seq_jtag_to_swd_len);
393 break;
394 case SWD_TO_JTAG:
395 LOG_DEBUG("SWD-to-JTAG");
396 bitbang_exchange(false, (uint8_t *)swd_seq_swd_to_jtag, 0, swd_seq_swd_to_jtag_len);
397 break;
398 default:
399 LOG_ERROR("Sequence %d not supported", seq);
400 return ERROR_FAIL;
401 }
402
403 return ERROR_OK;
404 }
405
406 void bitbang_switch_to_swd(void)
407 {
408 LOG_DEBUG("bitbang_switch_to_swd");
409 bitbang_exchange(false, (uint8_t *)swd_seq_jtag_to_swd, 0, swd_seq_jtag_to_swd_len);
410 }
411
412 static void swd_clear_sticky_errors(void)
413 {
414 bitbang_swd_write_reg(swd_cmd(false, false, DP_ABORT),
415 STKCMPCLR | STKERRCLR | WDERRCLR | ORUNERRCLR, 0);
416 }
417
418 static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
419 {
420 LOG_DEBUG("bitbang_swd_read_reg");
421 assert(cmd & SWD_CMD_RnW);
422
423 if (queued_retval != ERROR_OK) {
424 LOG_DEBUG("Skip bitbang_swd_read_reg because queued_retval=%d", queued_retval);
425 return;
426 }
427
428 for (;;) {
429 uint8_t trn_ack_data_parity_trn[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)];
430
431 cmd |= SWD_CMD_START | (1 << 7);
432 bitbang_exchange(false, &cmd, 0, 8);
433
434 bitbang_interface->swdio_drive(false);
435 bitbang_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 32 + 1 + 1);
436 bitbang_interface->swdio_drive(true);
437
438 int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3);
439 uint32_t data = buf_get_u32(trn_ack_data_parity_trn, 1 + 3, 32);
440 int parity = buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 32, 1);
441
442 LOG_DEBUG("%s %s %s reg %X = %08"PRIx32,
443 ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
444 cmd & SWD_CMD_APnDP ? "AP" : "DP",
445 cmd & SWD_CMD_RnW ? "read" : "write",
446 (cmd & SWD_CMD_A32) >> 1,
447 data);
448
449 switch (ack) {
450 case SWD_ACK_OK:
451 if (parity != parity_u32(data)) {
452 LOG_DEBUG("Wrong parity detected");
453 queued_retval = ERROR_FAIL;
454 return;
455 }
456 if (value)
457 *value = data;
458 if (cmd & SWD_CMD_APnDP)
459 bitbang_exchange(true, NULL, 0, ap_delay_clk);
460 return;
461 case SWD_ACK_WAIT:
462 LOG_DEBUG("SWD_ACK_WAIT");
463 swd_clear_sticky_errors();
464 break;
465 case SWD_ACK_FAULT:
466 LOG_DEBUG("SWD_ACK_FAULT");
467 queued_retval = ack;
468 return;
469 default:
470 LOG_DEBUG("No valid acknowledge: ack=%d", ack);
471 queued_retval = ack;
472 return;
473 }
474 }
475 }
476
477 static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
478 {
479 LOG_DEBUG("bitbang_swd_write_reg");
480 assert(!(cmd & SWD_CMD_RnW));
481
482 if (queued_retval != ERROR_OK) {
483 LOG_DEBUG("Skip bitbang_swd_write_reg because queued_retval=%d", queued_retval);
484 return;
485 }
486
487 for (;;) {
488 uint8_t trn_ack_data_parity_trn[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)];
489 buf_set_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32, value);
490 buf_set_u32(trn_ack_data_parity_trn, 1 + 3 + 1 + 32, 1, parity_u32(value));
491
492 cmd |= SWD_CMD_START | (1 << 7);
493 bitbang_exchange(false, &cmd, 0, 8);
494
495 bitbang_interface->swdio_drive(false);
496 bitbang_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 1);
497 bitbang_interface->swdio_drive(true);
498 bitbang_exchange(false, trn_ack_data_parity_trn, 1 + 3 + 1, 32 + 1);
499
500 int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3);
501 LOG_DEBUG("%s %s %s reg %X = %08"PRIx32,
502 ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
503 cmd & SWD_CMD_APnDP ? "AP" : "DP",
504 cmd & SWD_CMD_RnW ? "read" : "write",
505 (cmd & SWD_CMD_A32) >> 1,
506 buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32));
507
508 switch (ack) {
509 case SWD_ACK_OK:
510 if (cmd & SWD_CMD_APnDP)
511 bitbang_exchange(true, NULL, 0, ap_delay_clk);
512 return;
513 case SWD_ACK_WAIT:
514 LOG_DEBUG("SWD_ACK_WAIT");
515 swd_clear_sticky_errors();
516 break;
517 case SWD_ACK_FAULT:
518 LOG_DEBUG("SWD_ACK_FAULT");
519 queued_retval = ack;
520 return;
521 default:
522 LOG_DEBUG("No valid acknowledge: ack=%d", ack);
523 queued_retval = ack;
524 return;
525 }
526 }
527 }
528
529 static int bitbang_swd_run_queue(void)
530 {
531 LOG_DEBUG("bitbang_swd_run_queue");
532 /* A transaction must be followed by another transaction or at least 8 idle cycles to
533 * ensure that data is clocked through the AP. */
534 bitbang_exchange(true, NULL, 0, 8);
535
536 int retval = queued_retval;
537 queued_retval = ERROR_OK;
538 LOG_DEBUG("SWD queue return value: %02x", retval);
539 return retval;
540 }
541
542 const struct swd_driver bitbang_swd = {
543 .init = bitbang_swd_init,
544 .switch_seq = bitbang_swd_switch_seq,
545 .read_reg = bitbang_swd_read_reg,
546 .write_reg = bitbang_swd_write_reg,
547 .run = bitbang_swd_run_queue,
548 };
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