1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
24 #include "replacements.h"
32 #include "algorithm.h"
33 #include "binarybuffer.h"
39 str9x_mem_layout_t mem_layout_str9bank0
[] = {
40 {0x00000000, 0x10000, 0x01},
41 {0x00010000, 0x10000, 0x02},
42 {0x00020000, 0x10000, 0x04},
43 {0x00030000, 0x10000, 0x08},
44 {0x00040000, 0x10000, 0x10},
45 {0x00050000, 0x10000, 0x20},
46 {0x00060000, 0x10000, 0x40},
47 {0x00070000, 0x10000, 0x80},
50 str9x_mem_layout_t mem_layout_str9bank1
[] = {
51 {0x00000000, 0x02000, 0x100},
52 {0x00002000, 0x02000, 0x200},
53 {0x00004000, 0x02000, 0x400},
54 {0x00006000, 0x02000, 0x800}
57 static u32 bank1start
= 0x00080000;
59 int str9x_register_commands(struct command_context_s
*cmd_ctx
);
60 int str9x_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
);
61 int str9x_erase(struct flash_bank_s
*bank
, int first
, int last
);
62 int str9x_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
);
63 int str9x_write(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
);
64 int str9x_probe(struct flash_bank_s
*bank
);
65 int str9x_handle_part_id_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
66 int str9x_protect_check(struct flash_bank_s
*bank
);
67 int str9x_erase_check(struct flash_bank_s
*bank
);
68 int str9x_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
);
70 int str9x_handle_flash_config_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
72 flash_driver_t str9x_flash
=
75 .register_commands
= str9x_register_commands
,
76 .flash_bank_command
= str9x_flash_bank_command
,
78 .protect
= str9x_protect
,
81 .auto_probe
= str9x_probe
,
82 .erase_check
= str9x_erase_check
,
83 .protect_check
= str9x_protect_check
,
87 int str9x_register_commands(struct command_context_s
*cmd_ctx
)
89 command_t
*str9x_cmd
= register_command(cmd_ctx
, NULL
, "str9x", NULL
, COMMAND_ANY
, NULL
);
91 register_command(cmd_ctx
, str9x_cmd
, "flash_config", str9x_handle_flash_config_command
, COMMAND_EXEC
,
92 "configure str9 flash controller");
97 int str9x_build_block_list(struct flash_bank_s
*bank
)
99 str9x_flash_bank_t
*str9x_info
= bank
->driver_priv
;
103 int b0_sectors
= 0, b1_sectors
= 0;
115 bank1start
= bank
->base
;
118 ERROR("BUG: unknown bank->size encountered");
122 num_sectors
= b0_sectors
+ b1_sectors
;
124 bank
->num_sectors
= num_sectors
;
125 bank
->sectors
= malloc(sizeof(flash_sector_t
) * num_sectors
);
126 str9x_info
->sector_bits
= malloc(sizeof(u32
) * num_sectors
);
130 for (i
= 0; i
< b0_sectors
; i
++)
132 bank
->sectors
[num_sectors
].offset
= mem_layout_str9bank0
[i
].sector_start
;
133 bank
->sectors
[num_sectors
].size
= mem_layout_str9bank0
[i
].sector_size
;
134 bank
->sectors
[num_sectors
].is_erased
= -1;
135 bank
->sectors
[num_sectors
].is_protected
= 1;
136 str9x_info
->sector_bits
[num_sectors
++] = mem_layout_str9bank0
[i
].sector_bit
;
139 for (i
= 0; i
< b1_sectors
; i
++)
141 bank
->sectors
[num_sectors
].offset
= mem_layout_str9bank1
[i
].sector_start
;
142 bank
->sectors
[num_sectors
].size
= mem_layout_str9bank1
[i
].sector_size
;
143 bank
->sectors
[num_sectors
].is_erased
= -1;
144 bank
->sectors
[num_sectors
].is_protected
= 1;
145 str9x_info
->sector_bits
[num_sectors
++] = mem_layout_str9bank1
[i
].sector_bit
;
151 /* flash bank str9x <base> <size> 0 0 <target#>
153 int str9x_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
)
155 str9x_flash_bank_t
*str9x_info
;
159 WARNING("incomplete flash_bank str9x configuration");
160 return ERROR_FLASH_BANK_INVALID
;
163 str9x_info
= malloc(sizeof(str9x_flash_bank_t
));
164 bank
->driver_priv
= str9x_info
;
166 str9x_build_block_list(bank
);
168 str9x_info
->write_algorithm
= NULL
;
173 int str9x_blank_check(struct flash_bank_s
*bank
, int first
, int last
)
175 target_t
*target
= bank
->target
;
180 if ((first
< 0) || (last
> bank
->num_sectors
))
181 return ERROR_FLASH_SECTOR_INVALID
;
183 if (bank
->target
->state
!= TARGET_HALTED
)
185 return ERROR_TARGET_NOT_HALTED
;
188 buffer
= malloc(256);
190 for (i
= first
; i
<= last
; i
++)
192 bank
->sectors
[i
].is_erased
= 1;
194 target
->type
->read_memory(target
, bank
->base
+ bank
->sectors
[i
].offset
, 4, 256/4, buffer
);
196 for (nBytes
= 0; nBytes
< 256; nBytes
++)
198 if (buffer
[nBytes
] != 0xFF)
200 bank
->sectors
[i
].is_erased
= 0;
211 int str9x_protect_check(struct flash_bank_s
*bank
)
213 str9x_flash_bank_t
*str9x_info
= bank
->driver_priv
;
214 target_t
*target
= bank
->target
;
220 if (bank
->target
->state
!= TARGET_HALTED
)
222 return ERROR_TARGET_NOT_HALTED
;
225 /* read level one protection */
227 adr
= bank1start
+ 0x10;
229 target_write_u16(target
, adr
, 0x90);
230 target_read_u16(target
, adr
, &status
);
231 target_write_u16(target
, adr
, 0xFF);
233 for (i
= 0; i
< bank
->num_sectors
; i
++)
235 if (status
& str9x_info
->sector_bits
[i
])
236 bank
->sectors
[i
].is_protected
= 1;
238 bank
->sectors
[i
].is_protected
= 0;
244 int str9x_erase(struct flash_bank_s
*bank
, int first
, int last
)
246 target_t
*target
= bank
->target
;
251 if (bank
->target
->state
!= TARGET_HALTED
)
253 return ERROR_TARGET_NOT_HALTED
;
256 for (i
= first
; i
<= last
; i
++)
258 adr
= bank
->base
+ bank
->sectors
[i
].offset
;
261 target_write_u16(target
, adr
, 0x20);
262 target_write_u16(target
, adr
, 0xD0);
265 target_write_u16(target
, adr
, 0x70);
268 target_read_u8(target
, adr
, &status
);
274 /* clear status, also clear read array */
275 target_write_u16(target
, adr
, 0x50);
277 /* read array command */
278 target_write_u16(target
, adr
, 0xFF);
282 ERROR("error erasing flash bank, status: 0x%x", status
);
283 return ERROR_FLASH_OPERATION_FAILED
;
287 for (i
= first
; i
<= last
; i
++)
288 bank
->sectors
[i
].is_erased
= 1;
293 int str9x_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
)
295 target_t
*target
= bank
->target
;
300 if (bank
->target
->state
!= TARGET_HALTED
)
302 return ERROR_TARGET_NOT_HALTED
;
305 for (i
= first
; i
<= last
; i
++)
307 /* Level One Protection */
309 adr
= bank
->base
+ bank
->sectors
[i
].offset
;
311 target_write_u16(target
, adr
, 0x60);
313 target_write_u16(target
, adr
, 0x01);
315 target_write_u16(target
, adr
, 0xD0);
318 target_read_u8(target
, adr
, &status
);
324 int str9x_write_block(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
)
326 str9x_flash_bank_t
*str9x_info
= bank
->driver_priv
;
327 target_t
*target
= bank
->target
;
328 u32 buffer_size
= 8192;
329 working_area_t
*source
;
330 u32 address
= bank
->base
+ offset
;
331 reg_param_t reg_params
[4];
332 armv4_5_algorithm_t armv4_5_info
;
335 u32 str9x_flash_write_code
[] = {
337 0xe3c14003, /* bic r4, r1, #3 */
338 0xe3a03040, /* mov r3, #0x40 */
339 0xe1c430b0, /* strh r3, [r4, #0] */
340 0xe0d030b2, /* ldrh r3, [r0], #2 */
341 0xe0c130b2, /* strh r3, [r1], #2 */
342 0xe3a03070, /* mov r3, #0x70 */
343 0xe1c430b0, /* strh r3, [r4, #0] */
345 0xe5d43000, /* ldrb r3, [r4, #0] */
346 0xe3130080, /* tst r3, #0x80 */
347 0x0afffffc, /* beq busy */
348 0xe3a05050, /* mov r5, #0x50 */
349 0xe1c450b0, /* strh r5, [r4, #0] */
350 0xe3a050ff, /* mov r5, #0xFF */
351 0xe1c450b0, /* strh r5, [r4, #0] */
352 0xe3130012, /* tst r3, #0x12 */
353 0x1a000001, /* bne exit */
354 0xe2522001, /* subs r2, r2, #1 */
355 0x1affffed, /* bne write */
357 0xeafffffe, /* b exit */
360 /* flash write code */
361 if (target_alloc_working_area(target
, 4 * 19, &str9x_info
->write_algorithm
) != ERROR_OK
)
363 WARNING("no working area available, can't do block memory writes");
364 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
367 target_write_buffer(target
, str9x_info
->write_algorithm
->address
, 19 * 4, (u8
*)str9x_flash_write_code
);
370 while (target_alloc_working_area(target
, buffer_size
, &source
) != ERROR_OK
)
373 if (buffer_size
<= 256)
375 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
376 if (str9x_info
->write_algorithm
)
377 target_free_working_area(target
, str9x_info
->write_algorithm
);
379 WARNING("no large enough working area available, can't do block memory writes");
380 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
384 armv4_5_info
.common_magic
= ARMV4_5_COMMON_MAGIC
;
385 armv4_5_info
.core_mode
= ARMV4_5_MODE_SVC
;
386 armv4_5_info
.core_state
= ARMV4_5_STATE_ARM
;
388 init_reg_param(®_params
[0], "r0", 32, PARAM_OUT
);
389 init_reg_param(®_params
[1], "r1", 32, PARAM_OUT
);
390 init_reg_param(®_params
[2], "r2", 32, PARAM_OUT
);
391 init_reg_param(®_params
[3], "r3", 32, PARAM_IN
);
395 u32 thisrun_count
= (count
> (buffer_size
/ 2)) ? (buffer_size
/ 2) : count
;
397 target_write_buffer(target
, source
->address
, thisrun_count
* 2, buffer
);
399 buf_set_u32(reg_params
[0].value
, 0, 32, source
->address
);
400 buf_set_u32(reg_params
[1].value
, 0, 32, address
);
401 buf_set_u32(reg_params
[2].value
, 0, 32, thisrun_count
);
403 if ((retval
= target
->type
->run_algorithm(target
, 0, NULL
, 4, reg_params
, str9x_info
->write_algorithm
->address
, str9x_info
->write_algorithm
->address
+ (18 * 4), 10000, &armv4_5_info
)) != ERROR_OK
)
405 target_free_working_area(target
, source
);
406 target_free_working_area(target
, str9x_info
->write_algorithm
);
407 ERROR("error executing str9x flash write algorithm");
408 return ERROR_FLASH_OPERATION_FAILED
;
411 if (buf_get_u32(reg_params
[3].value
, 0, 32) != 0x80)
413 return ERROR_FLASH_OPERATION_FAILED
;
416 buffer
+= thisrun_count
* 2;
417 address
+= thisrun_count
* 2;
418 count
-= thisrun_count
;
421 target_free_working_area(target
, source
);
422 target_free_working_area(target
, str9x_info
->write_algorithm
);
424 destroy_reg_param(®_params
[0]);
425 destroy_reg_param(®_params
[1]);
426 destroy_reg_param(®_params
[2]);
427 destroy_reg_param(®_params
[3]);
432 int str9x_write(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
)
434 target_t
*target
= bank
->target
;
435 u32 words_remaining
= (count
/ 2);
436 u32 bytes_remaining
= (count
& 0x00000001);
437 u32 address
= bank
->base
+ offset
;
438 u32 bytes_written
= 0;
441 u32 check_address
= offset
;
445 if (bank
->target
->state
!= TARGET_HALTED
)
447 return ERROR_TARGET_NOT_HALTED
;
452 WARNING("offset 0x%x breaks required 2-byte alignment", offset
);
453 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
456 for (i
= 0; i
< bank
->num_sectors
; i
++)
458 u32 sec_start
= bank
->sectors
[i
].offset
;
459 u32 sec_end
= sec_start
+ bank
->sectors
[i
].size
;
461 /* check if destination falls within the current sector */
462 if ((check_address
>= sec_start
) && (check_address
< sec_end
))
464 /* check if destination ends in the current sector */
465 if (offset
+ count
< sec_end
)
466 check_address
= offset
+ count
;
468 check_address
= sec_end
;
472 if (check_address
!= offset
+ count
)
473 return ERROR_FLASH_DST_OUT_OF_BANK
;
475 /* multiple half words (2-byte) to be programmed? */
476 if (words_remaining
> 0)
478 /* try using a block write */
479 if ((retval
= str9x_write_block(bank
, buffer
, offset
, words_remaining
)) != ERROR_OK
)
481 if (retval
== ERROR_TARGET_RESOURCE_NOT_AVAILABLE
)
483 /* if block write failed (no sufficient working area),
484 * we use normal (slow) single dword accesses */
485 WARNING("couldn't use block writes, falling back to single memory accesses");
487 else if (retval
== ERROR_FLASH_OPERATION_FAILED
)
489 ERROR("flash writing failed with error code: 0x%x", retval
);
490 return ERROR_FLASH_OPERATION_FAILED
;
495 buffer
+= words_remaining
* 2;
496 address
+= words_remaining
* 2;
501 while (words_remaining
> 0)
503 bank_adr
= address
& ~0x03;
505 /* write data command */
506 target_write_u16(target
, bank_adr
, 0x40);
507 target
->type
->write_memory(target
, address
, 2, 1, buffer
+ bytes_written
);
509 /* get status command */
510 target_write_u16(target
, bank_adr
, 0x70);
513 target_read_u8(target
, bank_adr
, &status
);
519 /* clear status reg and read array */
520 target_write_u16(target
, bank_adr
, 0x50);
521 target_write_u16(target
, bank_adr
, 0xFF);
524 return ERROR_FLASH_OPERATION_FAILED
;
525 else if (status
& 0x02)
526 return ERROR_FLASH_OPERATION_FAILED
;
535 u8 last_halfword
[2] = {0xff, 0xff};
538 while(bytes_remaining
> 0)
540 last_halfword
[i
++] = *(buffer
+ bytes_written
);
545 bank_adr
= address
& ~0x03;
547 /* write data comamnd */
548 target_write_u16(target
, bank_adr
, 0x40);
549 target
->type
->write_memory(target
, address
, 2, 1, last_halfword
);
551 /* query status command */
552 target_write_u16(target
, bank_adr
, 0x70);
555 target_read_u8(target
, bank_adr
, &status
);
561 /* clear status reg and read array */
562 target_write_u16(target
, bank_adr
, 0x50);
563 target_write_u16(target
, bank_adr
, 0xFF);
566 return ERROR_FLASH_OPERATION_FAILED
;
567 else if (status
& 0x02)
568 return ERROR_FLASH_OPERATION_FAILED
;
574 int str9x_probe(struct flash_bank_s
*bank
)
579 int str9x_handle_part_id_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
584 int str9x_erase_check(struct flash_bank_s
*bank
)
586 return str9x_blank_check(bank
, 0, bank
->num_sectors
- 1);
589 int str9x_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
)
591 snprintf(buf
, buf_size
, "str9x flash driver info" );
595 int str9x_handle_flash_config_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
597 str9x_flash_bank_t
*str9x_info
;
599 target_t
*target
= NULL
;
603 command_print(cmd_ctx
, "usage: str9x flash_config <bank> <bbsize> <nbsize> <bbstart> <nbstart>");
607 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
610 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
614 str9x_info
= bank
->driver_priv
;
616 target
= bank
->target
;
618 if (bank
->target
->state
!= TARGET_HALTED
)
620 return ERROR_TARGET_NOT_HALTED
;
623 /* config flash controller */
624 target_write_u32(target
, FLASH_BBSR
, strtoul(args
[1], NULL
, 0));
625 target_write_u32(target
, FLASH_NBBSR
, strtoul(args
[2], NULL
, 0));
626 target_write_u32(target
, FLASH_BBADR
, (strtoul(args
[3], NULL
, 0) >> 2));
627 target_write_u32(target
, FLASH_NBBADR
, (strtoul(args
[4], NULL
, 0) >> 2));
629 /* set bit 18 instruction TCM order as per flash programming manual */
630 arm966e_write_cp15(target
, 62, 0x40000);
632 /* enable flash bank 1 */
633 target_write_u32(target
, FLASH_CR
, 0x18);