src/target/arm920t.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 /***************************************************************************
   4  *   Copyright (C) 2005 by Dominic Rath                                    *
   5  *   Dominic.Rath@gmx.de                                                   *
   6  ***************************************************************************/
   7
   8 #ifndef OPENOCD_TARGET_ARM920T_H
   9 #define OPENOCD_TARGET_ARM920T_H
  10
  11 #include "arm9tdmi.h"
  12 #include "armv4_5_mmu.h"
  13
  14 #define ARM920T_COMMON_MAGIC 0xa920a920U
  15
  16 struct arm920t_common {
  17         unsigned int common_magic;
  18
  19         struct arm7_9_common arm7_9_common;
  20         struct armv4_5_mmu_common armv4_5_mmu;
  21         uint32_t cp15_control_reg;
  22         uint32_t d_fsr;
  23         uint32_t i_fsr;
  24         uint32_t d_far;
  25         uint32_t i_far;
  26         int preserve_cache;
  27 };
  28
  29 static inline struct arm920t_common *target_to_arm920(struct target *target)
  30 {
  31         return container_of(target->arch_info, struct arm920t_common, arm7_9_common.arm);
  32 }
  33
  34 struct arm920t_cache_line {
  35         uint32_t cam;
  36         uint32_t data[8];
  37 };
  38
  39 struct arm920t_tlb_entry {
  40         uint32_t cam;
  41         uint32_t ram1;
  42         uint32_t ram2;
  43 };
  44
  45 int arm920t_arch_state(struct target *target);
  46 int arm920t_soft_reset_halt(struct target *target);
  47 int arm920t_read_memory(struct target *target,
  48         target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer);
  49 int arm920t_write_memory(struct target *target,
  50         target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
  51 int arm920t_post_debug_entry(struct target *target);
  52 void arm920t_pre_restore_context(struct target *target);
  53 int arm920t_get_ttb(struct target *target, uint32_t *result);
  54 int arm920t_disable_mmu_caches(struct target *target,
  55         int mmu, int d_u_cache, int i_cache);
  56 int arm920t_enable_mmu_caches(struct target *target,
  57         int mmu, int d_u_cache, int i_cache);
  58
  59 extern const struct command_registration arm920t_command_handlers[];
  60
  61 #endif /* OPENOCD_TARGET_ARM920T_H */