src/flash/nor/avrf.c

   1 /***************************************************************************
   2  *   Copyright (C) 2009 by Simon Qian                                      *
   3  *   SimonQian@SimonQian.com                                               *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20 #ifdef HAVE_CONFIG_H
  21 #include "config.h"
  22 #endif
  23
  24 #include "imp.h"
  25 #include "avrf.h"
  26 #include <target/avrt.h>
  27
  28
  29 /* AVR_JTAG_Instructions */
  30 #define AVR_JTAG_INS_LEN                                                        4
  31 // Public Instructions:
  32 #define AVR_JTAG_INS_EXTEST                                                     0x00
  33 #define AVR_JTAG_INS_IDCODE                                                     0x01
  34 #define AVR_JTAG_INS_SAMPLE_PRELOAD                                     0x02
  35 #define AVR_JTAG_INS_BYPASS                                                     0x0F
  36 // AVR Specified Public Instructions:
  37 #define AVR_JTAG_INS_AVR_RESET                                          0x0C
  38 #define AVR_JTAG_INS_PROG_ENABLE                                        0x04
  39 #define AVR_JTAG_INS_PROG_COMMANDS                                      0x05
  40 #define AVR_JTAG_INS_PROG_PAGELOAD                                      0x06
  41 #define AVR_JTAG_INS_PROG_PAGEREAD                                      0x07
  42
  43 // Data Registers:
  44 #define AVR_JTAG_REG_Bypass_Len                                         1
  45 #define AVR_JTAG_REG_DeviceID_Len                                       32
  46
  47 #define AVR_JTAG_REG_Reset_Len                                          1
  48 #define AVR_JTAG_REG_JTAGID_Len                                         32
  49 #define AVR_JTAG_REG_ProgrammingEnable_Len                      16
  50 #define AVR_JTAG_REG_ProgrammingCommand_Len                     15
  51 #define AVR_JTAG_REG_FlashDataByte_Len                          16
  52
  53 struct avrf_type avft_chips_info[] =
  54 {
  55 //       name,                  chip_id,        flash_page_size,        flash_page_num, eeprom_page_size,       eeprom_page_num
  56         {"atmega128",   0x9702,         256,                            512,                    8,                                      512},
  57 };
  58
  59 int avr_jtag_sendinstr(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out);
  60 int avr_jtag_senddat(struct jtag_tap *tap, uint32_t *dr_in, uint32_t dr_out, int len);
  61
  62 int mcu_write_ir(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_len, int rti);
  63 int mcu_write_dr(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out, int dr_len, int rti);
  64 int mcu_write_ir_u8(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out, int ir_len, int rti);
  65 int mcu_write_dr_u8(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
  66 int mcu_write_ir_u16(struct jtag_tap *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti);
  67 int mcu_write_dr_u16(struct jtag_tap *tap, uint16_t *ir_in, uint16_t ir_out, int dr_len, int rti);
  68 int mcu_write_ir_u32(struct jtag_tap *tap, uint32_t *ir_in, uint32_t ir_out, int ir_len, int rti);
  69 int mcu_write_dr_u32(struct jtag_tap *tap, uint32_t *ir_in, uint32_t ir_out, int dr_len, int rti);
  70 int mcu_execute_queue(void);
  71
  72 /* avr program functions */
  73 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
  74 {
  75         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
  76         avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);
  77
  78         return ERROR_OK;
  79 }
  80
  81 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
  82 {
  83         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
  84         avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
  85
  86         return ERROR_OK;
  87 }
  88
  89 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
  90 {
  91         avr_jtag_reset(avr, 1);
  92
  93         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
  94         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
  95
  96         return ERROR_OK;
  97 }
  98
  99 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
 100 {
 101         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 102         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
 103         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
 104
 105         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
 106         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
 107
 108         avr_jtag_reset(avr, 0);
 109
 110         return ERROR_OK;
 111 }
 112
 113 static int avr_jtagprg_chiperase(struct avr_common *avr)
 114 {
 115         uint32_t poll_value;
 116
 117         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 118         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
 119         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
 120         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
 121         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
 122
 123         do {
 124                 poll_value = 0;
 125                 avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
 126                 if (ERROR_OK != mcu_execute_queue())
 127                 {
 128                         return ERROR_FAIL;
 129                 }
 130                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 131         } while (!(poll_value & 0x0200));
 132
 133         return ERROR_OK;
 134 }
 135
 136 static int avr_jtagprg_writeflashpage(struct avr_common *avr, uint8_t *page_buf, uint32_t buf_size, uint32_t addr, uint32_t page_size)
 137 {
 138         uint32_t i, poll_value;
 139
 140         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 141         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
 142
 143         // load addr high byte
 144         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0700 | ((addr >> 9) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
 145
 146         // load addr low byte
 147         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0300 | ((addr >> 1) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
 148
 149         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
 150
 151         for (i = 0; i < page_size; i++)
 152         {
 153                 if (i < buf_size)
 154                 {
 155                         avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
 156                 }
 157                 else
 158                 {
 159                         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
 160                 }
 161         }
 162
 163         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 164
 165         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 166         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
 167         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 168         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 169
 170         do {
 171                 poll_value = 0;
 172                 avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 173                 if (ERROR_OK != mcu_execute_queue())
 174                 {
 175                         return ERROR_FAIL;
 176                 }
 177                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 178         } while (!(poll_value & 0x0200));
 179
 180         return ERROR_OK;
 181 }
 182
 183 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
 184 {
 185         struct avrf_flash_bank *avrf_info;
 186
 187         if (CMD_ARGC < 6)
 188         {
 189                 LOG_WARNING("incomplete flash_bank avr configuration");
 190                 return ERROR_FLASH_BANK_INVALID;
 191         }
 192
 193         avrf_info = malloc(sizeof(struct avrf_flash_bank));
 194         bank->driver_priv = avrf_info;
 195
 196         avrf_info->probed = 0;
 197
 198         return ERROR_OK;
 199 }
 200
 201 static int avrf_erase(struct flash_bank *bank, int first, int last)
 202 {
 203         LOG_INFO("%s", __FUNCTION__);
 204         return ERROR_OK;
 205 }
 206
 207 static int avrf_protect(struct flash_bank *bank, int set, int first, int last)
 208 {
 209         LOG_INFO("%s", __FUNCTION__);
 210         return ERROR_OK;
 211 }
 212
 213 static int avrf_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
 214 {
 215         struct target *target = bank->target;
 216         struct avr_common *avr = target->arch_info;
 217         uint32_t cur_size, cur_buffer_size, page_size;
 218
 219         if (bank->target->state != TARGET_HALTED)
 220         {
 221                 LOG_ERROR("Target not halted");
 222                 return ERROR_TARGET_NOT_HALTED;
 223         }
 224
 225         page_size = bank->sectors[0].size;
 226         if ((offset % page_size) != 0)
 227         {
 228                 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment", offset, page_size);
 229                 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 230         }
 231
 232         LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
 233         LOG_DEBUG("count is %" PRId32 "", count);
 234
 235         if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
 236         {
 237                 return ERROR_FAIL;
 238         }
 239
 240         cur_size = 0;
 241         while (count > 0)
 242         {
 243                 if (count > page_size)
 244                 {
 245                         cur_buffer_size = page_size;
 246                 }
 247                 else
 248                 {
 249                         cur_buffer_size = count;
 250                 }
 251                 avr_jtagprg_writeflashpage(avr, buffer + cur_size, cur_buffer_size, offset + cur_size, page_size);
 252                 count -= cur_buffer_size;
 253                 cur_size += cur_buffer_size;
 254
 255                 keep_alive();
 256         }
 257
 258         return avr_jtagprg_leaveprogmode(avr);
 259 }
 260
 261 #define EXTRACT_MFG(X)  (((X) & 0xffe) >> 1)
 262 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
 263 #define EXTRACT_VER(X)  (((X) & 0xf0000000) >> 28)
 264 static int avrf_probe(struct flash_bank *bank)
 265 {
 266         struct target *target = bank->target;
 267         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 268         struct avr_common *avr = target->arch_info;
 269         struct avrf_type *avr_info = NULL;
 270         int i;
 271         uint32_t device_id;
 272
 273         if (bank->target->state != TARGET_HALTED)
 274         {
 275                 LOG_ERROR("Target not halted");
 276                 return ERROR_TARGET_NOT_HALTED;
 277         }
 278
 279         avrf_info->probed = 0;
 280
 281         avr_jtag_read_jtagid(avr, &device_id);
 282         if (ERROR_OK != mcu_execute_queue())
 283         {
 284                 return ERROR_FAIL;
 285         }
 286
 287         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 288         if (EXTRACT_MFG(device_id) != 0x1F)
 289         {
 290                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
 291         }
 292
 293         for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++)
 294         {
 295                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
 296                 {
 297                         avr_info = &avft_chips_info[i];
 298                         LOG_INFO("target device is %s", avr_info->name);
 299                         break;
 300                 }
 301         }
 302
 303         if (avr_info != NULL)
 304         {
 305                 // chip found
 306                 bank->base = 0x00000000;
 307                 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
 308                 bank->num_sectors = avr_info->flash_page_num;
 309                 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
 310
 311                 for (i = 0; i < avr_info->flash_page_num; i++)
 312                 {
 313                         bank->sectors[i].offset = i * avr_info->flash_page_size;
 314                         bank->sectors[i].size = avr_info->flash_page_size;
 315                         bank->sectors[i].is_erased = -1;
 316                         bank->sectors[i].is_protected = 1;
 317                 }
 318
 319                 avrf_info->probed = 1;
 320                 return ERROR_OK;
 321         }
 322         else
 323         {
 324                 // chip not supported
 325                 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
 326
 327                 avrf_info->probed = 1;
 328                 return ERROR_FAIL;
 329         }
 330 }
 331
 332 static int avrf_auto_probe(struct flash_bank *bank)
 333 {
 334         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 335         if (avrf_info->probed)
 336                 return ERROR_OK;
 337         return avrf_probe(bank);
 338 }
 339
 340 static int avrf_protect_check(struct flash_bank *bank)
 341 {
 342         LOG_INFO("%s", __FUNCTION__);
 343         return ERROR_OK;
 344 }
 345
 346 static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
 347 {
 348         struct target *target = bank->target;
 349         struct avr_common *avr = target->arch_info;
 350         struct avrf_type *avr_info = NULL;
 351         int i;
 352         uint32_t device_id;
 353
 354         if (bank->target->state != TARGET_HALTED)
 355         {
 356                 LOG_ERROR("Target not halted");
 357                 return ERROR_TARGET_NOT_HALTED;
 358         }
 359
 360         avr_jtag_read_jtagid(avr, &device_id);
 361         if (ERROR_OK != mcu_execute_queue())
 362         {
 363                 return ERROR_FAIL;
 364         }
 365
 366         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 367         if (EXTRACT_MFG(device_id) != 0x1F)
 368         {
 369                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
 370         }
 371
 372         for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++)
 373         {
 374                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
 375                 {
 376                         avr_info = &avft_chips_info[i];
 377                         LOG_INFO("target device is %s", avr_info->name);
 378
 379                         break;
 380                 }
 381         }
 382
 383         if (avr_info != NULL)
 384         {
 385                 // chip found
 386                 snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name, EXTRACT_VER(device_id));
 387                 return ERROR_OK;
 388         }
 389         else
 390         {
 391                 // chip not supported
 392                 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
 393                 return ERROR_FLASH_OPERATION_FAILED;
 394         }
 395 }
 396
 397 static int avrf_mass_erase(struct flash_bank *bank)
 398 {
 399         struct target *target = bank->target;
 400         struct avr_common *avr = target->arch_info;
 401
 402         if (target->state != TARGET_HALTED)
 403         {
 404                 LOG_ERROR("Target not halted");
 405                 return ERROR_TARGET_NOT_HALTED;
 406         }
 407
 408         if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
 409                 || (ERROR_OK != avr_jtagprg_chiperase(avr))
 410                 || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
 411         {
 412                 return ERROR_FAIL;
 413         }
 414
 415         return ERROR_OK;
 416 }
 417
 418 COMMAND_HANDLER(avrf_handle_mass_erase_command)
 419 {
 420         int i;
 421
 422         if (CMD_ARGC < 1)
 423         {
 424                 command_print(CMD_CTX, "avr mass_erase <bank>");
 425                 return ERROR_OK;
 426         }
 427
 428         struct flash_bank *bank;
 429         int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 430         if (ERROR_OK != retval)
 431                 return retval;
 432
 433         if (avrf_mass_erase(bank) == ERROR_OK)
 434         {
 435                 /* set all sectors as erased */
 436                 for (i = 0; i < bank->num_sectors; i++)
 437                 {
 438                         bank->sectors[i].is_erased = 1;
 439                 }
 440
 441                 command_print(CMD_CTX, "avr mass erase complete");
 442         }
 443         else
 444         {
 445                 command_print(CMD_CTX, "avr mass erase failed");
 446         }
 447
 448         LOG_DEBUG("%s", __FUNCTION__);
 449         return ERROR_OK;
 450 }
 451
 452 static const struct command_registration avrf_exec_command_handlers[] = {
 453         {
 454                 .name = "mass_erase",
 455                 .handler = avrf_handle_mass_erase_command,
 456                 .mode = COMMAND_EXEC,
 457                 .help = "erase entire device",
 458         },
 459         COMMAND_REGISTRATION_DONE
 460 };
 461 static const struct command_registration avrf_command_handlers[] = {
 462         {
 463                 .name = "avrf",
 464                 .mode = COMMAND_ANY,
 465                 .help = "AVR flash command group",
 466                 .chain = avrf_exec_command_handlers,
 467         },
 468         COMMAND_REGISTRATION_DONE
 469 };
 470
 471 struct flash_driver avr_flash = {
 472         .name = "avr",
 473         .commands = avrf_command_handlers,
 474         .flash_bank_command = avrf_flash_bank_command,
 475         .erase = avrf_erase,
 476         .protect = avrf_protect,
 477         .write = avrf_write,
 478         .probe = avrf_probe,
 479         .auto_probe = avrf_auto_probe,
 480         .erase_check = default_flash_mem_blank_check,
 481         .protect_check = avrf_protect_check,
 482         .info = avrf_info,
 483 };