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Merge from mainline (167278:168000).
[official-gcc/graphite-test-results.git] / gcc / config / rx / rx.h
blob35b5d58c4a415a5a46401e41c3f56347ddcbfec1
1 /* GCC backend definitions for the Renesas RX processor.
2 Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20 \f
21
22 #define TARGET_CPU_CPP_BUILTINS() \
23 do \
24 { \
25 builtin_define ("__RX__"); \
26 builtin_assert ("cpu=RX"); \
27 if (rx_cpu_type == RX610) \
28 { \
29 builtin_define ("__RX610__"); \
30 builtin_assert ("machine=RX610"); \
31 } \
32 else \
33 builtin_assert ("machine=RX600"); \
34 \
35 if (TARGET_BIG_ENDIAN_DATA) \
36 builtin_define ("__RX_BIG_ENDIAN__"); \
37 else \
38 builtin_define ("__RX_LITTLE_ENDIAN__");\
39 \
40 if (TARGET_64BIT_DOUBLES) \
41 builtin_define ("__RX_64BIT_DOUBLES__");\
42 else \
43 builtin_define ("__RX_32BIT_DOUBLES__");\
44 \
45 if (ALLOW_RX_FPU_INSNS) \
46 builtin_define ("__RX_FPU_INSNS__"); \
47 \
48 if (TARGET_AS100_SYNTAX) \
49 builtin_define ("__RX_AS100_SYNTAX__"); \
50 else \
51 builtin_define ("__RX_GAS_SYNTAX__"); \
52 } \
53 while (0)
54
55 enum rx_cpu_types
56 {
57 RX600,
58 RX610,
59 RX200
60 };
61
62 extern enum rx_cpu_types rx_cpu_type;
63
64 #undef CC1_SPEC
65 #define CC1_SPEC "\
66 %{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}} \
67 %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
68
69 #undef STARTFILE_SPEC
70 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
71
72 #undef ENDFILE_SPEC
73 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
74
75 #undef ASM_SPEC
76 #define ASM_SPEC "\
77 %{mbig-endian-data:-mbig-endian-data} \
78 %{m64bit-doubles:-m64bit-doubles} \
79 %{!m64bit-doubles:-m32bit-doubles} \
80 %{msmall-data-limit*:-msmall-data-limit} \
81 %{mrelax:-relax} \
82 "
83
84 #undef LIB_SPEC
85 #define LIB_SPEC " \
86 --start-group \
87 -lc \
88 %{msim*:-lsim}%{!msim*:-lnosys} \
89 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
90 --end-group \
91 %{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}} \
92 "
93
94 #undef LINK_SPEC
95 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
96 \f
97
98 #define BITS_BIG_ENDIAN 0
99 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
100 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
101
102 #define UNITS_PER_WORD 4
103
104 #define INT_TYPE_SIZE 32
105 #define LONG_TYPE_SIZE 32
106 #define LONG_LONG_TYPE_SIZE 64
107
108 #define FLOAT_TYPE_SIZE 32
109 #define DOUBLE_TYPE_SIZE (TARGET_64BIT_DOUBLES ? 64 : 32)
110 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
111
112 #ifdef __RX_32BIT_DOUBLES__
113 #define LIBGCC2_HAS_DF_MODE 0
114 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32
115 #else
116 #define LIBGCC2_HAS_DF_MODE 1
117 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
118 #endif
119
120 #define DEFAULT_SIGNED_CHAR 0
121
122 #define STRICT_ALIGNMENT 1
123 #define FUNCTION_BOUNDARY 8
124 #define BIGGEST_ALIGNMENT 32
125 #define STACK_BOUNDARY 32
126 #define PARM_BOUNDARY 8
127
128 #define STACK_GROWS_DOWNWARD 1
129 #define FRAME_GROWS_DOWNWARD 0
130 #define FIRST_PARM_OFFSET(FNDECL) 0
131
132 #define MAX_REGS_PER_ADDRESS 2
133
134 #define Pmode SImode
135 #define POINTER_SIZE 32
136 #undef SIZE_TYPE
137 #define SIZE_TYPE "long unsigned int"
138 #undef PTRDIFF_TYPE
139 #define PTRDIFF_TYPE "long int"
140 #undef WCHAR_TYPE
141 #define WCHAR_TYPE "long int"
142 #undef WCHAR_TYPE_SIZE
143 #define WCHAR_TYPE_SIZE BITS_PER_WORD
144 #define POINTERS_EXTEND_UNSIGNED 1
145 #define FUNCTION_MODE QImode
146 #define CASE_VECTOR_MODE Pmode
147 #define WORD_REGISTER_OPERATIONS 1
148 #define HAS_LONG_COND_BRANCH 0
149 #define HAS_LONG_UNCOND_BRANCH 0
150
151 #define MOVE_MAX 4
152 #define STARTING_FRAME_OFFSET 0
153
154 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
155
156 #define LEGITIMATE_CONSTANT_P(X) rx_is_legitimate_constant (X)
157
158 #define HAVE_PRE_DECCREMENT 1
159 #define HAVE_POST_INCREMENT 1
160
161 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
162 #define SLOW_BYTE_ACCESS 1
163
164 #define STORE_FLAG_VALUE 1
165 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
166 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
167 \f
168 enum reg_class
169 {
170 NO_REGS, /* No registers in set. */
171 GR_REGS, /* Integer registers. */
172 ALL_REGS, /* All registers. */
173 LIM_REG_CLASSES /* Max value + 1. */
174 };
175
176 #define REG_CLASS_NAMES \
177 { \
178 "NO_REGS", \
179 "GR_REGS", \
180 "ALL_REGS" \
181 }
182
183 #define REG_CLASS_CONTENTS \
184 { \
185 { 0x00000000 }, /* No registers, */ \
186 { 0x0000ffff }, /* Integer registers. */ \
187 { 0x0000ffff } /* All registers. */ \
188 }
189
190 #define IRA_COVER_CLASSES \
191 { \
192 GR_REGS, LIM_REG_CLASSES \
193 }
194
195 #define SMALL_REGISTER_CLASSES 0
196 #define N_REG_CLASSES (int) LIM_REG_CLASSES
197 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
198 + UNITS_PER_WORD - 1) \
199 / UNITS_PER_WORD)
200
201 #define GENERAL_REGS GR_REGS
202 #define BASE_REG_CLASS GR_REGS
203 #define INDEX_REG_CLASS GR_REGS
204
205 #define FIRST_PSEUDO_REGISTER 17
206
207 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
208 ? GR_REGS : NO_REGS)
209
210 #define STACK_POINTER_REGNUM 0
211 #define FUNC_RETURN_REGNUM 1
212 #define FRAME_POINTER_REGNUM 6
213 #define ARG_POINTER_REGNUM 7
214 #define STATIC_CHAIN_REGNUM 8
215 #define TRAMPOLINE_TEMP_REGNUM 9
216 #define STRUCT_VAL_REGNUM 15
217 #define CC_REGNUM 16
218
219 /* This is the register which is used to hold the address of the start
220 of the small data area, if that feature is being used. Note - this
221 register must not be call_used because otherwise library functions
222 that are compiled without small data support might clobber it.
223
224 FIXME: The function gcc/config/rx/rx.c:rx_gen_move_template() has a
225 built in copy of this register's name, rather than constructing the
226 name from this #define. */
227 #define GP_BASE_REGNUM 13
228
229 #define ELIMINABLE_REGS \
230 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
231 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
232 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
233
234 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
235 (OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
236
237
238 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
239 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
240 #define DEFAULT_PCC_STRUCT_RETURN 0
241
242 #define FIXED_REGISTERS \
243 { \
244 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 \
245 }
246
247 #define CALL_USED_REGISTERS \
248 { \
249 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 \
250 }
251
252 #define LIBCALL_VALUE(MODE) \
253 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
254 || GET_MODE_SIZE (MODE) >= 4) \
255 ? (MODE) \
256 : SImode), \
257 FUNC_RETURN_REGNUM)
258
259 /* Order of allocation of registers. */
260
261 #define REG_ALLOC_ORDER \
262 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
263 }
264
265 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \
266 (IN_RANGE ((REGNO), (MIN), (MAX)) \
267 || (reg_renumber != NULL \
268 && reg_renumber[(REGNO)] >= (MIN) \
269 && reg_renumber[(REGNO)] <= (MAX)))
270
271 #ifdef REG_OK_STRICT
272 #define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
273 #else
274 #define REGNO_OK_FOR_BASE_P(regno) 1
275 #endif
276
277 #define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
278
279 #define RTX_OK_FOR_BASE(X, STRICT) \
280 ((STRICT) ? \
281 ( (REG_P (X) \
282 && REGNO_IN_RANGE (REGNO (X), 0, 15)) \
283 || (GET_CODE (X) == SUBREG \
284 && REG_P (SUBREG_REG (X)) \
285 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
286 : \
287 ( (REG_P (X) \
288 || (GET_CODE (X) == SUBREG \
289 && REG_P (SUBREG_REG (X))))))
290
291 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
292 do \
293 { \
294 if (rx_is_mode_dependent_addr (ADDR)) \
295 goto LABEL; \
296 } \
297 while (0)
298 \f
299
300 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
301 ((COUNT) == 0 \
302 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
303 : NULL_RTX)
304
305 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
306
307 #define ACCUMULATE_OUTGOING_ARGS 1
308
309 typedef unsigned int CUMULATIVE_ARGS;
310
311 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
312 (CUM) = 0
313
314 \f
315 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
316 #define TRAMPOLINE_ALIGNMENT 32
317 \f
318 #define NO_PROFILE_COUNTERS 1
319 #define PROFILE_BEFORE_PROLOGUE 1
320
321 #define FUNCTION_PROFILER(FILE, LABELNO) \
322 fprintf (FILE, "\tbsr\t__mcount\n");
323 \f
324
325 #define HARD_REGNO_NREGS(REGNO, MODE) CLASS_MAX_NREGS (0, MODE)
326
327 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
328 REGNO_REG_CLASS (REGNO) == GR_REGS
329
330 #define MODES_TIEABLE_P(MODE1, MODE2) \
331 ( ( GET_MODE_CLASS (MODE1) == MODE_FLOAT \
332 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
333 == ( GET_MODE_CLASS (MODE2) == MODE_FLOAT \
334 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
335 \f
336
337 #define REGISTER_NAMES \
338 { \
339 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
340 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "cc" \
341 }
342
343 #define ADDITIONAL_REGISTER_NAMES \
344 { \
345 { "sp", STACK_POINTER_REGNUM } \
346 , { "fp", FRAME_POINTER_REGNUM } \
347 , { "arg", ARG_POINTER_REGNUM } \
348 , { "chain", STATIC_CHAIN_REGNUM } \
349 }
350
351 #define DATA_SECTION_ASM_OP \
352 (TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
353 : "\t.section D,\"aw\",@progbits\n\t.p2align 2")
354
355 #define SDATA_SECTION_ASM_OP \
356 (TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
357 : "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
358
359 #undef READONLY_DATA_SECTION_ASM_OP
360 #define READONLY_DATA_SECTION_ASM_OP \
361 (TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
362 : "\t.section C,\"a\",@progbits\n\t.p2align 2")
363
364 #define BSS_SECTION_ASM_OP \
365 (TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
366 : "\t.section B,\"w\",@nobits\n\t.p2align 2")
367
368 #define SBSS_SECTION_ASM_OP \
369 (TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
370 : "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
371
372 /* The following definitions are conditional depending upon whether the
373 compiler is being built or crtstuff.c is being compiled by the built
374 compiler. */
375 #if defined CRT_BEGIN || defined CRT_END
376 # ifdef __RX_AS100_SYNTAX
377 # define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
378 # define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
379 # define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
380 # define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
381 # define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
382 # else
383 # define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
384 # define CTORS_SECTION_ASM_OP \
385 "\t.section\t.init_array,\"aw\",@init_array"
386 # define DTORS_SECTION_ASM_OP \
387 "\t.section\t.fini_array,\"aw\",@fini_array"
388 # define INIT_ARRAY_SECTION_ASM_OP \
389 "\t.section\t.init_array,\"aw\",@init_array"
390 # define FINI_ARRAY_SECTION_ASM_OP \
391 "\t.section\t.fini_array,\"aw\",@fini_array"
392 # endif
393 #else
394 # define TEXT_SECTION_ASM_OP \
395 (TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
396
397 # define CTORS_SECTION_ASM_OP \
398 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
399 : "\t.section\t.init_array,\"aw\",@init_array")
400
401 # define DTORS_SECTION_ASM_OP \
402 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
403 : "\t.section\t.fini_array,\"aw\",@fini_array")
404
405 # define INIT_ARRAY_SECTION_ASM_OP \
406 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
407 : "\t.section\t.init_array,\"aw\",@init_array")
408
409 # define FINI_ARRAY_SECTION_ASM_OP \
410 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
411 : "\t.section\t.fini_array,\"aw\",@fini_array")
412 #endif
413
414 #define GLOBAL_ASM_OP \
415 (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
416 #define ASM_COMMENT_START " ;"
417 #define ASM_APP_ON ""
418 #define ASM_APP_OFF ""
419 #define LOCAL_LABEL_PREFIX "L"
420 #undef USER_LABEL_PREFIX
421 #define USER_LABEL_PREFIX "_"
422
423 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
424 do \
425 { \
426 if ((LOG) == 0) \
427 break; \
428 if (TARGET_AS100_SYNTAX) \
429 { \
430 if ((LOG) >= 2) \
431 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
432 else \
433 fprintf (STREAM, "\t.ALIGN 2\n"); \
434 } \
435 else \
436 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
437 } \
438 while (0)
439
440 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
441 fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
442 VALUE)
443
444 /* This is how to output an element of a case-vector that is relative.
445 Note: The local label referenced by the "3b" below is emitted by
446 the tablejump insn. */
447
448 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
449 fprintf (FILE, TARGET_AS100_SYNTAX \
450 ? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
451
452 #define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
453 do \
454 { \
455 HOST_WIDE_INT size_ = (SIZE); \
456 \
457 /* The as100 assembler does not have an equivalent of the SVR4 \
458 .size pseudo-op. */ \
459 if (TARGET_AS100_SYNTAX) \
460 break; \
461 \
462 fputs (SIZE_ASM_OP, STREAM); \
463 assemble_name (STREAM, NAME); \
464 fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
465 } \
466 while (0)
467
468 #define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
469 do \
470 { \
471 /* The as100 assembler does not have an equivalent of the SVR4 \
472 .size pseudo-op. */ \
473 if (TARGET_AS100_SYNTAX) \
474 break; \
475 fputs (SIZE_ASM_OP, STREAM); \
476 assemble_name (STREAM, NAME); \
477 fputs (", .-", STREAM); \
478 assemble_name (STREAM, NAME); \
479 putc ('\n', STREAM); \
480 } \
481 while (0)
482
483 #define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
484 do \
485 { \
486 /* The as100 assembler does not have an equivalent of the SVR4 \
487 .size pseudo-op. */ \
488 if (TARGET_AS100_SYNTAX) \
489 break; \
490 fputs (TYPE_ASM_OP, STREAM); \
491 assemble_name (STREAM, NAME); \
492 fputs (", ", STREAM); \
493 fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
494 putc ('\n', STREAM); \
495 } \
496 while (0)
497
498 #undef ASM_GENERATE_INTERNAL_LABEL
499 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
500 do \
501 { \
502 sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
503 PREFIX, (unsigned) (NUM)); \
504 } \
505 while (0)
506
507 #undef ASM_OUTPUT_EXTERNAL
508 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
509 do \
510 { \
511 if (TARGET_AS100_SYNTAX) \
512 targetm.asm_out.globalize_label (FILE, NAME); \
513 default_elf_asm_output_external (FILE, DECL, NAME); \
514 } \
515 while (0)
516
517 #undef ASM_OUTPUT_ALIGNED_COMMON
518 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
519 do \
520 { \
521 if (TARGET_AS100_SYNTAX) \
522 { \
523 fprintf ((FILE), "\t.GLB\t"); \
524 assemble_name ((FILE), (NAME)); \
525 fprintf ((FILE), "\n"); \
526 assemble_name ((FILE), (NAME)); \
527 switch ((ALIGN) / BITS_PER_UNIT) \
528 { \
529 case 4: \
530 fprintf ((FILE), ":\t.BLKL\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
531 (SIZE) / 4); \
532 break; \
533 case 2: \
534 fprintf ((FILE), ":\t.BLKW\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
535 (SIZE) / 2); \
536 break; \
537 default: \
538 fprintf ((FILE), ":\t.BLKB\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
539 (SIZE)); \
540 break; \
541 } \
542 } \
543 else \
544 { \
545 fprintf ((FILE), "%s", COMMON_ASM_OP); \
546 assemble_name ((FILE), (NAME)); \
547 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
548 (SIZE), (ALIGN) / BITS_PER_UNIT); \
549 } \
550 } \
551 while (0)
552
553 #undef SKIP_ASM_OP
554 #define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
555
556 #undef ASM_OUTPUT_LIMITED_STRING
557 #define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
558 do \
559 { \
560 const unsigned char *_limited_str = \
561 (const unsigned char *) (STR); \
562 unsigned ch; \
563 \
564 fprintf ((FILE), TARGET_AS100_SYNTAX \
565 ? "\t.BYTE\t\"" : "\t.string\t\""); \
566 \
567 for (; (ch = *_limited_str); _limited_str++) \
568 { \
569 int escape; \
570 \
571 switch (escape = ESCAPES[ch]) \
572 { \
573 case 0: \
574 putc (ch, (FILE)); \
575 break; \
576 case 1: \
577 fprintf ((FILE), "\\%03o", ch); \
578 break; \
579 default: \
580 putc ('\\', (FILE)); \
581 putc (escape, (FILE)); \
582 break; \
583 } \
584 } \
585 \
586 fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
587 } \
588 while (0)
589
590 #undef IDENT_ASM_OP
591 #define IDENT_ASM_OP (TARGET_AS100_SYNTAX \
592 ? "\t.END\t; Built by: ": "\t.ident\t")
593
594 /* For PIC put jump tables into the text section so that the offsets that
595 they contain are always computed between two same-section symbols. */
596 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
597 \f
598 extern int rx_float_compare_mode;
599 \f
600 /* This is a version of REG_P that also returns TRUE for SUBREGs. */
601 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
602
603 /* Like REG_P except that this macro is true for SET expressions. */
604 #define SET_P(rtl) (GET_CODE (rtl) == SET)
605 \f
606 /* The AS100 assembler does not support .leb128 and .uleb128, but
607 the compiler-build-time configure tests will have enabled their
608 use because GAS supports them. So default to generating STABS
609 debug information instead of DWARF2 when generating AS100
610 compatible output. */
611 #undef PREFERRED_DEBUGGING_TYPE
612 #define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
613 ? DBX_DEBUG : DWARF2_DEBUG)
614
615 #define INCOMING_FRAME_SP_OFFSET 4
616 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4
617 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 4
618 \f
619 #define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
620
621 /* This macro is used to decide when RX FPU instructions can be used. */
622 #define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU)
623
624 #define BRANCH_COST(SPEED,PREDICT) 1
625 #define REGISTER_MOVE_COST(MODE,FROM,TO) 2
626
627 #define SELECT_CC_MODE(OP,X,Y) \
628 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CC_ZSmode : \
629 (GET_CODE (X) == PLUS || GET_CODE (X) == MINUS ? CC_ZSCmode : \
630 (GET_CODE (X) == ABS ? CC_ZSOmode : \
631 (GET_CODE (X) == AND || GET_CODE (X) == NOT || GET_CODE (X) == IOR \
632 || GET_CODE (X) == XOR || GET_CODE (X) == ROTATE \
633 || GET_CODE (X) == ROTATERT || GET_CODE (X) == ASHIFTRT \
634 || GET_CODE (X) == LSHIFTRT || GET_CODE (X) == ASHIFT ? CC_ZSmode : \
635 CCmode))))
GCC graphite test results