Merge from mainline (165734:167278).
[official-gcc/graphite-test-results.git] / gcc / testsuite / c-c++-common / pr44832.c
blobccb2826ee08153cdd70340ba9933ecbc407fdbd2
1 /* PR debug/44832 */
2 /* { dg-do compile } */
3 /* { dg-options "-O2 -fcompare-debug" } */
4 /* { dg-options "-O2 -fcompare-debug -fno-short-enums" {target short_enums} } */
6 struct rtx_def;
7 typedef struct rtx_def *rtx;
8 typedef const struct rtx_def *const_rtx;
9 struct rtvec_def;
10 typedef struct rtvec_def *rtvec;
11 extern int ix86_isa_flags;
13 enum machine_mode
15 VOIDmode,
16 V8HImode,
17 V16QImode,
18 V4SImode,
19 V2DImode,
20 V32QImode,
21 MAX_MACHINE_MODE,
23 NUM_MACHINE_MODES = MAX_MACHINE_MODE
25 extern unsigned char mode_size[NUM_MACHINE_MODES];
26 extern const unsigned char mode_inner[NUM_MACHINE_MODES];
27 extern const unsigned char mode_nunits[NUM_MACHINE_MODES];
28 enum rtx_code {
30 CONST_INT ,
32 CONST_FIXED ,
34 CONST_DOUBLE
37 union rtunion_def
39 rtvec rt_rtvec;
41 typedef union rtunion_def rtunion;
42 struct rtx_def {
44 __extension__ enum rtx_code code: 16;
46 __extension__ enum machine_mode mode : 8;
48 union u {
49 rtunion fld[1];
50 } u;
52 struct rtvec_def {
53 rtx elem[1];
55 extern int rtx_equal_p (const_rtx, const_rtx);
56 extern rtx gen_reg_rtx (enum machine_mode);
58 extern void
59 ix86_expand_vector_init_concat (enum machine_mode mode,
60 rtx target, rtx *ops, int n);
62 static void
63 ix86_expand_vector_init_general (unsigned char mmx_ok, enum machine_mode mode,
64 rtx target, rtx vals)
66 rtx ops[32], op0, op1;
67 enum machine_mode half_mode = VOIDmode;
68 int n, i;
70 switch (mode)
72 case V4SImode:
73 case V2DImode:
74 n = mode_nunits[mode];
75 ix86_expand_vector_init_concat (mode, target, ops, n);
76 return;
78 case V32QImode:
79 goto half;
80 half:
82 typedef int eger;
83 if (mode != V4SImode)
84 ops[0] = 0;
86 n = mode_nunits[mode];
87 for (i = 0; i < n; i++)
88 ops[i] = (((((vals)->u.fld[0]).rt_rtvec))->elem[i]);
89 op0 = gen_reg_rtx (VOIDmode);
90 return;
92 case V16QImode:
93 if (!((ix86_isa_flags & (1 << 19)) != 0))
94 break;
96 case V8HImode:
97 if (!((ix86_isa_flags & (1 << 17)) != 0))
98 break;
100 n = mode_nunits[mode];
101 for (i = 0; i < n; i++)
102 ops[i] = (((((vals)->u.fld[0]).rt_rtvec))->elem[i]);
103 return;
105 default:
110 int n_words;
112 n_words = ((unsigned short) mode_size[mode]) / 4;
114 if (n_words == 4)
115 ix86_expand_vector_init_general (0, V4SImode, 0, 0);
120 void
121 ix86_expand_vector_init (unsigned char mmx_ok, rtx target, rtx vals)
123 enum machine_mode mode = ((enum machine_mode) (target)->mode);
124 enum machine_mode inner_mode = ((enum machine_mode) mode_inner[mode]);
125 int n_elts = mode_nunits[mode];
126 int n_var = 0, one_var = -1;
127 unsigned char all_same = 1, all_const_zero = 1;
128 int i;
129 rtx x;
131 for (i = 0; i < n_elts; ++i)
133 x = (((((vals)->u.fld[0]).rt_rtvec))->elem[i]);
134 if (!((((enum rtx_code) (x)->code) == CONST_INT)
135 || ((enum rtx_code) (x)->code) == CONST_DOUBLE
136 || ((enum rtx_code) (x)->code) == CONST_FIXED))
137 n_var++, one_var = i;
138 else
139 all_const_zero = 0;
140 if (i > 0 && !rtx_equal_p (x, (((((vals)->u.fld[0]).rt_rtvec))->elem[0])))
141 all_same = 0;
145 if (n_var == 0)
147 return;
150 if (all_same)
151 return;
153 if (n_var == 1)
155 if (all_const_zero)
156 return;
160 ix86_expand_vector_init_general (mmx_ok, mode, target, vals);