1 /* score7.c for Sunplus S+CORE processor
2 Copyright (C) 2005, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
3 Contributed by Sunnorth
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
27 #include "hard-reg-set.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-attr.h"
32 #include "diagnostic-core.h"
47 #include "target-def.h"
48 #include "integrate.h"
49 #include "langhooks.h"
50 #include "cfglayout.h"
54 #define BITSET_P(VALUE, BIT) (((VALUE) & (1L << (BIT))) != 0)
55 #define INS_BUF_SZ 128
57 extern enum reg_class score_char_to_class
[256];
59 static int score7_sdata_max
;
60 static char score7_ins
[INS_BUF_SZ
+ 8];
62 /* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points
63 to the same object as SYMBOL. */
65 score7_offset_within_object_p (rtx symbol
, HOST_WIDE_INT offset
)
67 if (GET_CODE (symbol
) != SYMBOL_REF
)
70 if (CONSTANT_POOL_ADDRESS_P (symbol
)
72 && offset
< (int)GET_MODE_SIZE (get_pool_mode (symbol
)))
75 if (SYMBOL_REF_DECL (symbol
) != 0
77 && offset
< int_size_in_bytes (TREE_TYPE (SYMBOL_REF_DECL (symbol
))))
83 /* Split X into a base and a constant offset, storing them in *BASE
84 and *OFFSET respectively. */
86 score7_split_const (rtx x
, rtx
*base
, HOST_WIDE_INT
*offset
)
90 if (GET_CODE (x
) == CONST
)
93 if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
95 *offset
+= INTVAL (XEXP (x
, 1));
102 /* Classify symbol X, which must be a SYMBOL_REF or a LABEL_REF. */
103 static enum score_symbol_type
104 score7_classify_symbol (rtx x
)
106 if (GET_CODE (x
) == LABEL_REF
)
107 return SYMBOL_GENERAL
;
109 gcc_assert (GET_CODE (x
) == SYMBOL_REF
);
111 if (CONSTANT_POOL_ADDRESS_P (x
))
113 if (GET_MODE_SIZE (get_pool_mode (x
)) <= SCORE7_SDATA_MAX
)
114 return SYMBOL_SMALL_DATA
;
115 return SYMBOL_GENERAL
;
117 if (SYMBOL_REF_SMALL_P (x
))
118 return SYMBOL_SMALL_DATA
;
119 return SYMBOL_GENERAL
;
122 /* Return true if the current function must save REGNO. */
124 score7_save_reg_p (unsigned int regno
)
126 /* Check call-saved registers. */
127 if (df_regs_ever_live_p (regno
) && !call_used_regs
[regno
])
130 /* We need to save the old frame pointer before setting up a new one. */
131 if (regno
== HARD_FRAME_POINTER_REGNUM
&& frame_pointer_needed
)
134 /* We need to save the incoming return address if it is ever clobbered
135 within the function. */
136 if (regno
== RA_REGNUM
&& df_regs_ever_live_p (regno
))
142 /* Return one word of double-word value OP, taking into account the fixed
143 endianness of certain registers. HIGH_P is true to select the high part,
144 false to select the low part. */
146 score7_subw (rtx op
, int high_p
)
149 enum machine_mode mode
= GET_MODE (op
);
151 if (mode
== VOIDmode
)
154 byte
= (TARGET_LITTLE_ENDIAN
? high_p
: !high_p
) ? UNITS_PER_WORD
: 0;
156 if (GET_CODE (op
) == REG
&& REGNO (op
) == HI_REGNUM
)
157 return gen_rtx_REG (SImode
, high_p
? HI_REGNUM
: LO_REGNUM
);
159 if (GET_CODE (op
) == MEM
)
160 return adjust_address (op
, SImode
, byte
);
162 return simplify_gen_subreg (SImode
, op
, mode
, byte
);
165 static struct score7_frame_info
*
166 score7_cached_frame (void)
168 static struct score7_frame_info _frame_info
;
172 /* Return the bytes needed to compute the frame pointer from the current
173 stack pointer. SIZE is the size (in bytes) of the local variables. */
174 static struct score7_frame_info
*
175 score7_compute_frame_size (HOST_WIDE_INT size
)
178 struct score7_frame_info
*f
= score7_cached_frame ();
180 memset (f
, 0, sizeof (struct score7_frame_info
));
183 f
->var_size
= SCORE7_STACK_ALIGN (size
);
184 f
->args_size
= crtl
->outgoing_args_size
;
185 f
->cprestore_size
= flag_pic
? UNITS_PER_WORD
: 0;
186 if (f
->var_size
== 0 && current_function_is_leaf
)
187 f
->args_size
= f
->cprestore_size
= 0;
189 if (f
->args_size
== 0 && cfun
->calls_alloca
)
190 f
->args_size
= UNITS_PER_WORD
;
192 f
->total_size
= f
->var_size
+ f
->args_size
+ f
->cprestore_size
;
193 for (regno
= GP_REG_FIRST
; regno
<= GP_REG_LAST
; regno
++)
195 if (score7_save_reg_p (regno
))
197 f
->gp_reg_size
+= GET_MODE_SIZE (SImode
);
198 f
->mask
|= 1 << (regno
- GP_REG_FIRST
);
202 if (crtl
->calls_eh_return
)
207 regno
= EH_RETURN_DATA_REGNO (i
);
208 if (regno
== INVALID_REGNUM
)
210 f
->gp_reg_size
+= GET_MODE_SIZE (SImode
);
211 f
->mask
|= 1 << (regno
- GP_REG_FIRST
);
215 f
->total_size
+= f
->gp_reg_size
;
216 f
->num_gp
= f
->gp_reg_size
/ UNITS_PER_WORD
;
220 HOST_WIDE_INT offset
;
221 offset
= (f
->args_size
+ f
->cprestore_size
+ f
->var_size
222 + f
->gp_reg_size
- GET_MODE_SIZE (SImode
));
223 f
->gp_sp_offset
= offset
;
231 /* Return true if X is a valid base register for the given mode.
232 Allow only hard registers if STRICT. */
234 score7_valid_base_register_p (rtx x
, int strict
)
236 if (!strict
&& GET_CODE (x
) == SUBREG
)
239 return (GET_CODE (x
) == REG
240 && score7_regno_mode_ok_for_base_p (REGNO (x
), strict
));
243 /* Return true if X is a valid address for machine mode MODE. If it is,
244 fill in INFO appropriately. STRICT is true if we should only accept
245 hard base registers. */
247 score7_classify_address (struct score7_address_info
*info
,
248 enum machine_mode mode
, rtx x
, int strict
)
250 info
->code
= GET_CODE (x
);
256 info
->type
= SCORE7_ADD_REG
;
258 info
->offset
= const0_rtx
;
259 return score7_valid_base_register_p (info
->reg
, strict
);
261 info
->type
= SCORE7_ADD_REG
;
262 info
->reg
= XEXP (x
, 0);
263 info
->offset
= XEXP (x
, 1);
264 return (score7_valid_base_register_p (info
->reg
, strict
)
265 && GET_CODE (info
->offset
) == CONST_INT
266 && IMM_IN_RANGE (INTVAL (info
->offset
), 15, 1));
271 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (SImode
))
273 info
->type
= SCORE7_ADD_REG
;
274 info
->reg
= XEXP (x
, 0);
275 info
->offset
= GEN_INT (GET_MODE_SIZE (mode
));
276 return score7_valid_base_register_p (info
->reg
, strict
);
278 info
->type
= SCORE7_ADD_CONST_INT
;
279 return IMM_IN_RANGE (INTVAL (x
), 15, 1);
283 info
->type
= SCORE7_ADD_SYMBOLIC
;
284 return (score7_symbolic_constant_p (x
, &info
->symbol_type
)
285 && (info
->symbol_type
== SYMBOL_GENERAL
286 || info
->symbol_type
== SYMBOL_SMALL_DATA
));
293 score7_return_in_memory (const_tree type
, const_tree fndecl ATTRIBUTE_UNUSED
)
295 return ((TYPE_MODE (type
) == BLKmode
)
296 || (int_size_in_bytes (type
) > 2 * UNITS_PER_WORD
)
297 || (int_size_in_bytes (type
) == -1));
300 /* Return a legitimate address for REG + OFFSET. */
302 score7_add_offset (rtx reg
, HOST_WIDE_INT offset
)
304 if (!IMM_IN_RANGE (offset
, 15, 1))
306 reg
= expand_simple_binop (GET_MODE (reg
), PLUS
,
307 gen_int_mode (offset
& 0xffffc000,
309 reg
, NULL
, 0, OPTAB_WIDEN
);
313 return plus_constant (reg
, offset
);
316 /* Implement TARGET_ASM_OUTPUT_MI_THUNK. Generate rtl rather than asm text
317 in order to avoid duplicating too much logic from elsewhere. */
319 score7_output_mi_thunk (FILE *file
, tree thunk_fndecl ATTRIBUTE_UNUSED
,
320 HOST_WIDE_INT delta
, HOST_WIDE_INT vcall_offset
,
323 rtx this_rtx
, temp1
, insn
, fnaddr
;
325 /* Pretend to be a post-reload pass while generating rtl. */
326 reload_completed
= 1;
328 /* Mark the end of the (empty) prologue. */
329 emit_note (NOTE_INSN_PROLOGUE_END
);
331 /* We need two temporary registers in some cases. */
332 temp1
= gen_rtx_REG (Pmode
, 8);
334 /* Find out which register contains the "this" pointer. */
335 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function
)), function
))
336 this_rtx
= gen_rtx_REG (Pmode
, ARG_REG_FIRST
+ 1);
338 this_rtx
= gen_rtx_REG (Pmode
, ARG_REG_FIRST
);
340 /* Add DELTA to THIS_RTX. */
343 rtx offset
= GEN_INT (delta
);
344 if (!CONST_OK_FOR_LETTER_P (delta
, 'L'))
346 emit_move_insn (temp1
, offset
);
349 emit_insn (gen_add3_insn (this_rtx
, this_rtx
, offset
));
352 /* If needed, add *(*THIS_RTX + VCALL_OFFSET) to THIS_RTX. */
353 if (vcall_offset
!= 0)
357 /* Set TEMP1 to *THIS_RTX. */
358 emit_move_insn (temp1
, gen_rtx_MEM (Pmode
, this_rtx
));
360 /* Set ADDR to a legitimate address for *THIS_RTX + VCALL_OFFSET. */
361 addr
= score7_add_offset (temp1
, vcall_offset
);
363 /* Load the offset and add it to THIS_RTX. */
364 emit_move_insn (temp1
, gen_rtx_MEM (Pmode
, addr
));
365 emit_insn (gen_add3_insn (this_rtx
, this_rtx
, temp1
));
368 /* Jump to the target function. */
369 fnaddr
= XEXP (DECL_RTL (function
), 0);
370 insn
= emit_call_insn (gen_sibcall_internal_score7 (fnaddr
, const0_rtx
));
371 SIBLING_CALL_P (insn
) = 1;
373 /* Run just enough of rest_of_compilation. This sequence was
374 "borrowed" from alpha.c. */
376 insn_locators_alloc ();
377 split_all_insns_noflow ();
378 shorten_branches (insn
);
379 final_start_function (insn
, file
, 1);
380 final (insn
, file
, 1);
381 final_end_function ();
383 /* Clean up the vars set above. Note that final_end_function resets
384 the global pointer for us. */
385 reload_completed
= 0;
388 /* Copy VALUE to a register and return that register. If new psuedos
389 are allowed, copy it into a new register, otherwise use DEST. */
391 score7_force_temporary (rtx dest
, rtx value
)
393 if (can_create_pseudo_p ())
394 return force_reg (Pmode
, value
);
397 emit_move_insn (copy_rtx (dest
), value
);
402 /* Return a LO_SUM expression for ADDR. TEMP is as for score_force_temporary
403 and is used to load the high part into a register. */
405 score7_split_symbol (rtx temp
, rtx addr
)
407 rtx high
= score7_force_temporary (temp
,
408 gen_rtx_HIGH (Pmode
, copy_rtx (addr
)));
409 return gen_rtx_LO_SUM (Pmode
, high
, addr
);
412 /* This function is used to implement LEGITIMIZE_ADDRESS. If X can
413 be legitimized in a way that the generic machinery might not expect,
414 return the new address. */
416 score7_legitimize_address (rtx x
)
418 enum score_symbol_type symbol_type
;
420 if (score7_symbolic_constant_p (x
, &symbol_type
)
421 && symbol_type
== SYMBOL_GENERAL
)
422 return score7_split_symbol (0, x
);
424 if (GET_CODE (x
) == PLUS
425 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
427 rtx reg
= XEXP (x
, 0);
428 if (!score7_valid_base_register_p (reg
, 0))
429 reg
= copy_to_mode_reg (Pmode
, reg
);
430 return score7_add_offset (reg
, INTVAL (XEXP (x
, 1)));
436 /* Fill INFO with information about a single argument. CUM is the
437 cumulative state for earlier arguments. MODE is the mode of this
438 argument and TYPE is its type (if known). NAMED is true if this
439 is a named (fixed) argument rather than a variable one. */
441 score7_classify_arg (const CUMULATIVE_ARGS
*cum
, enum machine_mode mode
,
442 const_tree type
, bool named
, struct score7_arg_info
*info
)
445 unsigned int num_words
, max_regs
;
448 if (GET_MODE_CLASS (mode
) == MODE_INT
449 || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
450 even_reg_p
= (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
);
452 if (type
!= NULL_TREE
&& TYPE_ALIGN (type
) > BITS_PER_WORD
&& named
)
455 if (TARGET_MUST_PASS_IN_STACK (mode
, type
))
456 info
->reg_offset
= ARG_REG_NUM
;
459 info
->reg_offset
= cum
->num_gprs
;
461 info
->reg_offset
+= info
->reg_offset
& 1;
465 info
->num_bytes
= int_size_in_bytes (type
);
467 info
->num_bytes
= GET_MODE_SIZE (mode
);
469 num_words
= (info
->num_bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
470 max_regs
= ARG_REG_NUM
- info
->reg_offset
;
472 /* Partition the argument between registers and stack. */
473 info
->reg_words
= MIN (num_words
, max_regs
);
474 info
->stack_words
= num_words
- info
->reg_words
;
476 /* The alignment applied to registers is also applied to stack arguments. */
477 if (info
->stack_words
)
479 info
->stack_offset
= cum
->stack_words
;
481 info
->stack_offset
+= info
->stack_offset
& 1;
485 /* Set up the stack and frame (if desired) for the function. */
487 score7_function_prologue (FILE *file
, HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
490 struct score7_frame_info
*f
= score7_cached_frame ();
491 HOST_WIDE_INT tsize
= f
->total_size
;
493 fnname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
494 if (!flag_inhibit_size_directive
)
496 fputs ("\t.ent\t", file
);
497 assemble_name (file
, fnname
);
500 assemble_name (file
, fnname
);
503 if (!flag_inhibit_size_directive
)
506 "\t.frame\t%s," HOST_WIDE_INT_PRINT_DEC
",%s, %d\t\t"
507 "# vars= " HOST_WIDE_INT_PRINT_DEC
", regs= %d"
508 ", args= " HOST_WIDE_INT_PRINT_DEC
509 ", gp= " HOST_WIDE_INT_PRINT_DEC
"\n",
510 (reg_names
[(frame_pointer_needed
)
511 ? HARD_FRAME_POINTER_REGNUM
: STACK_POINTER_REGNUM
]),
513 reg_names
[RA_REGNUM
],
514 current_function_is_leaf
? 1 : 0,
520 fprintf(file
, "\t.mask\t0x%08x," HOST_WIDE_INT_PRINT_DEC
"\n",
522 (f
->gp_sp_offset
- f
->total_size
));
526 /* Do any necessary cleanup after a function to restore stack, frame,
529 score7_function_epilogue (FILE *file
,
530 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
532 if (!flag_inhibit_size_directive
)
535 fnname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
536 fputs ("\t.end\t", file
);
537 assemble_name (file
, fnname
);
542 /* Returns true if X contains a SYMBOL_REF. */
544 score7_symbolic_expression_p (rtx x
)
546 if (GET_CODE (x
) == SYMBOL_REF
)
549 if (GET_CODE (x
) == CONST
)
550 return score7_symbolic_expression_p (XEXP (x
, 0));
553 return score7_symbolic_expression_p (XEXP (x
, 0));
555 if (ARITHMETIC_P (x
))
556 return (score7_symbolic_expression_p (XEXP (x
, 0))
557 || score7_symbolic_expression_p (XEXP (x
, 1)));
562 /* Choose the section to use for the constant rtx expression X that has
565 score7_select_rtx_section (enum machine_mode mode
, rtx x
,
566 unsigned HOST_WIDE_INT align
)
568 if (GET_MODE_SIZE (mode
) <= SCORE7_SDATA_MAX
)
569 return get_named_section (0, ".sdata", 0);
570 else if (flag_pic
&& score7_symbolic_expression_p (x
))
571 return get_named_section (0, ".data.rel.ro", 3);
573 return mergeable_constant_section (mode
, align
, 0);
576 /* Implement TARGET_IN_SMALL_DATA_P. */
578 score7_in_small_data_p (const_tree decl
)
582 if (TREE_CODE (decl
) == STRING_CST
583 || TREE_CODE (decl
) == FUNCTION_DECL
)
586 if (TREE_CODE (decl
) == VAR_DECL
&& DECL_SECTION_NAME (decl
) != 0)
589 name
= TREE_STRING_POINTER (DECL_SECTION_NAME (decl
));
590 if (strcmp (name
, ".sdata") != 0
591 && strcmp (name
, ".sbss") != 0)
593 if (!DECL_EXTERNAL (decl
))
596 size
= int_size_in_bytes (TREE_TYPE (decl
));
597 return (size
> 0 && size
<= SCORE7_SDATA_MAX
);
600 /* Implement TARGET_ASM_FILE_START. */
602 score7_asm_file_start (void)
604 default_file_start ();
605 fprintf (asm_out_file
, ASM_COMMENT_START
606 "GCC for S+core %s \n", SCORE_GCC_VERSION
);
609 fprintf (asm_out_file
, "\t.set pic\n");
612 /* Implement TARGET_ASM_FILE_END. When using assembler macros, emit
613 .externs for any small-data variables that turned out to be external. */
615 score7_asm_file_end (void)
618 struct extern_list
*p
;
621 fputs ("\n", asm_out_file
);
622 for (p
= extern_head
; p
!= 0; p
= p
->next
)
624 name_tree
= get_identifier (p
->name
);
625 if (!TREE_ASM_WRITTEN (name_tree
)
626 && TREE_SYMBOL_REFERENCED (name_tree
))
628 TREE_ASM_WRITTEN (name_tree
) = 1;
629 fputs ("\t.extern\t", asm_out_file
);
630 assemble_name (asm_out_file
, p
->name
);
631 fprintf (asm_out_file
, ", %d\n", p
->size
);
637 /* Implement TARGET_OPTION_OVERRIDE hook. */
639 score7_option_override (void)
643 score7_sdata_max
= (global_options_set
.x_g_switch_value
645 : SCORE7_DEFAULT_SDATA_MAX
);
648 score7_sdata_max
= 0;
649 if (global_options_set
.x_g_switch_value
&& (g_switch_value
!= 0))
650 warning (0, "-fPIC and -G are incompatible");
653 score_char_to_class
['d'] = G32_REGS
;
654 score_char_to_class
['e'] = G16_REGS
;
655 score_char_to_class
['t'] = T32_REGS
;
657 score_char_to_class
['h'] = HI_REG
;
658 score_char_to_class
['l'] = LO_REG
;
659 score_char_to_class
['x'] = CE_REGS
;
661 score_char_to_class
['q'] = CN_REG
;
662 score_char_to_class
['y'] = LC_REG
;
663 score_char_to_class
['z'] = SC_REG
;
664 score_char_to_class
['a'] = SP_REGS
;
666 score_char_to_class
['c'] = CR_REGS
;
669 /* Implement REGNO_REG_CLASS macro. */
671 score7_reg_class (int regno
)
674 gcc_assert (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
);
676 if (regno
== FRAME_POINTER_REGNUM
677 || regno
== ARG_POINTER_REGNUM
)
680 for (c
= 0; c
< N_REG_CLASSES
; c
++)
681 if (TEST_HARD_REG_BIT (reg_class_contents
[c
], regno
))
687 /* Implement PREFERRED_RELOAD_CLASS macro. */
689 score7_preferred_reload_class (rtx x ATTRIBUTE_UNUSED
, enum reg_class rclass
)
691 if (reg_class_subset_p (G16_REGS
, rclass
))
693 if (reg_class_subset_p (G32_REGS
, rclass
))
698 /* Implement SECONDARY_INPUT_RELOAD_CLASS
699 and SECONDARY_OUTPUT_RELOAD_CLASS macro. */
701 score7_secondary_reload_class (enum reg_class rclass
,
702 enum machine_mode mode ATTRIBUTE_UNUSED
,
706 if (GET_CODE (x
) == REG
|| GET_CODE(x
) == SUBREG
)
707 regno
= true_regnum (x
);
709 if (!GR_REG_CLASS_P (rclass
))
710 return GP_REG_P (regno
) ? NO_REGS
: G32_REGS
;
714 /* Implement CONST_OK_FOR_LETTER_P macro. */
723 score7_const_ok_for_letter_p (HOST_WIDE_INT value
, char c
)
727 case 'I': return ((value
& 0xffff) == 0);
728 case 'J': return IMM_IN_RANGE (value
, 5, 0);
729 case 'K': return IMM_IN_RANGE (value
, 16, 0);
730 case 'L': return IMM_IN_RANGE (value
, 16, 1);
731 case 'M': return IMM_IN_RANGE (value
, 14, 0);
732 case 'N': return IMM_IN_RANGE (value
, 14, 1);
737 /* Implement EXTRA_CONSTRAINT macro. */
740 score7_extra_constraint (rtx op
, char c
)
745 return GET_CODE (op
) == SYMBOL_REF
;
751 /* Return truth value on whether or not a given hard register
752 can support a given mode. */
754 score7_hard_regno_mode_ok (unsigned int regno
, enum machine_mode mode
)
756 int size
= GET_MODE_SIZE (mode
);
757 enum mode_class mclass
= GET_MODE_CLASS (mode
);
759 if (mclass
== MODE_CC
)
760 return regno
== CC_REGNUM
;
761 else if (regno
== FRAME_POINTER_REGNUM
762 || regno
== ARG_POINTER_REGNUM
)
763 return mclass
== MODE_INT
;
764 else if (GP_REG_P (regno
))
765 /* ((regno <= (GP_REG_LAST- HARD_REGNO_NREGS (dummy, mode)) + 1) */
766 return !(regno
& 1) || (size
<= UNITS_PER_WORD
);
767 else if (CE_REG_P (regno
))
768 return (mclass
== MODE_INT
769 && ((size
<= UNITS_PER_WORD
)
770 || (regno
== CE_REG_FIRST
&& size
== 2 * UNITS_PER_WORD
)));
772 return (mclass
== MODE_INT
) && (size
<= UNITS_PER_WORD
);
775 /* Implement INITIAL_ELIMINATION_OFFSET. FROM is either the frame
776 pointer or argument pointer. TO is either the stack pointer or
777 hard frame pointer. */
779 score7_initial_elimination_offset (int from
,
780 int to ATTRIBUTE_UNUSED
)
782 struct score7_frame_info
*f
= score7_compute_frame_size (get_frame_size ());
785 case ARG_POINTER_REGNUM
:
786 return f
->total_size
;
787 case FRAME_POINTER_REGNUM
:
794 /* Implement TARGET_FUNCTION_ARG_ADVANCE hook. */
796 score7_function_arg_advance (CUMULATIVE_ARGS
*cum
, enum machine_mode mode
,
797 const_tree type
, bool named
)
799 struct score7_arg_info info
;
800 score7_classify_arg (cum
, mode
, type
, named
, &info
);
801 cum
->num_gprs
= info
.reg_offset
+ info
.reg_words
;
802 if (info
.stack_words
> 0)
803 cum
->stack_words
= info
.stack_offset
+ info
.stack_words
;
807 /* Implement TARGET_ARG_PARTIAL_BYTES macro. */
809 score7_arg_partial_bytes (CUMULATIVE_ARGS
*cum
,
810 enum machine_mode mode
, tree type
, bool named
)
812 struct score7_arg_info info
;
813 score7_classify_arg (cum
, mode
, type
, named
, &info
);
814 return info
.stack_words
> 0 ? info
.reg_words
* UNITS_PER_WORD
: 0;
817 /* Implement TARGET_FUNCTION_ARG hook. */
819 score7_function_arg (const CUMULATIVE_ARGS
*cum
, enum machine_mode mode
,
820 const_tree type
, bool named
)
822 struct score7_arg_info info
;
824 if (mode
== VOIDmode
|| !named
)
827 score7_classify_arg (cum
, mode
, type
, named
, &info
);
829 if (info
.reg_offset
== ARG_REG_NUM
)
832 if (!info
.stack_words
)
833 return gen_rtx_REG (mode
, ARG_REG_FIRST
+ info
.reg_offset
);
836 rtx ret
= gen_rtx_PARALLEL (mode
, rtvec_alloc (info
.reg_words
));
837 unsigned int i
, part_offset
= 0;
838 for (i
= 0; i
< info
.reg_words
; i
++)
841 reg
= gen_rtx_REG (SImode
, ARG_REG_FIRST
+ info
.reg_offset
+ i
);
842 XVECEXP (ret
, 0, i
) = gen_rtx_EXPR_LIST (SImode
, reg
,
843 GEN_INT (part_offset
));
844 part_offset
+= UNITS_PER_WORD
;
850 /* Implement FUNCTION_VALUE and LIBCALL_VALUE. For normal calls,
851 VALTYPE is the return type and MODE is VOIDmode. For libcalls,
852 VALTYPE is null and MODE is the mode of the return value. */
854 score7_function_value (const_tree valtype
, const_tree func
,
855 enum machine_mode mode
)
860 mode
= TYPE_MODE (valtype
);
861 unsignedp
= TYPE_UNSIGNED (valtype
);
862 mode
= promote_function_mode (valtype
, mode
, &unsignedp
, func
, 1);
864 return gen_rtx_REG (mode
, RT_REGNUM
);
867 /* Implement TARGET_ASM_TRAMPOLINE_TEMPLATE. */
870 score7_asm_trampoline_template (FILE *f
)
872 fprintf (f
, "\t.set r1\n");
873 fprintf (f
, "\tmv r31, r3\n");
874 fprintf (f
, "\tbl nextinsn\n");
875 fprintf (f
, "nextinsn:\n");
876 fprintf (f
, "\tlw r1, [r3, 6*4-8]\n");
877 fprintf (f
, "\tlw r23, [r3, 6*4-4]\n");
878 fprintf (f
, "\tmv r3, r31\n");
879 fprintf (f
, "\tbr! r1\n");
880 fprintf (f
, "\tnop!\n");
881 fprintf (f
, "\t.set nor1\n");
884 /* Implement TARGET_TRAMPOLINE_INIT. */
886 score7_trampoline_init (rtx m_tramp
, tree fndecl
, rtx chain_value
)
888 #define FFCACHE "_flush_cache"
889 #define CODE_SIZE (TRAMPOLINE_INSNS * UNITS_PER_WORD)
891 rtx fnaddr
= XEXP (DECL_RTL (fndecl
), 0);
892 rtx addr
= XEXP (m_tramp
, 0);
895 emit_block_move (m_tramp
, assemble_trampoline_template (),
896 GEN_INT (TRAMPOLINE_SIZE
), BLOCK_OP_NORMAL
);
898 mem
= adjust_address (m_tramp
, SImode
, CODE_SIZE
);
899 emit_move_insn (mem
, fnaddr
);
900 mem
= adjust_address (m_tramp
, SImode
, CODE_SIZE
+ GET_MODE_SIZE (SImode
));
901 emit_move_insn (mem
, chain_value
);
903 emit_library_call (gen_rtx_SYMBOL_REF (Pmode
, FFCACHE
),
904 LCT_NORMAL
, VOIDmode
, 2,
906 GEN_INT (TRAMPOLINE_SIZE
), SImode
);
911 /* This function is used to implement REG_MODE_OK_FOR_BASE_P macro. */
913 score7_regno_mode_ok_for_base_p (int regno
, int strict
)
915 if (regno
>= FIRST_PSEUDO_REGISTER
)
919 regno
= reg_renumber
[regno
];
921 if (regno
== ARG_POINTER_REGNUM
922 || regno
== FRAME_POINTER_REGNUM
)
924 return GP_REG_P (regno
);
927 /* Implement TARGET_LEGITIMATE_ADDRESS_P macro. */
929 score7_legitimate_address_p (enum machine_mode mode
, rtx x
, bool strict
)
931 struct score7_address_info addr
;
933 return score7_classify_address (&addr
, mode
, x
, strict
);
936 /* Return a number assessing the cost of moving a register in class
939 score7_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED
,
940 enum reg_class from
, enum reg_class to
)
942 if (GR_REG_CLASS_P (from
))
944 if (GR_REG_CLASS_P (to
))
946 else if (SP_REG_CLASS_P (to
))
948 else if (CP_REG_CLASS_P (to
))
950 else if (CE_REG_CLASS_P (to
))
953 if (GR_REG_CLASS_P (to
))
955 if (GR_REG_CLASS_P (from
))
957 else if (SP_REG_CLASS_P (from
))
959 else if (CP_REG_CLASS_P (from
))
961 else if (CE_REG_CLASS_P (from
))
967 /* Return the number of instructions needed to load a symbol of the
968 given type into a register. */
970 score7_symbol_insns (enum score_symbol_type type
)
977 case SYMBOL_SMALL_DATA
:
984 /* Return the number of instructions needed to load or store a value
985 of mode MODE at X. Return 0 if X isn't valid for MODE. */
987 score7_address_insns (rtx x
, enum machine_mode mode
)
989 struct score7_address_info addr
;
995 factor
= (GET_MODE_SIZE (mode
) + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
997 if (score7_classify_address (&addr
, mode
, x
, false))
1000 case SCORE7_ADD_REG
:
1001 case SCORE7_ADD_CONST_INT
:
1004 case SCORE7_ADD_SYMBOLIC
:
1005 return factor
* score7_symbol_insns (addr
.symbol_type
);
1010 /* Implement TARGET_RTX_COSTS macro. */
1012 score7_rtx_costs (rtx x
, int code
, int outer_code
, int *total
,
1013 bool speed ATTRIBUTE_UNUSED
)
1015 enum machine_mode mode
= GET_MODE (x
);
1020 if (outer_code
== SET
)
1022 if (CONST_OK_FOR_LETTER_P (INTVAL (x
), 'I')
1023 || CONST_OK_FOR_LETTER_P (INTVAL (x
), 'L'))
1024 *total
= COSTS_N_INSNS (1);
1026 *total
= COSTS_N_INSNS (2);
1028 else if (outer_code
== PLUS
|| outer_code
== MINUS
)
1030 if (CONST_OK_FOR_LETTER_P (INTVAL (x
), 'N'))
1032 else if (CONST_OK_FOR_LETTER_P (INTVAL (x
), 'I')
1033 || CONST_OK_FOR_LETTER_P (INTVAL (x
), 'L'))
1036 *total
= COSTS_N_INSNS (2);
1038 else if (outer_code
== AND
|| outer_code
== IOR
)
1040 if (CONST_OK_FOR_LETTER_P (INTVAL (x
), 'M'))
1042 else if (CONST_OK_FOR_LETTER_P (INTVAL (x
), 'I')
1043 || CONST_OK_FOR_LETTER_P (INTVAL (x
), 'K'))
1046 *total
= COSTS_N_INSNS (2);
1058 *total
= COSTS_N_INSNS (2);
1063 /* If the address is legitimate, return the number of
1064 instructions it needs, otherwise use the default handling. */
1065 int n
= score7_address_insns (XEXP (x
, 0), GET_MODE (x
));
1068 *total
= COSTS_N_INSNS (n
+ 1);
1075 *total
= COSTS_N_INSNS (6);
1079 *total
= COSTS_N_INSNS (1);
1087 *total
= COSTS_N_INSNS (2);
1097 *total
= COSTS_N_INSNS ((GET_CODE (XEXP (x
, 1)) == CONST_INT
)
1104 *total
= COSTS_N_INSNS (4);
1111 *total
= COSTS_N_INSNS (4);
1114 *total
= COSTS_N_INSNS (1);
1120 *total
= COSTS_N_INSNS (4);
1126 *total
= optimize_size
? COSTS_N_INSNS (2) : COSTS_N_INSNS (12);
1133 *total
= optimize_size
? COSTS_N_INSNS (2) : COSTS_N_INSNS (33);
1138 switch (GET_MODE (XEXP (x
, 0)))
1142 if (GET_CODE (XEXP (x
, 0)) == MEM
)
1144 *total
= COSTS_N_INSNS (2);
1146 if (!TARGET_LITTLE_ENDIAN
&&
1147 side_effects_p (XEXP (XEXP (x
, 0), 0)))
1151 *total
= COSTS_N_INSNS (1);
1155 *total
= COSTS_N_INSNS (1);
1165 /* Implement TARGET_ADDRESS_COST macro. */
1167 score7_address_cost (rtx addr
)
1169 return score7_address_insns (addr
, SImode
);
1172 /* Implement ASM_OUTPUT_EXTERNAL macro. */
1174 score7_output_external (FILE *file ATTRIBUTE_UNUSED
,
1175 tree decl
, const char *name
)
1177 register struct extern_list
*p
;
1179 if (score7_in_small_data_p (decl
))
1181 p
= ggc_alloc_extern_list ();
1182 p
->next
= extern_head
;
1184 p
->size
= int_size_in_bytes (TREE_TYPE (decl
));
1190 /* Implement RETURN_ADDR_RTX. Note, we do not support moving
1191 back to a previous frame. */
1193 score7_return_addr (int count
, rtx frame ATTRIBUTE_UNUSED
)
1197 return get_hard_reg_initial_val (Pmode
, RA_REGNUM
);
1200 /* Implement PRINT_OPERAND macro. */
1201 /* Score-specific operand codes:
1202 '[' print .set nor1 directive
1203 ']' print .set r1 directive
1204 'U' print hi part of a CONST_INT rtx
1207 'D' print SFmode const double
1208 'S' selectively print "!" if operand is 15bit instruction accessible
1209 'V' print "v!" if operand is 15bit instruction accessible, or "lfh!"
1210 'L' low part of DImode reg operand
1211 'H' high part of DImode reg operand
1212 'C' print part of opcode for a branch condition. */
1214 score7_print_operand (FILE *file
, rtx op
, int c
)
1216 enum rtx_code code
= UNKNOWN
;
1217 if (!PRINT_OPERAND_PUNCT_VALID_P (c
))
1218 code
= GET_CODE (op
);
1222 fprintf (file
, ".set r1\n");
1226 fprintf (file
, "\n\t.set nor1");
1230 gcc_assert (code
== CONST_INT
);
1231 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
1232 (INTVAL (op
) >> 16) & 0xffff);
1236 if (GET_CODE (op
) == CONST_DOUBLE
)
1238 rtx temp
= gen_lowpart (SImode
, op
);
1239 gcc_assert (GET_MODE (op
) == SFmode
);
1240 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, INTVAL (temp
) & 0xffffffff);
1243 output_addr_const (file
, op
);
1247 gcc_assert (code
== REG
);
1248 if (G16_REG_P (REGNO (op
)))
1249 fprintf (file
, "!");
1253 gcc_assert (code
== REG
);
1254 fprintf (file
, G16_REG_P (REGNO (op
)) ? "v!" : "lfh!");
1258 enum machine_mode mode
= GET_MODE (XEXP (op
, 0));
1262 case EQ
: fputs ("eq", file
); break;
1263 case NE
: fputs ("ne", file
); break;
1264 case GT
: fputs ("gt", file
); break;
1265 case GE
: fputs (mode
!= CCmode
? "pl" : "ge", file
); break;
1266 case LT
: fputs (mode
!= CCmode
? "mi" : "lt", file
); break;
1267 case LE
: fputs ("le", file
); break;
1268 case GTU
: fputs ("gtu", file
); break;
1269 case GEU
: fputs ("cs", file
); break;
1270 case LTU
: fputs ("cc", file
); break;
1271 case LEU
: fputs ("leu", file
); break;
1273 output_operand_lossage ("invalid operand for code: '%c'", code
);
1278 unsigned HOST_WIDE_INT i
;
1279 unsigned HOST_WIDE_INT pow2mask
= 1;
1280 unsigned HOST_WIDE_INT val
;
1283 for (i
= 0; i
< 32; i
++)
1285 if (val
== pow2mask
)
1289 gcc_assert (i
< 32);
1290 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, i
);
1294 unsigned HOST_WIDE_INT i
;
1295 unsigned HOST_WIDE_INT pow2mask
= 1;
1296 unsigned HOST_WIDE_INT val
;
1299 for (i
= 0; i
< 32; i
++)
1301 if (val
== pow2mask
)
1305 gcc_assert (i
< 32);
1306 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, i
);
1308 else if (code
== REG
)
1310 int regnum
= REGNO (op
);
1311 if ((c
== 'H' && !WORDS_BIG_ENDIAN
)
1312 || (c
== 'L' && WORDS_BIG_ENDIAN
))
1314 fprintf (file
, "%s", reg_names
[regnum
]);
1321 score7_print_operand_address (file
, op
);
1324 output_addr_const (file
, op
);
1329 /* Implement PRINT_OPERAND_ADDRESS macro. */
1331 score7_print_operand_address (FILE *file
, rtx x
)
1333 struct score7_address_info addr
;
1334 enum rtx_code code
= GET_CODE (x
);
1335 enum machine_mode mode
= GET_MODE (x
);
1340 if (score7_classify_address (&addr
, mode
, x
, true))
1344 case SCORE7_ADD_REG
:
1349 fprintf (file
, "[%s,-%ld]+", reg_names
[REGNO (addr
.reg
)],
1350 INTVAL (addr
.offset
));
1353 fprintf (file
, "[%s]+,-%ld", reg_names
[REGNO (addr
.reg
)],
1354 INTVAL (addr
.offset
));
1357 fprintf (file
, "[%s, %ld]+", reg_names
[REGNO (addr
.reg
)],
1358 INTVAL (addr
.offset
));
1361 fprintf (file
, "[%s]+, %ld", reg_names
[REGNO (addr
.reg
)],
1362 INTVAL (addr
.offset
));
1365 if (INTVAL(addr
.offset
) == 0)
1366 fprintf(file
, "[%s]", reg_names
[REGNO (addr
.reg
)]);
1368 fprintf(file
, "[%s, %ld]", reg_names
[REGNO (addr
.reg
)],
1369 INTVAL(addr
.offset
));
1374 case SCORE7_ADD_CONST_INT
:
1375 case SCORE7_ADD_SYMBOLIC
:
1376 output_addr_const (file
, x
);
1380 print_rtl (stderr
, x
);
1384 /* Implement SELECT_CC_MODE macro. */
1386 score7_select_cc_mode (enum rtx_code op
, rtx x
, rtx y
)
1388 if ((op
== EQ
|| op
== NE
|| op
== LT
|| op
== GE
)
1390 && GET_MODE (x
) == SImode
)
1392 switch (GET_CODE (x
))
1410 return (op
== LT
|| op
== GE
) ? CC_Nmode
: CCmode
;
1417 if ((op
== EQ
|| op
== NE
)
1418 && (GET_CODE (y
) == NEG
)
1419 && register_operand (XEXP (y
, 0), SImode
)
1420 && register_operand (x
, SImode
))
1428 /* Generate the prologue instructions for entry into a S+core function. */
1430 score7_prologue (void)
1432 #define EMIT_PL(_rtx) RTX_FRAME_RELATED_P (_rtx) = 1
1434 struct score7_frame_info
*f
= score7_compute_frame_size (get_frame_size ());
1438 size
= f
->total_size
- f
->gp_reg_size
;
1441 emit_insn (gen_cpload_score7 ());
1443 for (regno
= (int) GP_REG_LAST
; regno
>= (int) GP_REG_FIRST
; regno
--)
1445 if (BITSET_P (f
->mask
, regno
- GP_REG_FIRST
))
1447 rtx mem
= gen_rtx_MEM (SImode
,
1448 gen_rtx_PRE_DEC (SImode
, stack_pointer_rtx
));
1449 rtx reg
= gen_rtx_REG (SImode
, regno
);
1450 if (!crtl
->calls_eh_return
)
1451 MEM_READONLY_P (mem
) = 1;
1452 EMIT_PL (emit_insn (gen_pushsi_score7 (mem
, reg
)));
1460 if (CONST_OK_FOR_LETTER_P (-size
, 'L'))
1461 EMIT_PL (emit_insn (gen_add3_insn (stack_pointer_rtx
,
1466 EMIT_PL (emit_move_insn (gen_rtx_REG (Pmode
, SCORE7_PROLOGUE_TEMP_REGNUM
),
1469 (gen_sub3_insn (stack_pointer_rtx
,
1472 SCORE7_PROLOGUE_TEMP_REGNUM
))));
1474 insn
= get_last_insn ();
1476 alloc_EXPR_LIST (REG_FRAME_RELATED_EXPR
,
1477 gen_rtx_SET (VOIDmode
, stack_pointer_rtx
,
1478 plus_constant (stack_pointer_rtx
,
1483 if (frame_pointer_needed
)
1484 EMIT_PL (emit_move_insn (hard_frame_pointer_rtx
, stack_pointer_rtx
));
1486 if (flag_pic
&& f
->cprestore_size
)
1488 if (frame_pointer_needed
)
1489 emit_insn (gen_cprestore_use_fp_score7 (GEN_INT (size
- f
->cprestore_size
)));
1491 emit_insn (gen_cprestore_use_sp_score7 (GEN_INT (size
- f
->cprestore_size
)));
1497 /* Generate the epilogue instructions in a S+core function. */
1499 score7_epilogue (int sibcall_p
)
1501 struct score7_frame_info
*f
= score7_compute_frame_size (get_frame_size ());
1506 size
= f
->total_size
- f
->gp_reg_size
;
1508 if (!frame_pointer_needed
)
1509 base
= stack_pointer_rtx
;
1511 base
= hard_frame_pointer_rtx
;
1515 if (CONST_OK_FOR_LETTER_P (size
, 'L'))
1516 emit_insn (gen_add3_insn (base
, base
, GEN_INT (size
)));
1519 emit_move_insn (gen_rtx_REG (Pmode
, SCORE7_EPILOGUE_TEMP_REGNUM
),
1521 emit_insn (gen_add3_insn (base
, base
,
1523 SCORE7_EPILOGUE_TEMP_REGNUM
)));
1527 if (base
!= stack_pointer_rtx
)
1528 emit_move_insn (stack_pointer_rtx
, base
);
1530 if (crtl
->calls_eh_return
)
1531 emit_insn (gen_add3_insn (stack_pointer_rtx
,
1533 EH_RETURN_STACKADJ_RTX
));
1535 for (regno
= (int) GP_REG_FIRST
; regno
<= (int) GP_REG_LAST
; regno
++)
1537 if (BITSET_P (f
->mask
, regno
- GP_REG_FIRST
))
1539 rtx mem
= gen_rtx_MEM (SImode
,
1540 gen_rtx_POST_INC (SImode
, stack_pointer_rtx
));
1541 rtx reg
= gen_rtx_REG (SImode
, regno
);
1543 if (!crtl
->calls_eh_return
)
1544 MEM_READONLY_P (mem
) = 1;
1546 emit_insn (gen_popsi_score7 (reg
, mem
));
1551 emit_jump_insn (gen_return_internal_score7 (gen_rtx_REG (Pmode
, RA_REGNUM
)));
1554 /* Return true if X is a symbolic constant that can be calculated in
1555 the same way as a bare symbol. If it is, store the type of the
1556 symbol in *SYMBOL_TYPE. */
1558 score7_symbolic_constant_p (rtx x
, enum score_symbol_type
*symbol_type
)
1560 HOST_WIDE_INT offset
;
1562 score7_split_const (x
, &x
, &offset
);
1563 if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == LABEL_REF
)
1564 *symbol_type
= score7_classify_symbol (x
);
1571 /* if offset > 15bit, must reload */
1572 if (!IMM_IN_RANGE (offset
, 15, 1))
1575 switch (*symbol_type
)
1577 case SYMBOL_GENERAL
:
1579 case SYMBOL_SMALL_DATA
:
1580 return score7_offset_within_object_p (x
, offset
);
1586 score7_movsicc (rtx
*ops
)
1588 enum machine_mode mode
;
1590 mode
= score7_select_cc_mode (GET_CODE (ops
[1]), ops
[2], ops
[3]);
1591 emit_insn (gen_rtx_SET (VOIDmode
, gen_rtx_REG (mode
, CC_REGNUM
),
1592 gen_rtx_COMPARE (mode
, XEXP (ops
[1], 0),
1593 XEXP (ops
[1], 1))));
1596 /* Call and sibcall pattern all need call this function. */
1598 score7_call (rtx
*ops
, bool sib
)
1600 rtx addr
= XEXP (ops
[0], 0);
1601 if (!call_insn_operand (addr
, VOIDmode
))
1604 addr
= gen_reg_rtx (Pmode
);
1605 gen_move_insn (addr
, oaddr
);
1609 emit_call_insn (gen_sibcall_internal_score7 (addr
, ops
[1]));
1611 emit_call_insn (gen_call_internal_score7 (addr
, ops
[1]));
1614 /* Call value and sibcall value pattern all need call this function. */
1616 score7_call_value (rtx
*ops
, bool sib
)
1618 rtx result
= ops
[0];
1619 rtx addr
= XEXP (ops
[1], 0);
1622 if (!call_insn_operand (addr
, VOIDmode
))
1625 addr
= gen_reg_rtx (Pmode
);
1626 gen_move_insn (addr
, oaddr
);
1630 emit_call_insn (gen_sibcall_value_internal_score7 (result
, addr
, arg
));
1632 emit_call_insn (gen_call_value_internal_score7 (result
, addr
, arg
));
1637 score7_movdi (rtx
*ops
)
1641 rtx dst0
= score7_subw (dst
, 0);
1642 rtx dst1
= score7_subw (dst
, 1);
1643 rtx src0
= score7_subw (src
, 0);
1644 rtx src1
= score7_subw (src
, 1);
1646 if (GET_CODE (dst0
) == REG
&& reg_overlap_mentioned_p (dst0
, src
))
1648 emit_move_insn (dst1
, src1
);
1649 emit_move_insn (dst0
, src0
);
1653 emit_move_insn (dst0
, src0
);
1654 emit_move_insn (dst1
, src1
);
1659 score7_zero_extract_andi (rtx
*ops
)
1661 if (INTVAL (ops
[1]) == 1 && const_uimm5 (ops
[2], SImode
))
1662 emit_insn (gen_zero_extract_bittst_score7 (ops
[0], ops
[2]));
1665 unsigned HOST_WIDE_INT mask
;
1666 mask
= (0xffffffffU
& ((1U << INTVAL (ops
[1])) - 1U));
1667 mask
= mask
<< INTVAL (ops
[2]);
1668 emit_insn (gen_andsi3_cmp_score7 (ops
[3], ops
[0],
1669 gen_int_mode (mask
, SImode
)));
1673 /* Check addr could be present as PRE/POST mode. */
1675 score7_pindex_mem (rtx addr
)
1677 if (GET_CODE (addr
) == MEM
)
1679 switch (GET_CODE (XEXP (addr
, 0)))
1693 /* Output asm code for ld/sw insn. */
1695 score7_pr_addr_post (rtx
*ops
, int idata
, int iaddr
, char *ip
, enum score_mem_unit unit
)
1697 struct score7_address_info ai
;
1699 gcc_assert (GET_CODE (ops
[idata
]) == REG
);
1700 gcc_assert (score7_classify_address (&ai
, SImode
, XEXP (ops
[iaddr
], 0), true));
1702 if (!score7_pindex_mem (ops
[iaddr
])
1703 && ai
.type
== SCORE7_ADD_REG
1704 && GET_CODE (ai
.offset
) == CONST_INT
1705 && G16_REG_P (REGNO (ops
[idata
]))
1706 && G16_REG_P (REGNO (ai
.reg
)))
1708 if (INTVAL (ai
.offset
) == 0)
1710 ops
[iaddr
] = ai
.reg
;
1711 return snprintf (ip
, INS_BUF_SZ
,
1712 "!\t%%%d, [%%%d]", idata
, iaddr
);
1714 if (REGNO (ai
.reg
) == HARD_FRAME_POINTER_REGNUM
)
1716 HOST_WIDE_INT offset
= INTVAL (ai
.offset
);
1717 if (SCORE_ALIGN_UNIT (offset
, unit
)
1718 && CONST_OK_FOR_LETTER_P (offset
>> unit
, 'J'))
1720 ops
[iaddr
] = ai
.offset
;
1721 return snprintf (ip
, INS_BUF_SZ
,
1722 "p!\t%%%d, %%c%d", idata
, iaddr
);
1726 return snprintf (ip
, INS_BUF_SZ
, "\t%%%d, %%a%d", idata
, iaddr
);
1729 /* Output asm insn for load. */
1731 score7_linsn (rtx
*ops
, enum score_mem_unit unit
, bool sign
)
1733 const char *pre_ins
[] =
1734 {"lbu", "lhu", "lw", "??", "lb", "lh", "lw", "??"};
1737 strcpy (score7_ins
, pre_ins
[(sign
? 4 : 0) + unit
]);
1738 ip
= score7_ins
+ strlen (score7_ins
);
1740 if ((!sign
&& unit
!= SCORE_HWORD
)
1741 || (sign
&& unit
!= SCORE_BYTE
))
1742 score7_pr_addr_post (ops
, 0, 1, ip
, unit
);
1744 snprintf (ip
, INS_BUF_SZ
, "\t%%0, %%a1");
1749 /* Output asm insn for store. */
1751 score7_sinsn (rtx
*ops
, enum score_mem_unit unit
)
1753 const char *pre_ins
[] = {"sb", "sh", "sw"};
1756 strcpy (score7_ins
, pre_ins
[unit
]);
1757 ip
= score7_ins
+ strlen (score7_ins
);
1758 score7_pr_addr_post (ops
, 1, 0, ip
, unit
);
1762 /* Output asm insn for load immediate. */
1764 score7_limm (rtx
*ops
)
1768 gcc_assert (GET_CODE (ops
[0]) == REG
);
1769 gcc_assert (GET_CODE (ops
[1]) == CONST_INT
);
1771 v
= INTVAL (ops
[1]);
1772 if (G16_REG_P (REGNO (ops
[0])) && IMM_IN_RANGE (v
, 8, 0))
1773 return "ldiu!\t%0, %c1";
1774 else if (IMM_IN_RANGE (v
, 16, 1))
1775 return "ldi\t%0, %c1";
1776 else if ((v
& 0xffff) == 0)
1777 return "ldis\t%0, %U1";
1779 return "li\t%0, %c1";
1782 /* Output asm insn for move. */
1784 score7_move (rtx
*ops
)
1786 gcc_assert (GET_CODE (ops
[0]) == REG
);
1787 gcc_assert (GET_CODE (ops
[1]) == REG
);
1789 if (G16_REG_P (REGNO (ops
[0])))
1791 if (G16_REG_P (REGNO (ops
[1])))
1792 return "mv!\t%0, %1";
1794 return "mlfh!\t%0, %1";
1796 else if (G16_REG_P (REGNO (ops
[1])))
1797 return "mhfl!\t%0, %1";
1799 return "mv\t%0, %1";
1802 /* Generate add insn. */
1804 score7_select_add_imm (rtx
*ops
, bool set_cc
)
1806 HOST_WIDE_INT v
= INTVAL (ops
[2]);
1808 gcc_assert (GET_CODE (ops
[2]) == CONST_INT
);
1809 gcc_assert (REGNO (ops
[0]) == REGNO (ops
[1]));
1811 if (set_cc
&& G16_REG_P (REGNO (ops
[0])))
1813 if (v
> 0 && IMM_IS_POW_OF_2 ((unsigned HOST_WIDE_INT
) v
, 0, 15))
1815 ops
[2] = GEN_INT (ffs (v
) - 1);
1816 return "addei!\t%0, %c2";
1819 if (v
< 0 && IMM_IS_POW_OF_2 ((unsigned HOST_WIDE_INT
) (-v
), 0, 15))
1821 ops
[2] = GEN_INT (ffs (-v
) - 1);
1822 return "subei!\t%0, %c2";
1827 return "addi.c\t%0, %c2";
1829 return "addi\t%0, %c2";
1832 /* Output arith insn. */
1834 score7_select (rtx
*ops
, const char *inst_pre
,
1835 bool commu
, const char *letter
, bool set_cc
)
1837 gcc_assert (GET_CODE (ops
[0]) == REG
);
1838 gcc_assert (GET_CODE (ops
[1]) == REG
);
1840 if (set_cc
&& G16_REG_P (REGNO (ops
[0]))
1841 && (GET_CODE (ops
[2]) == REG
? G16_REG_P (REGNO (ops
[2])) : 1)
1842 && REGNO (ops
[0]) == REGNO (ops
[1]))
1844 snprintf (score7_ins
, INS_BUF_SZ
, "%s!\t%%0, %%%s2", inst_pre
, letter
);
1848 if (commu
&& set_cc
&& G16_REG_P (REGNO (ops
[0]))
1849 && G16_REG_P (REGNO (ops
[1]))
1850 && REGNO (ops
[0]) == REGNO (ops
[2]))
1852 gcc_assert (GET_CODE (ops
[2]) == REG
);
1853 snprintf (score7_ins
, INS_BUF_SZ
, "%s!\t%%0, %%%s1", inst_pre
, letter
);
1858 snprintf (score7_ins
, INS_BUF_SZ
, "%s.c\t%%0, %%1, %%%s2", inst_pre
, letter
);
1860 snprintf (score7_ins
, INS_BUF_SZ
, "%s\t%%0, %%1, %%%s2", inst_pre
, letter
);