Merge from mainline (165734:167278).
[official-gcc/graphite-test-results.git] / gcc / config / mep / mep.h
blob73675a3e1106940897d0a78138a594c9f07cef6c
1 /* Definitions for Toshiba Media Processor
2 Copyright (C) 2001, 2003, 2004, 2005, 2007, 2008, 2009, 2010
3 Free Software Foundation, Inc.
4 Contributed by Red Hat, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 #undef CPP_SPEC
24 #define CPP_SPEC "\
25 -D__MEP__ -D__MeP__ \
26 -D__section(_x)=__attribute__((section(_x))) \
27 -D__align(_x)=__attribute__((aligned(_x))) \
28 -D__io(_x)=__attribute__((io(_x))) \
29 -D__cb(_x)=__attribute__((cb(_x))) \
30 -D__based=__attribute__((based)) \
31 -D__tiny=__attribute__((tiny)) \
32 -D__near=__attribute__((near)) \
33 -D__far=__attribute__((far)) \
34 -D__vliw=__attribute__((vliw)) \
35 -D__interrupt=__attribute__((interrupt)) \
36 -D__disinterrupt=__attribute__((disinterrupt)) \
37 %{!meb:%{!mel:-D__BIG_ENDIAN__}} \
38 %{meb:-U__LITTLE_ENDIAN__ -D__BIG_ENDIAN__} \
39 %{mel:-U__BIG_ENDIAN__ -D__LITTLE_ENDIAN__} \
40 %{mconfig=*:-D__MEP_CONFIG_%*} \
41 %{mivc2:-D__MEP_CONFIG_CP_DATA_BUS_WIDTH=64} \
44 #undef CC1_SPEC
45 #define CC1_SPEC "%{!mlibrary:%(config_cc_spec)} \
46 %{!.cc:%{O2:%{!funroll*:--param max-completely-peeled-insns=6 \
47 --param max-unrolled-insns=6 -funroll-loops}}}"
49 #undef CC1PLUS_SPEC
50 #define CC1PLUS_SPEC "%{!mlibrary:%(config_cc_spec)}"
52 #undef ASM_SPEC
53 #define ASM_SPEC "%{mconfig=*} %{meb:-EB} %{mel:-EL} \
54 %{mno-satur} %{msatur} %{mno-clip} %{mclip} %{mno-minmax} %{mminmax} \
55 %{mno-absdiff} %{mabsdiff} %{mno-leadz} %{mleadz} %{mno-bitops} %{mbitops} \
56 %{mno-div} %{mdiv} %{mno-mult} %{mmult} %{mno-average} %{maverage} \
57 %{mcop32} %{mno-debug} %{mdebug} %{mlibrary}"
59 /* The MeP config tool will edit this spec. */
60 #undef STARTFILE_SPEC
61 #define STARTFILE_SPEC "%{msdram:%{msim:simsdram-crt0.o%s}} \
62 %{mno-sdram:%{msim:sim-crt0.o%s}} \
63 %{msdram:%{!msim*:sdram-crt0.o%s}} \
64 %{mno-sdram:%{!msim*:crt0.o%s}} \
65 %(config_start_spec) \
66 %{msimnovec:simnovec-crt0.o%s} \
67 crtbegin.o%s"
69 #undef LIB_SPEC
70 #define LIB_SPEC "-( -lc %{msim*:-lsim}%{!msim*:-lnosys} -) %(config_link_spec)"
72 #undef LINK_SPEC
73 #define LINK_SPEC "%{meb:-EB} %{mel:-EL}"
75 #undef ENDFILE_SPEC
76 #define ENDFILE_SPEC "crtend.o%s %{msim*:sim-crtn.o%s}%{!msim*:crtn.o%s}"
78 /* The MeP config tool will edit this spec. */
79 #define CONFIG_CC_SPEC "\
80 %{mconfig=default: -mbitops -mleadz -mabsdiff -maverage -mminmax -mclip -msatur -mvl64 -mvliw -mcop64 -D__MEP_CONFIG_CP_DATA_BUS_WIDTH=64 -mivc2}\
82 /* end-config-cc-spec */
84 /* The MeP config tool will edit this spec. */
85 #define CONFIG_LINK_SPEC "\
86 %{mconfig=default: %{!T*:-Tdefault.ld}}\
88 /* end-config-link-spec */
90 /* The MeP config tool will edit this spec. */
91 #define CONFIG_START_SPEC "\
92 %{!msdram:%{!mno-sdram:%{!msim*:crt0.o%s}}} \
93 %{!msdram:%{!mno-sdram:%{msim:sim-crt0.o%s}}} \
95 /* end-config-start-spec */
97 #define EXTRA_SPECS \
98 { "config_cc_spec", CONFIG_CC_SPEC }, \
99 { "config_link_spec", CONFIG_LINK_SPEC }, \
100 { "config_start_spec", CONFIG_START_SPEC },
103 #define TARGET_CPU_CPP_BUILTINS() \
104 do \
106 builtin_define_std ("mep"); \
107 builtin_assert ("machine=mep"); \
109 while (0)
111 /* Controlled by MeP-Integrator. */
112 #define TARGET_H1 0
114 #define MEP_ALL_OPTS (MASK_OPT_AVERAGE \
115 | MASK_OPT_MULT \
116 | MASK_OPT_DIV \
117 | MASK_OPT_BITOPS \
118 | MASK_OPT_LEADZ \
119 | MASK_OPT_ABSDIFF \
120 | MASK_OPT_MINMAX \
121 | MASK_OPT_CLIP \
122 | MASK_OPT_SATUR )
124 #define TARGET_DEFAULT (MASK_IO_VOLATILE | MASK_OPT_REPEAT | MEP_ALL_OPTS | MASK_LITTLE_ENDIAN)
126 #define TARGET_IO_NO_VOLATILE (! (target_flags & MASK_IO_VOLATILE))
127 #define TARGET_OPT_NOREPEAT (! (target_flags & MASK_OPT_REPEAT))
128 #define TARGET_32BIT_CR_REGS (! (target_flags & MASK_64BIT_CR_REGS))
129 #define TARGET_BIG_ENDIAN (! (target_flags & MASK_LITTLE_ENDIAN))
131 #define TARGET_COPRO_MULT 0
133 #define TARGET_VERSION fprintf (stderr, " (Toshiba Media Processor (MeP))");
135 /* The MeP config tool will replace this as appropriate. */
136 #define DEFAULT_ENDIAN_SPEC "%{!meb: -mel}"
138 /* The MeP config tool will replace this with an -mconfig= switch. */
139 #define LIBRARY_CONFIG_SPEC "-mconfig=default"
141 /* Don't add an endian option when building the libraries. */
142 #define DRIVER_SELF_SPECS \
143 "%{!mlibrary:" DEFAULT_ENDIAN_SPEC "}", \
144 "%{mlibrary: " LIBRARY_CONFIG_SPEC " %{!mel:-meb}}", \
145 "%{mall-opts:-maverage -mmult -mdiv -mbitops -mleadz \
146 -mabsdiff -mminmax -mclip -msatur -mdebug} %<mall-opts", \
147 "%{mno-opts:-mno-average -mno-mult -mno-div -mno-bitops -mno-leadz \
148 -mno-absdiff -mno-minmax -mno-clip -mno-satur -mno-debug} %<mno-opts", \
149 "%{mfar:-ml -mtf -mc=far} %<mfar", \
150 "%{mconfig=default:-mmult -mdiv -D__MEP_CONFIG_ISA=1}"
152 /* The MeP config tool will add COPROC_SELECTION_TABLE here. */
153 /* start-coproc-selection-table */
154 #define COPROC_SELECTION_TABLE \
155 {"default", ISA_EXT1}
156 /* end-coproc-selection-table */
159 #define BITS_BIG_ENDIAN 0
160 #define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN ? 0 : 1)
161 #define WORDS_BIG_ENDIAN (TARGET_LITTLE_ENDIAN ? 0 : 1)
163 #define UNITS_PER_WORD 4
165 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
166 do \
168 if (GET_MODE_CLASS (MODE) == MODE_INT \
169 && GET_MODE_SIZE (MODE) < 4) \
170 (MODE) = SImode; \
172 while (0)
174 #define PARM_BOUNDARY 32
175 #define STACK_BOUNDARY 32
176 #define PREFERRED_STACK_BOUNDARY 64
177 #define FUNCTION_BOUNDARY 16
178 #define BIGGEST_ALIGNMENT 64
180 #define DATA_ALIGNMENT(TYPE, ALIGN) \
181 (TREE_CODE (TYPE) == ARRAY_TYPE \
182 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
183 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
185 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
186 (TREE_CODE (EXP) == STRING_CST \
187 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
189 #define STRICT_ALIGNMENT 1
191 #define PCC_BITFIELD_TYPE_MATTERS 1
193 #define DEFAULT_VTABLE_THUNKS 1
196 #define INT_TYPE_SIZE 32
197 #define SHORT_TYPE_SIZE 16
198 #define LONG_TYPE_SIZE 32
199 #define LONG_LONG_TYPE_SIZE 64
200 #define CHAR_TYPE_SIZE 8
201 #define FLOAT_TYPE_SIZE 32
202 #define DOUBLE_TYPE_SIZE 64
203 #define LONG_DOUBLE_TYPE_SIZE 64
204 #define DEFAULT_SIGNED_CHAR 1
206 /* Register numbers:
207 0..15 core registers
208 16..47 control registers
209 48..79 coprocessor registers
210 80..111 coprocessor control registers
211 112 virtual arg pointer register */
213 #define FIRST_PSEUDO_REGISTER (LAST_SHADOW_REGISTER + 1)
215 /* R12 is optionally FP. R13 is TP, R14 is GP, R15 is SP. */
216 /* hi and lo can be used as general registers. Others have
217 immutable bits. */
218 /* A "1" here means the register is generally not available to gcc,
219 and is assumed to remain unchanged or unused throughout. */
220 #define FIXED_REGISTERS { \
221 /* core registers */ \
222 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
223 /* control registers */ \
224 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
225 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
226 /* coprocessor registers */ \
227 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
228 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
229 /* coprocessor control registers */ \
230 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
231 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
232 /* virtual arg pointer */ \
233 1, FIXED_SHADOW_REGISTERS \
236 /* This is a call-clobbered reg not used for args or return value,
237 that we use as a temp for saving control registers in the prolog
238 and restoring them in the epilog. */
239 #define REGSAVE_CONTROL_TEMP 11
241 /* A "1" here means a register may be changed by a function without
242 needing to preserve its previous value. */
243 #define CALL_USED_REGISTERS { \
244 /* core registers */ \
245 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, \
246 /* control registers */ \
247 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
248 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
249 /* coprocessor registers */ \
250 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
251 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
252 /* coprocessor control registers */ \
253 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
254 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
255 /* virtual arg pointer */ \
256 1, CALL_USED_SHADOW_REGISTERS \
259 #define REG_ALLOC_ORDER { \
260 /* core registers */ \
261 3, 2, 1, 0, 9, 10, 11, 12, 4, 5, 6, 7, 8, 13, 14, 15, \
262 /* control registers */ \
263 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, \
264 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \
265 /* coprocessor registers */ \
266 /* Prefer to use the non-loadable registers when looking for a \
267 member of CR_REGS (as opposed to LOADABLE_CR_REGS). */ \
268 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 48, 49, 50, 51, 52, 58, \
269 59, 60, 61, 62, 63, 53, 54, 55, 56, 57, 74, 75, 76, 77, 78, 79, \
270 /* coprocessor control registers */ \
271 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, \
272 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, \
273 /* virtual arg pointer */ \
274 112, SHADOW_REG_ALLOC_ORDER \
277 /* We must somehow disable register remapping for interrupt functions. */
278 extern char mep_leaf_registers[];
279 #define LEAF_REGISTERS mep_leaf_registers
280 #define LEAF_REG_REMAP(REG) (REG)
283 #define FIRST_GR_REGNO 0
284 #define FIRST_CONTROL_REGNO (FIRST_GR_REGNO + 16)
285 #define FIRST_CR_REGNO (FIRST_CONTROL_REGNO + 32)
286 #define FIRST_CCR_REGNO (FIRST_CR_REGNO + 32)
288 #define GR_REGNO_P(REGNO) \
289 ((unsigned) ((REGNO) - FIRST_GR_REGNO) < 16)
291 #define CONTROL_REGNO_P(REGNO) \
292 ((unsigned) ((REGNO) - FIRST_CONTROL_REGNO) < 32)
294 #define LOADABLE_CR_REGNO_P(REGNO) \
295 ((unsigned) ((REGNO) - FIRST_CR_REGNO) < 16)
297 #define CR_REGNO_P(REGNO) \
298 ((unsigned) ((REGNO) - FIRST_CR_REGNO) < 32)
300 #define CCR_REGNO_P(REGNO) \
301 ((unsigned) ((REGNO) - FIRST_CCR_REGNO) < 32)
303 #define ANY_CONTROL_REGNO_P(REGNO) \
304 (CONTROL_REGNO_P (REGNO) || CCR_REGNO_P (REGNO))
306 #define HARD_REGNO_NREGS(REGNO, MODE) \
307 ((CR_REGNO_P (REGNO) && TARGET_64BIT_CR_REGS) \
308 ? (GET_MODE_SIZE (MODE) + 8 - 1) / 8 \
309 : (GET_MODE_SIZE (MODE) + 4 - 1) / 4)
311 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
313 #define MODES_TIEABLE_P(MODE1, MODE2) 1
315 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
316 mep_cannot_change_mode_class (FROM, TO, CLASS)
318 enum reg_class
320 NO_REGS,
321 SP_REGS,
322 TP_REGS,
323 GP_REGS,
324 R0_REGS,
325 RPC_REGS,
326 HI_REGS,
327 LO_REGS,
328 HILO_REGS,
329 TPREL_REGS,
330 GENERAL_NOT_R0_REGS,
331 GENERAL_REGS,
332 CONTROL_REGS,
333 CONTROL_OR_GENERAL_REGS,
334 USER0_REGS,
335 USER1_REGS,
336 USER2_REGS,
337 USER3_REGS,
338 LOADABLE_CR_REGS,
339 CR_REGS,
340 CCR_REGS,
341 ALL_REGS,
342 LIM_REG_CLASSES
345 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
347 #define REG_CLASS_NAMES { \
348 "NO_REGS", \
349 "SP_REGS", \
350 "TP_REGS", \
351 "GP_REGS", \
352 "R0_REGS", \
353 "RPC_REGS", \
354 "HI_REGS", \
355 "LO_REGS", \
356 "HILO_REGS", \
357 "TPREL_REGS", \
358 "GENERAL_NOT_R0_REGS", \
359 "GENERAL_REGS", \
360 "CONTROL_REGS", \
361 "CONTROL_OR_GENERAL_REGS", \
362 "USER0_REGS", \
363 "USER1_REGS", \
364 "USER2_REGS", \
365 "USER3_REGS", \
366 "LOADABLE_CR_REGS", \
367 "CR_REGS", \
368 "CCR_REGS", \
369 "ALL_REGS" }
371 #define REG_CLASS_CONTENTS { \
372 { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \
373 { 0x00008000, 0x00000000, 0x00000000, 0x00000000 }, /* SP_REGS */ \
374 { 0x00002000, 0x00000000, 0x00000000, 0x00000000 }, /* TP_REGS */ \
375 { 0x00004000, 0x00000000, 0x00000000, 0x00000000 }, /* GP_REGS */ \
376 { 0x00000001, 0x00000000, 0x00000000, 0x00000000 }, /* R0_REGS */ \
377 { 0x00400000, 0x00000000, 0x00000000, 0x00000000 }, /* RPC_REGS */ \
378 { 0x00800000, 0x00000000, 0x00000000, 0x00000000 }, /* HI_REGS */ \
379 { 0x01000000, 0x00000000, 0x00000000, 0x00000000 }, /* LO_REGS */ \
380 { 0x01800000, 0x00000000, 0x00000000, 0x00000000 }, /* HILO_REGS */ \
381 { 0x000000ff, 0x00000000, 0x00000000, 0x00000000 }, /* TPREL_REGS */ \
382 { 0x0000fffe, 0x00000000, 0x00000000, 0x00000000 }, /* GENERAL_NOT_R0_REGS */ \
383 { 0x0000ffff, 0x00000000, 0x00000000, 0x00010000 }, /* GENERAL_REGS */ \
384 { 0xffff0000, 0x0000ffff, 0x00000000, 0x00000000 }, /* CONTROL_REGS */ \
385 { 0xffffffff, 0x0000ffff, 0x00000000, 0x00000000 }, /* CONTROL_OR_GENERAL_REGS */ \
386 { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* USER0_REGS */ \
387 { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* USER1_REGS */ \
388 { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* USER2_REGS */ \
389 { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* USER3_REGS */ \
390 { 0x00000000, 0xffff0000, 0x00000000, 0x00000000 }, /* LOADABLE_CR_REGS */ \
391 { 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000 }, /* CR_REGS */ \
392 { 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff }, /* CCR_REGS */ \
393 { 0xffffffff, 0xffffffff, 0xffffffff, 0x0001ffff }, /* ALL_REGS */ \
396 #define REGNO_REG_CLASS(REGNO) (enum reg_class) mep_regno_reg_class (REGNO)
398 #define IRA_COVER_CLASSES { GENERAL_REGS, CONTROL_REGS, CR_REGS, CCR_REGS, LIM_REG_CLASSES }
400 #define BASE_REG_CLASS GENERAL_REGS
401 #define INDEX_REG_CLASS GENERAL_REGS
403 #if 0
404 #define REG_CLASS_FROM_CONSTRAINT(CHAR, STRING) \
405 mep_reg_class_from_constraint (CHAR, STRING)
406 #endif
408 #define REGNO_OK_FOR_BASE_P(NUM) (GR_REGNO_P (NUM) \
409 || (NUM) == ARG_POINTER_REGNUM \
410 || (NUM) >= FIRST_PSEUDO_REGISTER)
412 #define REGNO_OK_FOR_INDEX_P(NUM) REGNO_OK_FOR_BASE_P (NUM)
414 #define PREFERRED_RELOAD_CLASS(X, CLASS) mep_preferred_reload_class (X, CLASS)
416 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
417 mep_secondary_input_reload_class (CLASS, MODE, X)
418 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
419 mep_secondary_output_reload_class (CLASS, MODE, X)
420 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
421 mep_secondary_memory_needed (CLASS1, CLASS2, MODE)
423 #define CLASS_MAX_NREGS(CLASS, MODE) \
424 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
426 #if 0
427 #define CONST_OK_FOR_LETTER_P(VALUE, C) mep_const_ok_for_letter_p (VALUE, C)
429 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
431 #define CONSTRAINT_LEN(C, STR) \
432 ((C) == 'e' ? 2 : DEFAULT_CONSTRAINT_LEN (C, STR))
433 #define EXTRA_CONSTRAINT(VALUE, C) mep_extra_constraint (VALUE, C)
434 #endif
436 #define WANT_GCC_DECLARATIONS
437 #include "mep-intrin.h"
438 #undef WANT_GCC_DECLARATIONS
440 extern int mep_intrinsic_insn[];
441 extern unsigned int mep_selected_isa;
443 /* True if intrinsic X is available. X is a mep_* value declared
444 in mep-intrin.h. */
445 #define MEP_INTRINSIC_AVAILABLE_P(X) (mep_intrinsic_insn[X] >= 0)
447 /* Used to define CGEN_ENABLE_INTRINSIC_P in mep-intrin.h. */
448 #define CGEN_CURRENT_ISAS mep_selected_isa
449 #define CGEN_CURRENT_GROUP \
450 (mep_vliw_function_p (cfun->decl) ? GROUP_VLIW : GROUP_NORMAL)
454 #define STACK_GROWS_DOWNWARD 1
455 #define FRAME_GROWS_DOWNWARD 1
456 #define STARTING_FRAME_OFFSET 0
457 #define FIRST_PARM_OFFSET(FUNDECL) 0
458 #define INCOMING_FRAME_SP_OFFSET 0
460 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) mep_return_addr_rtx (COUNT)
461 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, LP_REGNO)
462 #define DWARF_FRAME_RETURN_COLUMN LP_REGNO
464 #define STACK_POINTER_REGNUM 15
465 #define FRAME_POINTER_REGNUM 8
466 #define ARG_POINTER_REGNUM 112
467 #define RETURN_ADDRESS_POINTER_REGNUM 17
468 #define STATIC_CHAIN_REGNUM 0
472 #define ELIMINABLE_REGS \
474 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
475 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
476 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
479 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
480 (OFFSET) = mep_elimination_offset (FROM, TO)
482 #define ACCUMULATE_OUTGOING_ARGS 1
486 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) 1
488 typedef struct
490 int nregs;
491 int vliw;
492 } CUMULATIVE_ARGS;
494 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
495 mep_init_cumulative_args (& (CUM), FNTYPE, LIBNAME, FNDECL)
497 #define FUNCTION_ARG_REGNO_P(REGNO) \
498 (((REGNO) >= 1 && (REGNO) <= 4) \
499 || ((REGNO) >= FIRST_CR_REGNO + 1 \
500 && (REGNO) <= FIRST_CR_REGNO + 4 \
501 && TARGET_COP))
503 #define RETURN_VALUE_REGNUM 0
505 #define FUNCTION_VALUE(VALTYPE, FUNC) mep_function_value (VALTYPE, FUNC)
506 #define LIBCALL_VALUE(MODE) mep_libcall_value (MODE)
508 #define FUNCTION_VALUE_REGNO_P(REGNO) \
509 ((REGNO) == RETURN_VALUE_REGNUM)
511 #define DEFAULT_PCC_STRUCT_RETURN 0
513 #define STRUCT_VALUE 0
515 #define FUNCTION_OK_FOR_SIBCALL(DECL) mep_function_ok_for_sibcall(DECL)
517 /* Prologue and epilogues are all handled via RTL. */
519 #define EXIT_IGNORE_STACK 1
521 #define EPILOGUE_USES(REGNO) mep_epilogue_uses (REGNO)
523 /* Profiling is supported. */
525 #define FUNCTION_PROFILER(FILE, LABELNO) mep_function_profiler (FILE);
526 #undef TARGET_HAS_F_SETLKW
527 #define NO_PROFILE_COUNTERS 1
529 /* Trampolines are built at run-time. The cache is invalidated at
530 run-time also. */
532 #define TRAMPOLINE_SIZE 20
535 #define MAX_REGS_PER_ADDRESS 1
537 #ifdef REG_OK_STRICT
538 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
539 if (mep_legitimate_address ((MODE), (X), 1)) goto LABEL
540 #else
541 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
542 if (mep_legitimate_address ((MODE), (X), 0)) goto LABEL
543 #endif
545 #ifdef REG_OK_STRICT
546 #define REG_OK_FOR_BASE_P(X) GR_REGNO_P (REGNO (X))
547 #else
548 #define REG_OK_FOR_BASE_P(X) (GR_REGNO_P (REGNO (X)) \
549 || REGNO (X) == ARG_POINTER_REGNUM \
550 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
551 #endif
553 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
555 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
556 if (mep_legitimize_reload_address (&(X), (MODE), (OPNUM), (TYPE), (IND_LEVELS))) \
557 goto WIN
559 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
561 #define LEGITIMATE_CONSTANT_P(X) \
562 mep_legitimate_constant_p(X)
564 #define SELECT_CC_MODE(OP, X, Y) CCmode
567 /* Moves between control regs need a scratch. */
568 #define REGISTER_MOVE_COST(MODE, FROM, TO) mep_register_move_cost (MODE, FROM, TO)
570 #define SLOW_BYTE_ACCESS 1
572 /* Define this macro if it is as good or better to call a constant function
573 address than to call an address kept in a register. */
574 #define NO_FUNCTION_CSE
577 #define TEXT_SECTION_ASM_OP "\t.text\n\t.core"
578 #define DATA_SECTION_ASM_OP "\t.data"
579 #define BSS_SECTION_ASM_OP ".bss"
581 #define USE_SELECT_SECTION_FOR_FUNCTIONS 1
583 #define JUMP_TABLES_IN_TEXT_SECTION 1
585 #define TARGET_ASM_FILE_END mep_file_cleanups
587 #define ASM_APP_ON "#APP\n"
588 #define ASM_APP_OFF "#NO_APP\n"
590 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
591 do \
593 long l[2]; \
595 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
596 fprintf (FILE, "\t.long\t0x%lx,0x%lx\n", l[0], l[1]); \
598 while (0)
600 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
601 do \
603 long l; \
605 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
606 fprintf ((FILE), "\t.long\t0x%lx\n", l); \
608 while (0)
610 #define ASM_OUTPUT_CHAR(FILE, VALUE) \
611 do \
613 fprintf (FILE, "\t.byte\t"); \
614 output_addr_const (FILE, (VALUE)); \
615 fprintf (FILE, "\n"); \
617 while (0)
619 #define ASM_OUTPUT_SHORT(FILE, VALUE) \
620 do \
622 fprintf (FILE, "\t.hword\t"); \
623 output_addr_const (FILE, (VALUE)); \
624 fprintf (FILE, "\n"); \
626 while (0)
628 #define ASM_OUTPUT_INT(FILE, VALUE) \
629 do \
631 fprintf (FILE, "\t.word\t"); \
632 output_addr_const (FILE, (VALUE)); \
633 fprintf (FILE, "\n"); \
635 while (0)
637 #define ASM_OUTPUT_BYTE(STREAM, VALUE) \
638 fprintf (STREAM, "\t%s\t0x%x\n", ASM_BYTE_OP, (VALUE))
640 /* Most of these are here to support based/tiny/far/io attributes. */
642 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGNMENT) \
643 mep_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 1)
645 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGNMENT) \
646 mep_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 0)
648 #define ASM_OUTPUT_LABEL(STREAM, NAME) \
649 do \
651 assemble_name (STREAM, NAME); \
652 fputs (":\n", STREAM); \
654 while (0)
656 /* Globalizing directive for a label. */
657 #define GLOBAL_ASM_OP "\t.globl "
659 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
660 asm_fprintf ((STREAM), "%U%s", mep_strip_name_encoding (NAME))
662 #define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \
663 do \
665 (OUTVAR) = (char *) alloca (strlen ((NAME)) + 12); \
666 sprintf ((OUTVAR), "%s.%ld", (NAME), (long)(NUMBER)); \
668 while (0)
671 #define REGISTER_NAMES \
673 /* Core registers. */ \
674 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", \
675 "$8", "$9", "$10", "$11", "$12", "$tp", "$gp", "$sp", \
676 /* Control registers. */ \
677 "$pc", "$lp", "$sar", "3", "$rpb", "$rpe", "$rpc", "$hi", \
678 "$lo", "9", "10", "11", "$mb0", "$me0", "$mb1", "$me1", \
679 "$psw", "$id", "$tmp", "$epc", "$exc", "$cfg", "22", "$npc", \
680 "$dbg", "$depc", "$opt", "$rcfg", "$ccfg", "29", "30", "31", \
681 /* Coprocessor registers. */ \
682 "$c0", "$c1", "$c2", "$c3", "$c4", "$c5", "$c6", "$c7", \
683 "$c8", "$c9", "$c10", "$c11", "$c12", "$c13", "$c14", "$c15", \
684 "$c16", "$c17", "$c18", "$c19", "$c20", "$c21", "$c22", "$c23", \
685 "$c24", "$c25", "$c26", "$c27", "$c28", "$c29", "$c30", "$c31", \
686 /* Coprocessor control registers. */ \
687 "$ccr0", "$ccr1", "$ccr2", "$ccr3", "$ccr4", "$ccr5", "$ccr6", \
688 "$ccr7", "$ccr8", "$ccr9", "$ccr10", "$ccr11", "$ccr12", "$ccr13", \
689 "$ccr14", "$ccr15", "$ccr16", "$ccr17", "$ccr18", "$ccr19", "$ccr20", \
690 "$ccr21", "$ccr22", "$ccr23", "$ccr24", "$ccr25", "$ccr26", "$ccr27", \
691 "$ccr28", "$ccr29", "$ccr30", "$ccr31", \
692 /* Virtual arg pointer. */ \
693 "$argp", SHADOW_REGISTER_NAMES \
696 /* We duplicate some of the above because we twiddle the above
697 according to *how* the registers are used. Likewise, we include
698 the standard names for coprocessor control registers so that
699 coprocessor options can rename them in the default table. Note
700 that these are compared to stripped names (see REGISTER_PREFIX
701 below). */
702 #define ADDITIONAL_REGISTER_NAMES \
704 { "8", 8 }, { "fp", 8 }, \
705 { "13", 13 }, { "tp", 13 }, \
706 { "14", 14 }, { "gp", 14 }, \
707 { "15", 15 }, { "sp", 15 }, \
708 { "ccr0", FIRST_CCR_REGNO + 0 }, \
709 { "ccr1", FIRST_CCR_REGNO + 1 }, \
710 { "ccr2", FIRST_CCR_REGNO + 2 }, \
711 { "ccr3", FIRST_CCR_REGNO + 3 }, \
712 { "ccr4", FIRST_CCR_REGNO + 4 }, \
713 { "ccr5", FIRST_CCR_REGNO + 5 }, \
714 { "ccr6", FIRST_CCR_REGNO + 6 }, \
715 { "ccr7", FIRST_CCR_REGNO + 7 }, \
716 { "ccr8", FIRST_CCR_REGNO + 8 }, \
717 { "ccr9", FIRST_CCR_REGNO + 9 }, \
718 { "ccr10", FIRST_CCR_REGNO + 10 }, \
719 { "ccr11", FIRST_CCR_REGNO + 11 }, \
720 { "ccr12", FIRST_CCR_REGNO + 12 }, \
721 { "ccr13", FIRST_CCR_REGNO + 13 }, \
722 { "ccr14", FIRST_CCR_REGNO + 14 }, \
723 { "ccr15", FIRST_CCR_REGNO + 15 }, \
724 { "ccr16", FIRST_CCR_REGNO + 16 }, \
725 { "ccr17", FIRST_CCR_REGNO + 17 }, \
726 { "ccr18", FIRST_CCR_REGNO + 18 }, \
727 { "ccr19", FIRST_CCR_REGNO + 19 }, \
728 { "ccr20", FIRST_CCR_REGNO + 20 }, \
729 { "ccr21", FIRST_CCR_REGNO + 21 }, \
730 { "ccr22", FIRST_CCR_REGNO + 22 }, \
731 { "ccr23", FIRST_CCR_REGNO + 23 }, \
732 { "ccr24", FIRST_CCR_REGNO + 24 }, \
733 { "ccr25", FIRST_CCR_REGNO + 25 }, \
734 { "ccr26", FIRST_CCR_REGNO + 26 }, \
735 { "ccr27", FIRST_CCR_REGNO + 27 }, \
736 { "ccr28", FIRST_CCR_REGNO + 28 }, \
737 { "ccr29", FIRST_CCR_REGNO + 29 }, \
738 { "ccr30", FIRST_CCR_REGNO + 30 }, \
739 { "ccr31", FIRST_CCR_REGNO + 31 } \
742 /* We watch for pipeline hazards with these */
743 #define ASM_OUTPUT_OPCODE(STREAM, PTR) mep_asm_output_opcode (STREAM, PTR)
744 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) mep_final_prescan_insn (INSN, OPVEC, NOPERANDS)
746 #define PRINT_OPERAND(STREAM, X, CODE) mep_print_operand (STREAM, X, CODE)
748 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '!' || (CODE) == '<')
750 #define PRINT_OPERAND_ADDRESS(STREAM, X) mep_print_operand_address (STREAM, X)
752 #define REGISTER_PREFIX "$"
753 #define LOCAL_LABEL_PREFIX "."
754 #define USER_LABEL_PREFIX ""
755 #define IMMEDIATE_PREFIX ""
759 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
760 fprintf (STREAM, "\t.word .L%d\n", VALUE)
764 #undef PREFERRED_DEBUGGING_TYPE
765 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
766 #define DWARF2_DEBUGGING_INFO 1
767 #define DWARF2_UNWIND_INFO 1
769 #define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) + 10 : INVALID_REGNUM)
771 #define EH_RETURN_STACKADJ_RTX mep_return_stackadj_rtx ()
772 #define EH_RETURN_HANDLER_RTX mep_return_handler_rtx ()
774 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
778 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
779 fprintf ((STREAM), "\t.p2align %d\n", (POWER))
783 #define CASE_VECTOR_MODE SImode
785 #define WORD_REGISTER_OPERATIONS
786 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
788 #define SHORT_IMMEDIATES_SIGN_EXTEND
790 #define MOVE_MAX 4
792 #define SHIFT_COUNT_TRUNCATED 1
794 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
796 #define STORE_FLAG_VALUE 1
798 #define Pmode SImode
800 #define FUNCTION_MODE SImode
802 #define REGISTER_TARGET_PRAGMAS() mep_register_pragmas ()
804 /* If defined, a C expression to determine the base term of address X.
805 This macro is used in only one place: `find_base_term' in alias.c.
807 It is always safe for this macro to not be defined. It exists so
808 that alias analysis can understand machine-dependent addresses.
810 The typical use of this macro is to handle addresses containing
811 a label_ref or symbol_ref within an UNSPEC. */
812 #define FIND_BASE_TERM(X) mep_find_base_term (X)