| commit | df4e0359dad239854af0ea9eacb8e7e3719557d0 | |
| author | Peter Bergner <bergner@linux.ibm.com> | |
| Mon, 31 May 2021 03:45:55 +0000 (30 22:45 -0500) | ||
| committer | Peter Bergner <bergner@linux.ibm.com> | |
| Mon, 31 May 2021 03:45:55 +0000 (30 22:45 -0500) | ||
| tree | de3db3ab7597e286cded4a705b508dec7eee892e | treesnapshot (tar.gz zip) |
| parent | e21e93407202e62a10c372595076c593c561bb11 | commitdiff |
rs6000: MMA test case ICEs using -O3 [PR99842]
The mma_assemble_input_operand predicate does not accept reg+reg indexed
addresses which can lead to ICEs. The lxv and lxvp instructions have
indexed forms (lxvx and lxvpx), so the simple solution is to just allow
indexed addresses in the predicate.
2021-05-30 Peter Bergner <bergner@linux.ibm.com>
gcc/
PR target/99842
* config/rs6000/predicates.md(mma_assemble_input_operand): Allow
indexed form addresses.
gcc/testsuite/
PR target/99842
* g++.target/powerpc/pr99842.C: New.
The mma_assemble_input_operand predicate does not accept reg+reg indexed
addresses which can lead to ICEs. The lxv and lxvp instructions have
indexed forms (lxvx and lxvpx), so the simple solution is to just allow
indexed addresses in the predicate.
2021-05-30 Peter Bergner <bergner@linux.ibm.com>
gcc/
PR target/99842
* config/rs6000/predicates.md(mma_assemble_input_operand): Allow
indexed form addresses.
gcc/testsuite/
PR target/99842
* g++.target/powerpc/pr99842.C: New.
| gcc/config/rs6000/predicates.md | diffblobblamehistory | |
| gcc/testsuite/g++.target/powerpc/pr99842.C | [new file with mode: 0644] | blob |