PR target/77270
commit8938d43d1687c985156277b4ac98f8c845fd0145
authoruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 24 Aug 2016 14:59:43 +0000 (24 14:59 +0000)
committeruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 24 Aug 2016 14:59:43 +0000 (24 14:59 +0000)
tree2b99a9b2a44b96dabcea0bb24e14da705e058dfc
parent318550d62cd3f70e4fcba7451524d759e8fe8165
PR target/77270
* gcc.dg/tree-ssa/loop-28.c: Also compile on 32bit x86 targets.
(dg-options): Use -march=amdfam10 instead of -march=athlon.
* gcc.dg/tree-ssa/update-unroll-1.c: Ditto.
* gcc.dg/tree-ssa/prefetch-3.c: Ditto.
* gcc.dg/tree-ssa/prefetch-4.c: Ditto.
* gcc.dg/tree-ssa/prefetch-5.c: Ditto.
* gcc.dg/tree-ssa/prefetch-6.c: Ditto.  Do not require sse2
effective target.  Remove scan-assembler-times directives.
* gcc.dg/tree-ssa/prefetch-7.c: Ditto.
* gcc.dg/tree-ssa/prefetch-8.c: Ditto.
* gcc.dg/tree-ssa/prefetch-9.c: Ditto.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@239737 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/tree-ssa/loop-28.c
gcc/testsuite/gcc.dg/tree-ssa/prefetch-3.c
gcc/testsuite/gcc.dg/tree-ssa/prefetch-4.c
gcc/testsuite/gcc.dg/tree-ssa/prefetch-5.c
gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c
gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c
gcc/testsuite/gcc.dg/tree-ssa/prefetch-8.c
gcc/testsuite/gcc.dg/tree-ssa/prefetch-9.c
gcc/testsuite/gcc.dg/tree-ssa/update-unroll-1.c