| commit | 791952ef4396da74370d28cc3200451080b5c65a | |
| author | Uros Bizjak <ubizjak@gmail.com> | |
| Sun, 20 Aug 2023 15:52:22 +0000 (20 17:52 +0200) | ||
| committer | Uros Bizjak <ubizjak@gmail.com> | |
| Sun, 20 Aug 2023 15:55:51 +0000 (20 17:55 +0200) | ||
| tree | 788c36b54cd0eb3c891f010fd4db1c5bda0fd91d | treesnapshot (tar.gz zip) |
| parent | d77c280454cfba48ef38357145cecdabc8c1b05c | commitdiff |
i386: Micro-optimize ix86_expand_sse_extend
Partial vector src is forced to a register as ops[1], we can use it
instead of SRC in the call to ix86_expand_sse_cmp. This change avoids
forcing operand[1] to a register in sign/zero-extend expanders.
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
instead of src in the call to ix86_expand_sse_cmp.
* config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
force operands[1] to a register.
(<any_extend:insn>v4hiv4si2): Ditto.
(<any_extend:insn>v2siv2di2): Ditto.
Partial vector src is forced to a register as ops[1], we can use it
instead of SRC in the call to ix86_expand_sse_cmp. This change avoids
forcing operand[1] to a register in sign/zero-extend expanders.
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
instead of src in the call to ix86_expand_sse_cmp.
* config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
force operands[1] to a register.
(<any_extend:insn>v4hiv4si2): Ditto.
(<any_extend:insn>v2siv2di2): Ditto.
| gcc/config/i386/i386-expand.cc | diffblobblamehistory | |
| gcc/config/i386/sse.md | diffblobblamehistory |