RISC-V: Enhance the test case for RVV vfsub/vfrsub rounding
commit733e8b48cba745d80ca2d52c1e4f47d1075e30d6
authorPan Li <pan2.li@intel.com>
Wed, 2 Aug 2023 07:59:24 +0000 (2 15:59 +0800)
committerPan Li <pan2.li@intel.com>
Tue, 8 Aug 2023 14:21:40 +0000 (8 22:21 +0800)
treeebf14c6bf4af0954a990633d24217e605584e65d
parentd9dc70cc65becca95a5f2e43bf8bd2d452b5796f
RISC-V: Enhance the test case for RVV vfsub/vfrsub rounding

This patch would like to enhance the vfsub/vfrsub rounding API test for
below 2 purposes.

* The non-rm API has no frm related insn generated.
* The rm API has the frm backup/restore/set insn generated.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/float-point-single-rsub.c: Enhance
cases.
* gcc.target/riscv/rvv/base/float-point-single-sub.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/gcc.target/riscv/rvv/base/float-point-single-rsub.c
gcc/testsuite/gcc.target/riscv/rvv/base/float-point-single-sub.c