Improve Cortex-A53 shift bypass
commit5f43aafade30cddf3210996bea2bd196eb4e404d
authorwilco <wilco@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 28 Jun 2017 14:13:02 +0000 (28 14:13 +0000)
committerwilco <wilco@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 28 Jun 2017 14:13:02 +0000 (28 14:13 +0000)
treedff29e7e29c7b161ca55e3d7bcf2469727c7c2f0
parented0e7ff0ef00ec662053ac94be7b439d8a3e1983
Improve Cortex-A53 shift bypass

The aarch_forward_to_shift_is_not_shifted_reg bypass always returns true
on AArch64 shifted instructions.  This causes the bypass to activate in
too many cases, resulting in slower execution on Cortex-A53 like reported
in PR79665.

This patch uses the arm_no_early_alu_shift_dep condition instead which
improves the example in PR79665 by ~7%.  Given it is no longer used,
remove aarch_forward_to_shift_is_not_shifted_reg.  Also remove an
unnecessary REG_P check.

    gcc/
PR target/79665
* config/arm/aarch-common.c (arm_no_early_alu_shift_dep):
Remove redundant if.
(aarch_forward_to_shift_is_not_shifted_reg): Remove.
* config/arm/aarch-common-protos.h
(aarch_forward_to_shift_is_not_shifted_re): Remove.
* config/arm/cortex-a53.md: Use arm_no_early_alu_shift_dep in bypass.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@249740 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/arm/aarch-common-protos.h
gcc/config/arm/aarch-common.c
gcc/config/arm/cortex-a53.md