[AArch64] Fix atomic_cmp_exchange_zero_reg_1.c with +lse
commit5a08f539203b13e51a080cd58db8fe7381c34cc7
authorktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 21 Jun 2017 15:26:21 +0000 (21 15:26 +0000)
committerktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 21 Jun 2017 15:26:21 +0000 (21 15:26 +0000)
treeebce3ffc803a5a25133610f3f9eb8f3f68f1ba49
parent33fecaa011f063e674838bb0313db8dc7f01684f
[AArch64] Fix atomic_cmp_exchange_zero_reg_1.c with +lse

* config/aarch64/atomics.md (aarch64_compare_and_swap<mode>_lse,
SHORT): Relax operand 3 to aarch64_reg_or_zero and constraint to Z.
(aarch64_compare_and_swap<mode>_lse, GPI): Likewise.
(aarch64_atomic_cas<mode>, SHORT): Likewise for operand 2.
(aarch64_atomic_cas<mode>, GPI): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@249457 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/aarch64/atomics.md