| commit | 4cdf7db9a39d18bd536d816a5751d4d3cf23808b | |
| author | Peter Bergner <bergner@linux.ibm.com> | |
| Tue, 16 Nov 2021 18:14:22 +0000 (16 12:14 -0600) | ||
| committer | Peter Bergner <bergner@linux.ibm.com> | |
| Tue, 16 Nov 2021 18:14:22 +0000 (16 12:14 -0600) | ||
| tree | 6b23eb7b51feb857c3207e4d8331375337cede24 | treesnapshot (tar.gz zip) |
| parent | 48a8c5be5b98240d664672a2b7b7d26f3c36cf84 | commitdiff |
rs6000: MMA test case emits wrong code when building a vector pair [PR102976]
PR102976 shows a test case where we generate wrong code when building
a vector pair from 2 vector registers. The bug here is that with unlucky
register assignments, we can clobber one of the input operands before
we write both registers of the output operand. The solution is to use
early-clobbers in the assemble pair and accumulator patterns.
2021-11-16 Peter Bergner <bergner@linux.ibm.com>
gcc/
PR target/102976
* config/rs6000/mma.md (*vsx_assemble_pair): Add early-clobber for
output operand.
(*mma_assemble_acc): Likewise.
gcc/testsuite/
PR target/102976
* gcc.target/powerpc/pr102976.c: New test.
PR102976 shows a test case where we generate wrong code when building
a vector pair from 2 vector registers. The bug here is that with unlucky
register assignments, we can clobber one of the input operands before
we write both registers of the output operand. The solution is to use
early-clobbers in the assemble pair and accumulator patterns.
2021-11-16 Peter Bergner <bergner@linux.ibm.com>
gcc/
PR target/102976
* config/rs6000/mma.md (*vsx_assemble_pair): Add early-clobber for
output operand.
(*mma_assemble_acc): Likewise.
gcc/testsuite/
PR target/102976
* gcc.target/powerpc/pr102976.c: New test.
| gcc/config/rs6000/mma.md | diffblobblamehistory | |
| gcc/testsuite/gcc.target/powerpc/pr102976.c | [new file with mode: 0644] | blob |