Allow targets to pick a vector prefix other than "V"

Allow targets to pick a vector prefix other than "V"

Originally the SVE port used the names for 256-bit vectors, as the
next available increment after Advanced SIMD.  However, that was
always a bit of a hack and is bound to confuse people new to the code.

Nothing actually requires vector modes to have names of the form
V<nunits><mode>, and after talking it over with the AArch64 maintainers,
we agreed to switch to things like:

    VNx16QI

instead.  This patch lets targets pick this kind of prefix.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
	* genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
	(VECTOR_MODES): Use it.
	(make_vector_modes): Take the prefix as an argument.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@256203 138bc75d-0d04-0410-961f-82ee72b054a4