| commit | 3bffc4b37e85c7f6092dfb0fbe4067d268e97b46 | |
| author | Richard Earnshaw <rearnsha@arm.com> | |
| Mon, 19 Apr 2021 15:56:31 +0000 (19 16:56 +0100) | ||
| committer | Richard Earnshaw <rearnsha@arm.com> | |
| Mon, 19 Apr 2021 15:56:31 +0000 (19 16:56 +0100) | ||
| tree | 40b99fa1ed284dc5af57691cb166600cf69ff20f | treesnapshot (tar.gz zip) |
| parent | 714bdc31b69688ae2eaeb9807a48e0f101fecf4e | commitdiff |
arm: partial revert of r11-8168 [PR100067]
This is a partial revert of r11-8168. The overall purpose of the
commit is retained (to fix a bogus warning when -mfpu=<not-auto> is
used in combination with eg -mcpu=neoverse-v1), but it removes the
hunk that changed the subsequent feature bits for features of a
simd/fp unit that cannot be described by -mfpu. While I still think
that is the correct direction of travel, it's somewhat disruptive and
not appropriate for late stage4. I'll revisit for gcc-12.
gcc:
PR target/100067
* config/arm/arm.c (arm_configure_build_target): Do not strip
extended FPU/SIMD feature bits from the target ISA when -mfpu
is specified (partial revert of r11-8168).
This is a partial revert of r11-8168. The overall purpose of the
commit is retained (to fix a bogus warning when -mfpu=<not-auto> is
used in combination with eg -mcpu=neoverse-v1), but it removes the
hunk that changed the subsequent feature bits for features of a
simd/fp unit that cannot be described by -mfpu. While I still think
that is the correct direction of travel, it's somewhat disruptive and
not appropriate for late stage4. I'll revisit for gcc-12.
gcc:
PR target/100067
* config/arm/arm.c (arm_configure_build_target): Do not strip
extended FPU/SIMD feature bits from the target ISA when -mfpu
is specified (partial revert of r11-8168).
| gcc/config/arm/arm.c | diffblobblamehistory |