gcc/
commit35fd0c100081827c7e16dbb3492431d3eb3125f5
authorbergner <bergner@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 28 Jun 2016 01:28:28 +0000 (28 01:28 +0000)
committerbergner <bergner@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 28 Jun 2016 01:28:28 +0000 (28 01:28 +0000)
tree8b84ddf3424e979b04f60e7c78a033030c2fd33e
parent01b61153d1fbaa09c467636b5b602d478e4c320b
gcc/
PR target/71656
* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add
OPTION_MASK_P9_DFORM_VECTOR.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
disable -mpower9-dform-vector when using reload.
(quad_address_p): Remove 'gpr_p' argument and all associated code.
New 'strict' argument.  Update all callers.  Add strict addressing
support.
(rs6000_legitimate_offset_address_p): Remove call to
virtual_stack_registers_memory_p.
(rs6000_legitimize_reload_address): Add quad address support.
(rs6000_legitimate_address_p): Move call to quad_address_p above
call to virtual_stack_registers_memory_p.  Adjust quad_address_p args
to account for new strict usage.
(rs6000_output_move_128bit): Adjust quad_address_p args to account
for new strict usage.
* config/rs6000/predicates.md (quad_memory_operand): Likewise.

gcc/testsuite/
PR target/71656
* gcc.target/powerpc/pr71656-1.c: New test.
* gcc.target/powerpc/pr71656-2.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@237811 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/rs6000/predicates.md
gcc/config/rs6000/rs6000-cpus.def
gcc/config/rs6000/rs6000.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/pr71656-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/pr71656-2.c [new file with mode: 0644]