PR target/85582
commit1671083ac18e252a6949016a1f945684f9753b96
authorjakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 2 May 2018 21:56:17 +0000 (2 21:56 +0000)
committerjakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 2 May 2018 21:56:17 +0000 (2 21:56 +0000)
treeda4886e607b08410f158790f4f8e9ced6de28a7a
parentbeed22e5ef77fb8032f3855bb0c16e608fc1da7a
PR target/85582
* config/i386/i386.md (*ashl<dwi>3_doubleword_mask,
*ashl<dwi>3_doubleword_mask_1, *<shift_insn><dwi>3_doubleword_mask,
*<shift_insn><dwi>3_doubleword_mask_1): In condition require that
the highest significant bit of the shift count mask is clear.  In
check whether and[sq]i3 is needed verify that all significant bits
of the shift count other than the highest are set.

* gcc.c-torture/execute/pr85582-3.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@259862 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/i386/i386.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.c-torture/execute/pr85582-3.c [new file with mode: 0644]