Optimize signed DImode -> TImode on power10.
commit1301d7f647c7ac40da7f910aa6e790205e34bb8b
authorMichael Meissner <meissner@linux.ibm.com>
Sat, 5 Mar 2022 05:01:52 +0000 (5 00:01 -0500)
committerMichael Meissner <meissner@linux.ibm.com>
Sat, 5 Mar 2022 05:01:52 +0000 (5 00:01 -0500)
tree5c7c68c556cd1267e48da4a0bb1cf70b6c3d4543
parent8d96e14c1d61b04cd424cdbb6c830bb204dafbcf
Optimize signed DImode -> TImode on power10.

On power10, GCC tries to optimize the signed conversion from DImode to
TImode by using the vextsd2q instruction.  However to generate this
instruction, it would have to generate 3 direct moves (1 from the GPR
registers to the altivec registers, and 2 from the altivec registers to
the GPR register).

This patch generates the shift right immediate instruction to do the
conversion if the target/source registers ares GPR registers like it does
on earlier systems.  If the target/source registers are Altivec registers,
it will generate the vextsd2q instruction.

2022-03-05   Michael Meissner  <meissner@linux.ibm.com>

gcc/
PR target/104698
* config/rs6000/vsx.md (UNSPEC_MTVSRD_DITI_W1): Delete.
(mtvsrdd_diti_w1): Delete.
(extendditi2): Convert from define_expand to
define_insn_and_split.  Replace with code to deal with both GPR
registers and with altivec registers.

gcc/testsuite/
PR target/104698
* gcc.target/powerpc/pr104698-1.c: New test.
* gcc.target/powerpc/pr104698-2.c: New test.
gcc/config/rs6000/vsx.md
gcc/testsuite/gcc.target/powerpc/pr104698-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/pr104698-2.c [new file with mode: 0644]