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BR 1709392: Fix alignment handling in Mach-O format
[nasm.git] / disasm.c
blobb86c7f7363f71a7e5bea47e7fb026f3b34a3a94f
1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
2 *
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
7 *
8 * initial version 27/iii/95 by Simon Tatham
9 */
10
11 #include "compiler.h"
12
13 #include <stdio.h>
14 #include <string.h>
15 #include <limits.h>
16 #include <inttypes.h>
17
18 #include "nasm.h"
19 #include "disasm.h"
20 #include "sync.h"
21 #include "insns.h"
22
23 #include "names.c"
24
25 /*
26 * Flags that go into the `segment' field of `insn' structures
27 * during disassembly.
28 */
29 #define SEG_RELATIVE 1
30 #define SEG_32BIT 2
31 #define SEG_RMREG 4
32 #define SEG_DISP8 8
33 #define SEG_DISP16 16
34 #define SEG_DISP32 32
35 #define SEG_NODISP 64
36 #define SEG_SIGNED 128
37 #define SEG_64BIT 256
38
39 #include "regdis.c"
40
41 /*
42 * Prefix information
43 */
44 struct prefix_info {
45 uint8_t osize; /* Operand size */
46 uint8_t asize; /* Address size */
47 uint8_t osp; /* Operand size prefix present */
48 uint8_t asp; /* Address size prefix present */
49 uint8_t rep; /* Rep prefix present */
50 uint8_t seg; /* Segment override prefix present */
51 uint8_t lock; /* Lock prefix present */
52 uint8_t rex; /* Rex prefix present */
53 };
54
55 #define getu8(x) (*(uint8_t *)(x))
56 #if defined(__i386__) || defined(__x86_64__)
57 /* Littleendian CPU which can handle unaligned references */
58 #define getu16(x) (*(uint16_t *)(x))
59 #define getu32(x) (*(uint32_t *)(x))
60 #define getu64(x) (*(uint64_t *)(x))
61 #else
62 static uint16_t getu16(uint8_t *data)
63 {
64 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
65 }
66 static uint32_t getu32(uint8_t *data)
67 {
68 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
69 }
70 static uint64_t getu64(uint8_t *data)
71 {
72 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
73 }
74 #endif
75
76 #define gets8(x) ((int8_t)getu8(x))
77 #define gets16(x) ((int16_t)getu16(x))
78 #define gets32(x) ((int32_t)getu32(x))
79 #define gets64(x) ((int64_t)getu64(x))
80
81 /* Important: regval must already have been adjusted for rex extensions */
82 static enum reg_enum whichreg(int32_t regflags, int regval, int rex)
83 {
84 if (!(regflags & (REGISTER|REGMEM)))
85 return 0; /* Registers not permissible?! */
86
87 regflags |= REGISTER;
88
89 if (!(REG_AL & ~regflags))
90 return R_AL;
91 if (!(REG_AX & ~regflags))
92 return R_AX;
93 if (!(REG_EAX & ~regflags))
94 return R_EAX;
95 if (!(REG_RAX & ~regflags))
96 return R_RAX;
97 if (!(REG_DL & ~regflags))
98 return R_DL;
99 if (!(REG_DX & ~regflags))
100 return R_DX;
101 if (!(REG_EDX & ~regflags))
102 return R_EDX;
103 if (!(REG_RDX & ~regflags))
104 return R_RDX;
105 if (!(REG_CL & ~regflags))
106 return R_CL;
107 if (!(REG_CX & ~regflags))
108 return R_CX;
109 if (!(REG_ECX & ~regflags))
110 return R_ECX;
111 if (!(REG_RCX & ~regflags))
112 return R_RCX;
113 if (!(FPU0 & ~regflags))
114 return R_ST0;
115 if (!(REG_CS & ~regflags))
116 return (regval == 1) ? R_CS : 0;
117 if (!(REG_DESS & ~regflags))
118 return (regval == 0 || regval == 2
119 || regval == 3 ? rd_sreg[regval] : 0);
120 if (!(REG_FSGS & ~regflags))
121 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
122 if (!(REG_SEG67 & ~regflags))
123 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
124
125 /* All the entries below look up regval in an 16-entry array */
126 if (regval < 0 || regval > 15)
127 return 0;
128
129 if (!(REG8 & ~regflags)) {
130 if (rex & REX_P)
131 return rd_reg8_rex[regval];
132 else
133 return rd_reg8[regval];
134 }
135 if (!(REG16 & ~regflags))
136 return rd_reg16[regval];
137 if (!(REG32 & ~regflags))
138 return rd_reg32[regval];
139 if (!(REG64 & ~regflags))
140 return rd_reg64[regval];
141 if (!(REG_SREG & ~regflags))
142 return rd_sreg[regval & 7]; /* Ignore REX */
143 if (!(REG_CREG & ~regflags))
144 return rd_creg[regval];
145 if (!(REG_DREG & ~regflags))
146 return rd_dreg[regval];
147 if (!(REG_TREG & ~regflags)) {
148 if (rex & REX_P)
149 return 0; /* TR registers are ill-defined with rex */
150 return rd_treg[regval];
151 }
152 if (!(FPUREG & ~regflags))
153 return rd_fpureg[regval & 7]; /* Ignore REX */
154 if (!(MMXREG & ~regflags))
155 return rd_mmxreg[regval & 7]; /* Ignore REX */
156 if (!(XMMREG & ~regflags))
157 return rd_xmmreg[regval];
158
159 return 0;
160 }
161
162 static const char *whichcond(int condval)
163 {
164 static int conds[] = {
165 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
166 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
167 };
168 return conditions[conds[condval]];
169 }
170
171 /*
172 * Process a DREX suffix
173 */
174 static uint8_t *do_drex(uint8_t *data, insn *ins)
175 {
176 uint8_t drex = *data++;
177 operand *dst = &ins->oprs[ins->drexdst];
178
179 if ((drex & 8) != ((ins->rex & REX_OC) ? 8 : 0))
180 return NULL; /* OC0 mismatch */
181 ins->rex = (ins->rex & ~7) | (drex & 7);
182
183 dst->segment = SEG_RMREG;
184 dst->basereg = drex >> 4;
185 return data;
186 }
187
188
189 /*
190 * Process an effective address (ModRM) specification.
191 */
192 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
193 int segsize, operand * op, insn *ins)
194 {
195 int mod, rm, scale, index, base;
196 int rex;
197 uint8_t sib = 0;
198
199 mod = (modrm >> 6) & 03;
200 rm = modrm & 07;
201
202 if (mod != 3 && rm == 4 && asize != 16)
203 sib = *data++;
204
205 if (ins->rex & REX_D) {
206 data = do_drex(data, ins);
207 if (!data)
208 return NULL;
209 }
210 rex = ins->rex;
211
212 if (mod == 3) { /* pure register version */
213 op->basereg = rm+(rex & REX_B ? 8 : 0);
214 op->segment |= SEG_RMREG;
215 return data;
216 }
217
218 op->disp_size = 0;
219 op->eaflags = 0;
220
221 if (asize == 16) {
222 /*
223 * <mod> specifies the displacement size (none, byte or
224 * word), and <rm> specifies the register combination.
225 * Exception: mod=0,rm=6 does not specify [BP] as one might
226 * expect, but instead specifies [disp16].
227 */
228 op->indexreg = op->basereg = -1;
229 op->scale = 1; /* always, in 16 bits */
230 switch (rm) {
231 case 0:
232 op->basereg = R_BX;
233 op->indexreg = R_SI;
234 break;
235 case 1:
236 op->basereg = R_BX;
237 op->indexreg = R_DI;
238 break;
239 case 2:
240 op->basereg = R_BP;
241 op->indexreg = R_SI;
242 break;
243 case 3:
244 op->basereg = R_BP;
245 op->indexreg = R_DI;
246 break;
247 case 4:
248 op->basereg = R_SI;
249 break;
250 case 5:
251 op->basereg = R_DI;
252 break;
253 case 6:
254 op->basereg = R_BP;
255 break;
256 case 7:
257 op->basereg = R_BX;
258 break;
259 }
260 if (rm == 6 && mod == 0) { /* special case */
261 op->basereg = -1;
262 if (segsize != 16)
263 op->disp_size = 16;
264 mod = 2; /* fake disp16 */
265 }
266 switch (mod) {
267 case 0:
268 op->segment |= SEG_NODISP;
269 break;
270 case 1:
271 op->segment |= SEG_DISP8;
272 op->offset = (int8_t)*data++;
273 break;
274 case 2:
275 op->segment |= SEG_DISP16;
276 op->offset = *data++;
277 op->offset |= ((unsigned)*data++) << 8;
278 break;
279 }
280 return data;
281 } else {
282 /*
283 * Once again, <mod> specifies displacement size (this time
284 * none, byte or *dword*), while <rm> specifies the base
285 * register. Again, [EBP] is missing, replaced by a pure
286 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
287 * and RIP-relative addressing in 64-bit mode.
288 *
289 * However, rm=4
290 * indicates not a single base register, but instead the
291 * presence of a SIB byte...
292 */
293 int a64 = asize == 64;
294
295 op->indexreg = -1;
296
297 if (a64)
298 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
299 else
300 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
301
302 if (rm == 5 && mod == 0) {
303 if (segsize == 64) {
304 op->eaflags |= EAF_REL;
305 op->segment |= SEG_RELATIVE;
306 mod = 2; /* fake disp32 */
307 }
308
309 if (asize != 64)
310 op->disp_size = asize;
311
312 op->basereg = -1;
313 mod = 2; /* fake disp32 */
314 }
315
316 if (rm == 4) { /* process SIB */
317 scale = (sib >> 6) & 03;
318 index = (sib >> 3) & 07;
319 base = sib & 07;
320
321 op->scale = 1 << scale;
322
323 if (index == 4)
324 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
325 else if (a64)
326 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
327 else
328 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
329
330 if (base == 5 && mod == 0) {
331 op->basereg = -1;
332 mod = 2; /* Fake disp32 */
333 } else if (a64)
334 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
335 else
336 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
337
338 if (segsize == 16)
339 op->disp_size = 32;
340 }
341
342 switch (mod) {
343 case 0:
344 op->segment |= SEG_NODISP;
345 break;
346 case 1:
347 op->segment |= SEG_DISP8;
348 op->offset = gets8(data);
349 data++;
350 break;
351 case 2:
352 op->segment |= SEG_DISP32;
353 op->offset = getu32(data);
354 data += 4;
355 break;
356 }
357 return data;
358 }
359 }
360
361 /*
362 * Determine whether the instruction template in t corresponds to the data
363 * stream in data. Return the number of bytes matched if so.
364 */
365 #define case4(x) case (x): case (x)+1: case (x)+2: case (x)+3
366
367 static int matches(const struct itemplate *t, uint8_t *data,
368 const struct prefix_info *prefix, int segsize, insn *ins)
369 {
370 uint8_t *r = (uint8_t *)(t->code);
371 uint8_t *origdata = data;
372 bool a_used = false, o_used = false;
373 enum prefixes drep = 0;
374 uint8_t lock = prefix->lock;
375 int osize = prefix->osize;
376 int asize = prefix->asize;
377 int i, c;
378
379 for (i = 0; i < MAX_OPERANDS; i++) {
380 ins->oprs[i].segment = ins->oprs[i].disp_size =
381 (segsize == 64 ? SEG_64BIT : segsize == 32 ? SEG_32BIT : 0);
382 }
383 ins->condition = -1;
384 ins->rex = prefix->rex;
385
386 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
387 return false;
388
389 if (prefix->rep == 0xF2)
390 drep = P_REPNE;
391 else if (prefix->rep == 0xF3)
392 drep = P_REP;
393
394 while ((c = *r++) != 0) {
395 switch (c) {
396 case 01:
397 case 02:
398 case 03:
399 while (c--)
400 if (*r++ != *data++)
401 return false;
402 break;
403
404 case 04:
405 switch (*data++) {
406 case 0x07:
407 ins->oprs[0].basereg = 0;
408 break;
409 case 0x17:
410 ins->oprs[0].basereg = 2;
411 break;
412 case 0x1F:
413 ins->oprs[0].basereg = 3;
414 break;
415 default:
416 return false;
417 }
418 break;
419
420 case 05:
421 switch (*data++) {
422 case 0xA1:
423 ins->oprs[0].basereg = 4;
424 break;
425 case 0xA9:
426 ins->oprs[0].basereg = 5;
427 break;
428 default:
429 return false;
430 }
431 break;
432
433 case 06:
434 switch (*data++) {
435 case 0x06:
436 ins->oprs[0].basereg = 0;
437 break;
438 case 0x0E:
439 ins->oprs[0].basereg = 1;
440 break;
441 case 0x16:
442 ins->oprs[0].basereg = 2;
443 break;
444 case 0x1E:
445 ins->oprs[0].basereg = 3;
446 break;
447 default:
448 return false;
449 }
450 break;
451
452 case 07:
453 switch (*data++) {
454 case 0xA0:
455 ins->oprs[0].basereg = 4;
456 break;
457 case 0xA8:
458 ins->oprs[0].basereg = 5;
459 break;
460 default:
461 return false;
462 }
463 break;
464
465 case4(010):
466 {
467 int t = *r++, d = *data++;
468 if (d < t || d > t + 7)
469 return false;
470 else {
471 ins->oprs[c - 010].basereg = (d-t)+
472 (ins->rex & REX_B ? 8 : 0);
473 ins->oprs[c - 010].segment |= SEG_RMREG;
474 }
475 break;
476 }
477
478 case4(014):
479 ins->oprs[c - 014].offset = (int8_t)*data++;
480 ins->oprs[c - 014].segment |= SEG_SIGNED;
481 break;
482
483 case4(020):
484 ins->oprs[c - 020].offset = *data++;
485 break;
486
487 case4(024):
488 ins->oprs[c - 024].offset = *data++;
489 break;
490
491 case4(030):
492 ins->oprs[c - 030].offset = getu16(data);
493 data += 2;
494 break;
495
496 case4(034):
497 if (osize == 32) {
498 ins->oprs[c - 034].offset = getu32(data);
499 data += 4;
500 } else {
501 ins->oprs[c - 034].offset = getu16(data);
502 data += 2;
503 }
504 if (segsize != asize)
505 ins->oprs[c - 034].disp_size = asize;
506 break;
507
508 case4(040):
509 ins->oprs[c - 040].offset = getu32(data);
510 data += 4;
511 break;
512
513 case4(044):
514 switch (asize) {
515 case 16:
516 ins->oprs[c - 044].offset = getu16(data);
517 data += 2;
518 if (segsize != 16)
519 ins->oprs[c - 044].disp_size = 16;
520 break;
521 case 32:
522 ins->oprs[c - 044].offset = getu32(data);
523 data += 4;
524 if (segsize == 16)
525 ins->oprs[c - 044].disp_size = 32;
526 break;
527 case 64:
528 ins->oprs[c - 044].offset = getu64(data);
529 ins->oprs[c - 044].disp_size = 64;
530 data += 8;
531 break;
532 }
533 break;
534
535 case4(050):
536 ins->oprs[c - 050].offset = gets8(data++);
537 ins->oprs[c - 050].segment |= SEG_RELATIVE;
538 break;
539
540 case4(054):
541 ins->oprs[c - 054].offset = getu64(data);
542 data += 8;
543 break;
544
545 case4(060):
546 ins->oprs[c - 060].offset = gets16(data);
547 data += 2;
548 ins->oprs[c - 060].segment |= SEG_RELATIVE;
549 ins->oprs[c - 060].segment &= ~SEG_32BIT;
550 break;
551
552 case4(064):
553 ins->oprs[c - 064].segment |= SEG_RELATIVE;
554 if (osize == 16) {
555 ins->oprs[c - 064].offset = getu16(data);
556 data += 2;
557 ins->oprs[c - 064].segment &= ~(SEG_32BIT|SEG_64BIT);
558 } else if (osize == 32) {
559 ins->oprs[c - 064].offset = getu32(data);
560 data += 4;
561 ins->oprs[c - 064].segment &= ~SEG_64BIT;
562 ins->oprs[c - 064].segment |= SEG_32BIT;
563 }
564 if (segsize != osize) {
565 ins->oprs[c - 064].type =
566 (ins->oprs[c - 064].type & ~SIZE_MASK)
567 | ((osize == 16) ? BITS16 : BITS32);
568 }
569 break;
570
571 case4(070):
572 ins->oprs[c - 070].offset = getu32(data);
573 data += 4;
574 ins->oprs[c - 070].segment |= SEG_32BIT | SEG_RELATIVE;
575 break;
576
577 case4(0100):
578 case4(0110):
579 case4(0120):
580 case4(0130):
581 {
582 int modrm = *data++;
583 ins->oprs[c & 07].segment |= SEG_RMREG;
584 data = do_ea(data, modrm, asize, segsize,
585 &ins->oprs[(c >> 3) & 07], ins);
586 if (!data)
587 return false;
588 ins->oprs[c & 07].basereg = ((modrm >> 3)&7)+
589 (ins->rex & REX_R ? 8 : 0);
590 break;
591 }
592
593 case4(0140):
594 ins->oprs[c - 0140].offset = getu16(data);
595 data += 2;
596 break;
597
598 case4(0150):
599 ins->oprs[c - 0150].offset = getu32(data);
600 data += 4;
601 break;
602
603 case4(0160):
604 ins->rex |= REX_D;
605 ins->drexdst = c & 3;
606 break;
607
608 case4(0164):
609 ins->rex |= REX_D|REX_OC;
610 ins->drexdst = c & 3;
611 break;
612
613 case 0170:
614 if (*data++)
615 return false;
616 break;
617
618 case 0171:
619 data = do_drex(data, ins);
620 if (!data)
621 return false;
622 break;
623
624 case4(0200):
625 case4(0204):
626 case4(0210):
627 case4(0214):
628 case4(0220):
629 case4(0224):
630 case4(0230):
631 case4(0234):
632 {
633 int modrm = *data++;
634 if (((modrm >> 3) & 07) != (c & 07))
635 return false; /* spare field doesn't match up */
636 data = do_ea(data, modrm, asize, segsize,
637 &ins->oprs[(c >> 3) & 07], ins);
638 if (!data)
639 return false;
640 break;
641 }
642
643 case 0310:
644 if (asize != 16)
645 return false;
646 else
647 a_used = true;
648 break;
649
650 case 0311:
651 if (asize == 16)
652 return false;
653 else
654 a_used = true;
655 break;
656
657 case 0312:
658 if (asize != segsize)
659 return false;
660 else
661 a_used = true;
662 break;
663
664 case 0313:
665 if (asize != 64)
666 return false;
667 else
668 a_used = true;
669 break;
670
671 case 0314:
672 if (prefix->rex & REX_B)
673 return false;
674 break;
675
676 case 0315:
677 if (prefix->rex & REX_X)
678 return false;
679 break;
680
681 case 0316:
682 if (prefix->rex & REX_R)
683 return false;
684 break;
685
686 case 0317:
687 if (prefix->rex & REX_W)
688 return false;
689 break;
690
691 case 0320:
692 if (osize != 16)
693 return false;
694 else
695 o_used = true;
696 break;
697
698 case 0321:
699 if (osize != 32)
700 return false;
701 else
702 o_used = true;
703 break;
704
705 case 0322:
706 if (osize != (segsize == 16) ? 16 : 32)
707 return false;
708 else
709 o_used = true;
710 break;
711
712 case 0323:
713 ins->rex |= REX_W; /* 64-bit only instruction */
714 osize = 64;
715 break;
716
717 case 0324:
718 if (!(ins->rex & (REX_P|REX_W)) || osize != 64)
719 return false;
720 break;
721
722 case 0330:
723 {
724 int t = *r++, d = *data++;
725 if (d < t || d > t + 15)
726 return false;
727 else
728 ins->condition = d - t;
729 break;
730 }
731
732 case 0331:
733 if (prefix->rep)
734 return false;
735 break;
736
737 case 0332:
738 if (prefix->rep != 0xF2)
739 return false;
740 break;
741
742 case 0333:
743 if (prefix->rep != 0xF3)
744 return false;
745 drep = 0;
746 break;
747
748 case 0334:
749 if (lock) {
750 ins->rex |= REX_R;
751 lock = 0;
752 }
753 break;
754
755 case 0335:
756 if (drep == P_REP)
757 drep = P_REPE;
758 break;
759
760 case 0340:
761 return false;
762
763 case 0364:
764 if (prefix->osp)
765 return false;
766 break;
767
768 case 0365:
769 if (prefix->asp)
770 return false;
771 break;
772
773 case 0366:
774 if (!prefix->osp)
775 return false;
776 o_used = true;
777 break;
778
779 case 0367:
780 if (!prefix->asp)
781 return false;
782 o_used = true;
783 break;
784
785 default:
786 return false; /* Unknown code */
787 }
788 }
789
790 /* REX cannot be combined with DREX */
791 if ((ins->rex & REX_D) && (prefix->rex))
792 return false;
793
794 /*
795 * Check for unused rep or a/o prefixes.
796 */
797 for (i = 0; i < t->operands; i++) {
798 if (ins->oprs[i].segment != SEG_RMREG)
799 a_used = true;
800 }
801
802 if (lock) {
803 if (ins->prefixes[PPS_LREP])
804 return false;
805 ins->prefixes[PPS_LREP] = P_LOCK;
806 }
807 if (drep) {
808 if (ins->prefixes[PPS_LREP])
809 return false;
810 ins->prefixes[PPS_LREP] = drep;
811 }
812 if (!o_used && osize == ((segsize == 16) ? 32 : 16)) {
813 if (ins->prefixes[PPS_OSIZE])
814 return false;
815 ins->prefixes[PPS_OSIZE] = osize == 16 ? P_O16 : P_O32;
816 }
817 if (!a_used && asize != segsize) {
818 if (ins->prefixes[PPS_ASIZE])
819 return false;
820 ins->prefixes[PPS_ASIZE] = asize == 16 ? P_A16 : P_A32;
821 }
822
823 /* Fix: check for redundant REX prefixes */
824
825 return data - origdata;
826 }
827
828 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
829 int32_t offset, int autosync, uint32_t prefer)
830 {
831 const struct itemplate * const *p, * const *best_p;
832 const struct disasm_index *ix;
833 uint8_t *dp;
834 int length, best_length = 0;
835 char *segover;
836 int i, slen, colon, n;
837 uint8_t *origdata;
838 int works;
839 insn tmp_ins, ins;
840 uint32_t goodness, best;
841 int best_pref;
842 struct prefix_info prefix;
843 bool end_prefix;
844
845 memset(&ins, 0, sizeof ins);
846
847 /*
848 * Scan for prefixes.
849 */
850 memset(&prefix, 0, sizeof prefix);
851 prefix.asize = segsize;
852 prefix.osize = (segsize == 64) ? 32 : segsize;
853 segover = NULL;
854 origdata = data;
855
856 for (end_prefix = false; !end_prefix; ) {
857 switch (*data) {
858 case 0xF2:
859 case 0xF3:
860 prefix.rep = *data++;
861 break;
862 case 0xF0:
863 prefix.lock = *data++;
864 break;
865 case 0x2E:
866 segover = "cs", prefix.seg = *data++;
867 break;
868 case 0x36:
869 segover = "ss", prefix.seg = *data++;
870 break;
871 case 0x3E:
872 segover = "ds", prefix.seg = *data++;
873 break;
874 case 0x26:
875 segover = "es", prefix.seg = *data++;
876 break;
877 case 0x64:
878 segover = "fs", prefix.seg = *data++;
879 break;
880 case 0x65:
881 segover = "gs", prefix.seg = *data++;
882 break;
883 case 0x66:
884 prefix.osize = (segsize == 16) ? 32 : 16;
885 prefix.osp = *data++;
886 break;
887 case 0x67:
888 prefix.asize = (segsize == 32) ? 16 : 32;
889 prefix.asp = *data++;
890 break;
891 default:
892 if (segsize == 64 && (*data & 0xf0) == REX_P) {
893 prefix.rex = *data++;
894 if (prefix.rex & REX_W)
895 prefix.osize = 64;
896 end_prefix = true;
897 } else {
898 end_prefix = true;
899 }
900 }
901 }
902
903 best = -1; /* Worst possible */
904 best_p = NULL;
905 best_pref = INT_MAX;
906
907 dp = data;
908 ix = itable + *dp++;
909 while (ix->n == -1) {
910 ix = (const struct disasm_index *)ix->p + *dp++;
911 }
912
913 p = (const struct itemplate * const *)ix->p;
914 for (n = ix->n; n; n--, p++) {
915 if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
916 works = true;
917 /*
918 * Final check to make sure the types of r/m match up.
919 * XXX: Need to make sure this is actually correct.
920 */
921 for (i = 0; i < (*p)->operands; i++) {
922 if (!((*p)->opd[i] & SAME_AS) &&
923 (
924 /* If it's a mem-only EA but we have a
925 register, die. */
926 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
927 !(MEMORY & ~(*p)->opd[i])) ||
928 /* If it's a reg-only EA but we have a memory
929 ref, die. */
930 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
931 !(REG_EA & ~(*p)->opd[i]) &&
932 !((*p)->opd[i] & REG_SMASK)) ||
933 /* Register type mismatch (eg FS vs REG_DESS):
934 die. */
935 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
936 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
937 !whichreg((*p)->opd[i],
938 tmp_ins.oprs[i].basereg, tmp_ins.rex))
939 )) {
940 works = false;
941 break;
942 }
943 }
944
945 /*
946 * Note: we always prefer instructions which incorporate
947 * prefixes in the instructions themselves. This is to allow
948 * e.g. PAUSE to be preferred to REP NOP, and deal with
949 * MMX/SSE instructions where prefixes are used to select
950 * between MMX and SSE register sets or outright opcode
951 * selection.
952 */
953 if (works) {
954 int i, nprefix;
955 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
956 nprefix = 0;
957 for (i = 0; i < MAXPREFIX; i++)
958 if (tmp_ins.prefixes[i])
959 nprefix++;
960 if (nprefix < best_pref ||
961 (nprefix == best_pref && goodness < best)) {
962 /* This is the best one found so far */
963 best = goodness;
964 best_p = p;
965 best_pref = nprefix;
966 best_length = length;
967 ins = tmp_ins;
968 }
969 }
970 }
971 }
972
973 if (!best_p)
974 return 0; /* no instruction was matched */
975
976 /* Pick the best match */
977 p = best_p;
978 length = best_length;
979
980 slen = 0;
981
982 /* TODO: snprintf returns the value that the string would have if
983 * the buffer were long enough, and not the actual length of
984 * the returned string, so each instance of using the return
985 * value of snprintf should actually be checked to assure that
986 * the return value is "sane." Maybe a macro wrapper could
987 * be used for that purpose.
988 */
989 for (i = 0; i < MAXPREFIX; i++)
990 switch (ins.prefixes[i]) {
991 case P_LOCK:
992 slen += snprintf(output + slen, outbufsize - slen, "lock ");
993 break;
994 case P_REP:
995 slen += snprintf(output + slen, outbufsize - slen, "rep ");
996 break;
997 case P_REPE:
998 slen += snprintf(output + slen, outbufsize - slen, "repe ");
999 break;
1000 case P_REPNE:
1001 slen += snprintf(output + slen, outbufsize - slen, "repne ");
1002 break;
1003 case P_A16:
1004 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
1005 break;
1006 case P_A32:
1007 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
1008 break;
1009 case P_O16:
1010 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
1011 break;
1012 case P_O32:
1013 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
1014 break;
1015 default:
1016 break;
1017 }
1018
1019 for (i = 0; i < (int)elements(ico); i++)
1020 if ((*p)->opcode == ico[i]) {
1021 slen +=
1022 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
1023 whichcond(ins.condition));
1024 break;
1025 }
1026 if (i >= (int)elements(ico))
1027 slen +=
1028 snprintf(output + slen, outbufsize - slen, "%s",
1029 insn_names[(*p)->opcode]);
1030 colon = false;
1031 length += data - origdata; /* fix up for prefixes */
1032 for (i = 0; i < (*p)->operands; i++) {
1033 opflags_t t = (*p)->opd[i];
1034 const operand *o = &ins.oprs[i];
1035 int64_t offs;
1036
1037 if (t & SAME_AS) {
1038 o = &ins.oprs[t & ~SAME_AS];
1039 t = (*p)->opd[t & ~SAME_AS];
1040 }
1041
1042 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
1043
1044 offs = o->offset;
1045 if (o->segment & SEG_RELATIVE) {
1046 offs += offset + length;
1047 /*
1048 * sort out wraparound
1049 */
1050 if (!(o->segment & (SEG_32BIT|SEG_64BIT)))
1051 offs &= 0xffff;
1052 /*
1053 * add sync marker, if autosync is on
1054 */
1055 if (autosync)
1056 add_sync(offs, 0L);
1057 }
1058
1059 if (t & COLON)
1060 colon = true;
1061 else
1062 colon = false;
1063
1064 if ((t & (REGISTER | FPUREG)) ||
1065 (o->segment & SEG_RMREG)) {
1066 enum reg_enum reg;
1067 reg = whichreg(t, o->basereg, ins.rex);
1068 if (t & TO)
1069 slen += snprintf(output + slen, outbufsize - slen, "to ");
1070 slen += snprintf(output + slen, outbufsize - slen, "%s",
1071 reg_names[reg - EXPR_REG_START]);
1072 } else if (!(UNITY & ~t)) {
1073 output[slen++] = '1';
1074 } else if (t & IMMEDIATE) {
1075 if (t & BITS8) {
1076 slen +=
1077 snprintf(output + slen, outbufsize - slen, "byte ");
1078 if (o->segment & SEG_SIGNED) {
1079 if (offs < 0) {
1080 offs *= -1;
1081 output[slen++] = '-';
1082 } else
1083 output[slen++] = '+';
1084 }
1085 } else if (t & BITS16) {
1086 slen +=
1087 snprintf(output + slen, outbufsize - slen, "word ");
1088 } else if (t & BITS32) {
1089 slen +=
1090 snprintf(output + slen, outbufsize - slen, "dword ");
1091 } else if (t & BITS64) {
1092 slen +=
1093 snprintf(output + slen, outbufsize - slen, "qword ");
1094 } else if (t & NEAR) {
1095 slen +=
1096 snprintf(output + slen, outbufsize - slen, "near ");
1097 } else if (t & SHORT) {
1098 slen +=
1099 snprintf(output + slen, outbufsize - slen, "short ");
1100 }
1101 slen +=
1102 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
1103 offs);
1104 } else if (!(MEM_OFFS & ~t)) {
1105 slen +=
1106 snprintf(output + slen, outbufsize - slen,
1107 "[%s%s%s0x%"PRIx64"]",
1108 (segover ? segover : ""),
1109 (segover ? ":" : ""),
1110 (o->disp_size == 64 ? "qword " :
1111 o->disp_size == 32 ? "dword " :
1112 o->disp_size == 16 ? "word " : ""), offs);
1113 segover = NULL;
1114 } else if (!(REGMEM & ~t)) {
1115 int started = false;
1116 if (t & BITS8)
1117 slen +=
1118 snprintf(output + slen, outbufsize - slen, "byte ");
1119 if (t & BITS16)
1120 slen +=
1121 snprintf(output + slen, outbufsize - slen, "word ");
1122 if (t & BITS32)
1123 slen +=
1124 snprintf(output + slen, outbufsize - slen, "dword ");
1125 if (t & BITS64)
1126 slen +=
1127 snprintf(output + slen, outbufsize - slen, "qword ");
1128 if (t & BITS80)
1129 slen +=
1130 snprintf(output + slen, outbufsize - slen, "tword ");
1131 if (t & BITS128)
1132 slen +=
1133 snprintf(output + slen, outbufsize - slen, "oword ");
1134 if (t & FAR)
1135 slen += snprintf(output + slen, outbufsize - slen, "far ");
1136 if (t & NEAR)
1137 slen +=
1138 snprintf(output + slen, outbufsize - slen, "near ");
1139 output[slen++] = '[';
1140 if (o->disp_size)
1141 slen += snprintf(output + slen, outbufsize - slen, "%s",
1142 (o->disp_size == 64 ? "qword " :
1143 o->disp_size == 32 ? "dword " :
1144 o->disp_size == 16 ? "word " :
1145 ""));
1146 if (o->eaflags & EAF_REL)
1147 slen += snprintf(output + slen, outbufsize - slen, "rel ");
1148 if (segover) {
1149 slen +=
1150 snprintf(output + slen, outbufsize - slen, "%s:",
1151 segover);
1152 segover = NULL;
1153 }
1154 if (o->basereg != -1) {
1155 slen += snprintf(output + slen, outbufsize - slen, "%s",
1156 reg_names[(o->basereg -
1157 EXPR_REG_START)]);
1158 started = true;
1159 }
1160 if (o->indexreg != -1) {
1161 if (started)
1162 output[slen++] = '+';
1163 slen += snprintf(output + slen, outbufsize - slen, "%s",
1164 reg_names[(o->indexreg -
1165 EXPR_REG_START)]);
1166 if (o->scale > 1)
1167 slen +=
1168 snprintf(output + slen, outbufsize - slen, "*%d",
1169 o->scale);
1170 started = true;
1171 }
1172
1173
1174 if (o->segment & SEG_DISP8) {
1175 const char *prefix;
1176 uint8_t offset = offs;
1177 if ((int8_t)offset < 0) {
1178 prefix = "-";
1179 offset = -offset;
1180 } else {
1181 prefix = "+";
1182 }
1183 slen +=
1184 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
1185 prefix, offset);
1186 } else if (o->segment & SEG_DISP16) {
1187 const char *prefix;
1188 uint16_t offset = offs;
1189 if ((int16_t)offset < 0 && started) {
1190 offset = -offset;
1191 prefix = "-";
1192 } else {
1193 prefix = started ? "+" : "";
1194 }
1195 slen +=
1196 snprintf(output + slen, outbufsize - slen,
1197 "%s0x%"PRIx16"", prefix, offset);
1198 } else if (o->segment & SEG_DISP32) {
1199 if (prefix.asize == 64) {
1200 const char *prefix;
1201 uint64_t offset = (int64_t)(int32_t)offs;
1202 if ((int32_t)offs < 0 && started) {
1203 offset = -offset;
1204 prefix = "-";
1205 } else {
1206 prefix = started ? "+" : "";
1207 }
1208 slen +=
1209 snprintf(output + slen, outbufsize - slen,
1210 "%s0x%"PRIx64"", prefix, offset);
1211 } else {
1212 const char *prefix;
1213 uint32_t offset = offs;
1214 if ((int32_t) offset < 0 && started) {
1215 offset = -offset;
1216 prefix = "-";
1217 } else {
1218 prefix = started ? "+" : "";
1219 }
1220 slen +=
1221 snprintf(output + slen, outbufsize - slen,
1222 "%s0x%"PRIx32"", prefix, offset);
1223 }
1224 }
1225 output[slen++] = ']';
1226 } else {
1227 slen +=
1228 snprintf(output + slen, outbufsize - slen, "<operand%d>",
1229 i);
1230 }
1231 }
1232 output[slen] = '\0';
1233 if (segover) { /* unused segment override */
1234 char *p = output;
1235 int count = slen + 1;
1236 while (count--)
1237 p[count + 3] = p[count];
1238 strncpy(output, segover, 2);
1239 output[2] = ' ';
1240 }
1241 return length;
1242 }
1243
1244 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
1245 {
1246 snprintf(output, outbufsize, "db 0x%02X", *data);
1247 return 1;
1248 }
The Netwide Assembler