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Support binary and octal floating-point
[nasm.git] / disasm.c
blobdb4d517b306ded4583112351688730db3000c278
1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
2 *
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
7 *
8 * initial version 27/iii/95 by Simon Tatham
9 */
10
11 #include "compiler.h"
12
13 #include <stdio.h>
14 #include <string.h>
15 #include <limits.h>
16 #include <inttypes.h>
17
18 #include "nasm.h"
19 #include "disasm.h"
20 #include "sync.h"
21 #include "insns.h"
22
23 #include "names.c"
24
25 /*
26 * Flags that go into the `segment' field of `insn' structures
27 * during disassembly.
28 */
29 #define SEG_RELATIVE 1
30 #define SEG_32BIT 2
31 #define SEG_RMREG 4
32 #define SEG_DISP8 8
33 #define SEG_DISP16 16
34 #define SEG_DISP32 32
35 #define SEG_NODISP 64
36 #define SEG_SIGNED 128
37 #define SEG_64BIT 256
38
39 #include "regdis.c"
40
41 /*
42 * Prefix information
43 */
44 struct prefix_info {
45 uint8_t osize; /* Operand size */
46 uint8_t asize; /* Address size */
47 uint8_t osp; /* Operand size prefix present */
48 uint8_t asp; /* Address size prefix present */
49 uint8_t rep; /* Rep prefix present */
50 uint8_t seg; /* Segment override prefix present */
51 uint8_t lock; /* Lock prefix present */
52 uint8_t rex; /* Rex prefix present */
53 };
54
55 #define getu8(x) (*(uint8_t *)(x))
56 #if defined(__i386__) || defined(__x86_64__)
57 /* Littleendian CPU which can handle unaligned references */
58 #define getu16(x) (*(uint16_t *)(x))
59 #define getu32(x) (*(uint32_t *)(x))
60 #define getu64(x) (*(uint64_t *)(x))
61 #else
62 static uint16_t getu16(uint8_t *data)
63 {
64 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
65 }
66 static uint32_t getu32(uint8_t *data)
67 {
68 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
69 }
70 static uint64_t getu64(uint8_t *data)
71 {
72 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
73 }
74 #endif
75
76 #define gets8(x) ((int8_t)getu8(x))
77 #define gets16(x) ((int16_t)getu16(x))
78 #define gets32(x) ((int32_t)getu32(x))
79 #define gets64(x) ((int64_t)getu64(x))
80
81 /* Important: regval must already have been adjusted for rex extensions */
82 static enum reg_enum whichreg(int32_t regflags, int regval, int rex)
83 {
84 if (!(regflags & (REGISTER|REGMEM)))
85 return 0; /* Registers not permissible?! */
86
87 regflags |= REGISTER;
88
89 if (!(REG_AL & ~regflags))
90 return R_AL;
91 if (!(REG_AX & ~regflags))
92 return R_AX;
93 if (!(REG_EAX & ~regflags))
94 return R_EAX;
95 if (!(REG_RAX & ~regflags))
96 return R_RAX;
97 if (!(REG_DL & ~regflags))
98 return R_DL;
99 if (!(REG_DX & ~regflags))
100 return R_DX;
101 if (!(REG_EDX & ~regflags))
102 return R_EDX;
103 if (!(REG_RDX & ~regflags))
104 return R_RDX;
105 if (!(REG_CL & ~regflags))
106 return R_CL;
107 if (!(REG_CX & ~regflags))
108 return R_CX;
109 if (!(REG_ECX & ~regflags))
110 return R_ECX;
111 if (!(REG_RCX & ~regflags))
112 return R_RCX;
113 if (!(FPU0 & ~regflags))
114 return R_ST0;
115 if (!(REG_CS & ~regflags))
116 return (regval == 1) ? R_CS : 0;
117 if (!(REG_DESS & ~regflags))
118 return (regval == 0 || regval == 2
119 || regval == 3 ? rd_sreg[regval] : 0);
120 if (!(REG_FSGS & ~regflags))
121 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
122 if (!(REG_SEG67 & ~regflags))
123 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
124
125 /* All the entries below look up regval in an 16-entry array */
126 if (regval < 0 || regval > 15)
127 return 0;
128
129 if (!(REG8 & ~regflags)) {
130 if (rex & REX_P)
131 return rd_reg8_rex[regval];
132 else
133 return rd_reg8[regval];
134 }
135 if (!(REG16 & ~regflags))
136 return rd_reg16[regval];
137 if (!(REG32 & ~regflags))
138 return rd_reg32[regval];
139 if (!(REG64 & ~regflags))
140 return rd_reg64[regval];
141 if (!(REG_SREG & ~regflags))
142 return rd_sreg[regval & 7]; /* Ignore REX */
143 if (!(REG_CREG & ~regflags))
144 return rd_creg[regval];
145 if (!(REG_DREG & ~regflags))
146 return rd_dreg[regval];
147 if (!(REG_TREG & ~regflags)) {
148 if (rex & REX_P)
149 return 0; /* TR registers are ill-defined with rex */
150 return rd_treg[regval];
151 }
152 if (!(FPUREG & ~regflags))
153 return rd_fpureg[regval & 7]; /* Ignore REX */
154 if (!(MMXREG & ~regflags))
155 return rd_mmxreg[regval & 7]; /* Ignore REX */
156 if (!(XMMREG & ~regflags))
157 return rd_xmmreg[regval];
158
159 return 0;
160 }
161
162 static const char *whichcond(int condval)
163 {
164 static int conds[] = {
165 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
166 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
167 };
168 return conditions[conds[condval]];
169 }
170
171 /*
172 * Process a DREX suffix
173 */
174 static uint8_t *do_drex(uint8_t *data, insn *ins)
175 {
176 uint8_t drex = *data++;
177 operand *dst = &ins->oprs[ins->drexdst];
178
179 if ((drex & 8) != ((ins->rex & REX_OC) ? 8 : 0))
180 return NULL; /* OC0 mismatch */
181 ins->rex = (ins->rex & ~7) | (drex & 7);
182
183 dst->segment = SEG_RMREG;
184 dst->basereg = drex >> 4;
185 return data;
186 }
187
188
189 /*
190 * Process an effective address (ModRM) specification.
191 */
192 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
193 int segsize, operand * op, insn *ins)
194 {
195 int mod, rm, scale, index, base;
196 int rex;
197 uint8_t sib = 0;
198
199 mod = (modrm >> 6) & 03;
200 rm = modrm & 07;
201
202 if (mod != 3 && rm == 4 && asize != 16)
203 sib = *data++;
204
205 if (ins->rex & REX_D) {
206 data = do_drex(data, ins);
207 if (!data)
208 return NULL;
209 }
210 rex = ins->rex;
211
212 if (mod == 3) { /* pure register version */
213 op->basereg = rm+(rex & REX_B ? 8 : 0);
214 op->segment |= SEG_RMREG;
215 return data;
216 }
217
218 op->addr_size = 0;
219 op->eaflags = 0;
220
221 if (asize == 16) {
222 /*
223 * <mod> specifies the displacement size (none, byte or
224 * word), and <rm> specifies the register combination.
225 * Exception: mod=0,rm=6 does not specify [BP] as one might
226 * expect, but instead specifies [disp16].
227 */
228 op->indexreg = op->basereg = -1;
229 op->scale = 1; /* always, in 16 bits */
230 switch (rm) {
231 case 0:
232 op->basereg = R_BX;
233 op->indexreg = R_SI;
234 break;
235 case 1:
236 op->basereg = R_BX;
237 op->indexreg = R_DI;
238 break;
239 case 2:
240 op->basereg = R_BP;
241 op->indexreg = R_SI;
242 break;
243 case 3:
244 op->basereg = R_BP;
245 op->indexreg = R_DI;
246 break;
247 case 4:
248 op->basereg = R_SI;
249 break;
250 case 5:
251 op->basereg = R_DI;
252 break;
253 case 6:
254 op->basereg = R_BP;
255 break;
256 case 7:
257 op->basereg = R_BX;
258 break;
259 }
260 if (rm == 6 && mod == 0) { /* special case */
261 op->basereg = -1;
262 if (segsize != 16)
263 op->addr_size = 16;
264 mod = 2; /* fake disp16 */
265 }
266 switch (mod) {
267 case 0:
268 op->segment |= SEG_NODISP;
269 break;
270 case 1:
271 op->segment |= SEG_DISP8;
272 op->offset = (int8_t)*data++;
273 break;
274 case 2:
275 op->segment |= SEG_DISP16;
276 op->offset = *data++;
277 op->offset |= ((unsigned)*data++) << 8;
278 break;
279 }
280 return data;
281 } else {
282 /*
283 * Once again, <mod> specifies displacement size (this time
284 * none, byte or *dword*), while <rm> specifies the base
285 * register. Again, [EBP] is missing, replaced by a pure
286 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
287 * and RIP-relative addressing in 64-bit mode.
288 *
289 * However, rm=4
290 * indicates not a single base register, but instead the
291 * presence of a SIB byte...
292 */
293 int a64 = asize == 64;
294
295 op->indexreg = -1;
296
297 if (a64)
298 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
299 else
300 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
301
302 if (rm == 5 && mod == 0) {
303 if (segsize == 64) {
304 op->eaflags |= EAF_REL;
305 op->segment |= SEG_RELATIVE;
306 mod = 2; /* fake disp32 */
307 }
308
309 if (asize != 64)
310 op->addr_size = asize;
311
312 op->basereg = -1;
313 mod = 2; /* fake disp32 */
314 }
315
316 if (rm == 4) { /* process SIB */
317 scale = (sib >> 6) & 03;
318 index = (sib >> 3) & 07;
319 base = sib & 07;
320
321 op->scale = 1 << scale;
322
323 if (index == 4)
324 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
325 else if (a64)
326 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
327 else
328 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
329
330 if (base == 5 && mod == 0) {
331 op->basereg = -1;
332 mod = 2; /* Fake disp32 */
333 } else if (a64)
334 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
335 else
336 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
337
338 if (segsize != 32)
339 op->addr_size = 32;
340 }
341
342 switch (mod) {
343 case 0:
344 op->segment |= SEG_NODISP;
345 break;
346 case 1:
347 op->segment |= SEG_DISP8;
348 op->offset = gets8(data);
349 data++;
350 break;
351 case 2:
352 op->segment |= SEG_DISP32;
353 op->offset = getu32(data);
354 data += 4;
355 break;
356 }
357 return data;
358 }
359 }
360
361 /*
362 * Determine whether the instruction template in t corresponds to the data
363 * stream in data. Return the number of bytes matched if so.
364 */
365 static int matches(const struct itemplate *t, uint8_t *data,
366 const struct prefix_info *prefix, int segsize, insn *ins)
367 {
368 uint8_t *r = (uint8_t *)(t->code);
369 uint8_t *origdata = data;
370 bool a_used = false, o_used = false;
371 enum prefixes drep = 0;
372 uint8_t lock = prefix->lock;
373 int osize = prefix->osize;
374 int asize = prefix->asize;
375 int i;
376
377 for (i = 0; i < MAX_OPERANDS; i++) {
378 ins->oprs[i].segment = ins->oprs[i].addr_size =
379 (segsize == 64 ? SEG_64BIT : segsize == 32 ? SEG_32BIT : 0);
380 }
381 ins->condition = -1;
382 ins->rex = prefix->rex;
383
384 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
385 return false;
386
387 if (prefix->rep == 0xF2)
388 drep = P_REPNE;
389 else if (prefix->rep == 0xF3)
390 drep = P_REP;
391
392 while (*r) {
393 int c = *r++;
394
395 /* FIX: change this into a switch */
396 if (c >= 01 && c <= 03) {
397 while (c--)
398 if (*r++ != *data++)
399 return false;
400 } else if (c == 04) {
401 switch (*data++) {
402 case 0x07:
403 ins->oprs[0].basereg = 0;
404 break;
405 case 0x17:
406 ins->oprs[0].basereg = 2;
407 break;
408 case 0x1F:
409 ins->oprs[0].basereg = 3;
410 break;
411 default:
412 return false;
413 }
414 } else if (c == 05) {
415 switch (*data++) {
416 case 0xA1:
417 ins->oprs[0].basereg = 4;
418 break;
419 case 0xA9:
420 ins->oprs[0].basereg = 5;
421 break;
422 default:
423 return false;
424 }
425 } else if (c == 06) {
426 switch (*data++) {
427 case 0x06:
428 ins->oprs[0].basereg = 0;
429 break;
430 case 0x0E:
431 ins->oprs[0].basereg = 1;
432 break;
433 case 0x16:
434 ins->oprs[0].basereg = 2;
435 break;
436 case 0x1E:
437 ins->oprs[0].basereg = 3;
438 break;
439 default:
440 return false;
441 }
442 } else if (c == 07) {
443 switch (*data++) {
444 case 0xA0:
445 ins->oprs[0].basereg = 4;
446 break;
447 case 0xA8:
448 ins->oprs[0].basereg = 5;
449 break;
450 default:
451 return false;
452 }
453 } else if (c >= 010 && c <= 013) {
454 int t = *r++, d = *data++;
455 if (d < t || d > t + 7)
456 return false;
457 else {
458 ins->oprs[c - 010].basereg = (d-t)+
459 (ins->rex & REX_B ? 8 : 0);
460 ins->oprs[c - 010].segment |= SEG_RMREG;
461 }
462 } else if (c >= 014 && c <= 017) {
463 ins->oprs[c - 014].offset = (int8_t)*data++;
464 ins->oprs[c - 014].segment |= SEG_SIGNED;
465 } else if (c >= 020 && c <= 023) {
466 ins->oprs[c - 020].offset = *data++;
467 } else if (c >= 024 && c <= 027) {
468 ins->oprs[c - 024].offset = *data++;
469 } else if (c >= 030 && c <= 033) {
470 ins->oprs[c - 030].offset = getu16(data);
471 data += 2;
472 } else if (c >= 034 && c <= 037) {
473 if (osize == 32) {
474 ins->oprs[c - 034].offset = getu32(data);
475 data += 4;
476 } else {
477 ins->oprs[c - 034].offset = getu16(data);
478 data += 2;
479 }
480 if (segsize != asize)
481 ins->oprs[c - 034].addr_size = asize;
482 } else if (c >= 040 && c <= 043) {
483 ins->oprs[c - 040].offset = getu32(data);
484 data += 4;
485 } else if (c >= 044 && c <= 047) {
486 switch (asize) {
487 case 16:
488 ins->oprs[c - 044].offset = getu16(data);
489 data += 2;
490 break;
491 case 32:
492 ins->oprs[c - 044].offset = getu32(data);
493 data += 4;
494 break;
495 case 64:
496 ins->oprs[c - 044].offset = getu64(data);
497 data += 8;
498 break;
499 }
500 if (segsize != asize)
501 ins->oprs[c - 044].addr_size = asize;
502 } else if (c >= 050 && c <= 053) {
503 ins->oprs[c - 050].offset = gets8(data++);
504 ins->oprs[c - 050].segment |= SEG_RELATIVE;
505 } else if (c >= 054 && c <= 057) {
506 ins->oprs[c - 054].offset = getu64(data);
507 data += 8;
508 } else if (c >= 060 && c <= 063) {
509 ins->oprs[c - 060].offset = gets16(data);
510 data += 2;
511 ins->oprs[c - 060].segment |= SEG_RELATIVE;
512 ins->oprs[c - 060].segment &= ~SEG_32BIT;
513 } else if (c >= 064 && c <= 067) {
514 if (osize == 16) {
515 ins->oprs[c - 064].offset = getu16(data);
516 data += 2;
517 ins->oprs[c - 064].segment &= ~(SEG_32BIT|SEG_64BIT);
518 } else if (osize == 32) {
519 ins->oprs[c - 064].offset = getu32(data);
520 data += 4;
521 ins->oprs[c - 064].segment &= ~SEG_64BIT;
522 ins->oprs[c - 064].segment |= SEG_32BIT;
523 }
524 if (segsize != osize) {
525 ins->oprs[c - 064].type =
526 (ins->oprs[c - 064].type & ~SIZE_MASK)
527 | ((osize == 16) ? BITS16 : BITS32);
528 }
529 } else if (c >= 070 && c <= 073) {
530 ins->oprs[c - 070].offset = getu32(data);
531 data += 4;
532 ins->oprs[c - 070].segment |= SEG_32BIT | SEG_RELATIVE;
533 } else if (c >= 0100 && c < 0140) {
534 int modrm = *data++;
535 ins->oprs[c & 07].segment |= SEG_RMREG;
536 data = do_ea(data, modrm, asize, segsize,
537 &ins->oprs[(c >> 3) & 07], ins);
538 if (!data)
539 return false;
540 ins->oprs[c & 07].basereg = ((modrm >> 3)&7)+
541 (ins->rex & REX_R ? 8 : 0);
542 } else if (c >= 0140 && c <= 0143) {
543 ins->oprs[c - 0140].offset = getu16(data);
544 data += 2;
545 } else if (c >= 0150 && c <= 0153) {
546 ins->oprs[c - 0150].offset = getu32(data);
547 data += 4;
548 } else if (c >= 0160 && c <= 0167) {
549 ins->rex |= (c & 4) ? REX_D|REX_OC : REX_D;
550 ins->drexdst = c & 3;
551 } else if (c == 0170) {
552 if (*data++)
553 return false;
554 } else if (c == 0171) {
555 data = do_drex(data, ins);
556 if (!data)
557 return false;
558 } else if (c >= 0200 && c <= 0277) {
559 int modrm = *data++;
560 if (((modrm >> 3) & 07) != (c & 07))
561 return false; /* spare field doesn't match up */
562 data = do_ea(data, modrm, asize, segsize,
563 &ins->oprs[(c >> 3) & 07], ins);
564 if (!data)
565 return false;
566 } else if (c == 0310) {
567 if (asize != 16)
568 return false;
569 else
570 a_used = true;
571 } else if (c == 0311) {
572 if (asize == 16)
573 return false;
574 else
575 a_used = true;
576 } else if (c == 0312) {
577 if (asize != segsize)
578 return false;
579 else
580 a_used = true;
581 } else if (c == 0313) {
582 if (asize != 64)
583 return false;
584 else
585 a_used = true;
586 } else if (c == 0320) {
587 if (osize != 16)
588 return false;
589 else
590 o_used = true;
591 } else if (c == 0321) {
592 if (osize != 32)
593 return false;
594 else
595 o_used = true;
596 } else if (c == 0322) {
597 if (osize != (segsize == 16) ? 16 : 32)
598 return false;
599 else
600 o_used = true;
601 } else if (c == 0323) {
602 ins->rex |= REX_W; /* 64-bit only instruction */
603 osize = 64;
604 } else if (c == 0324) {
605 if (!(ins->rex & (REX_P|REX_W)) || osize != 64)
606 return false;
607 } else if (c == 0330) {
608 int t = *r++, d = *data++;
609 if (d < t || d > t + 15)
610 return false;
611 else
612 ins->condition = d - t;
613 } else if (c == 0331) {
614 if (prefix->rep)
615 return false;
616 } else if (c == 0332) {
617 if (prefix->rep != 0xF2)
618 return false;
619 } else if (c == 0333) {
620 if (prefix->rep != 0xF3)
621 return false;
622 drep = 0;
623 } else if (c == 0334) {
624 if (lock) {
625 ins->rex |= REX_R;
626 lock = 0;
627 }
628 } else if (c == 0335) {
629 if (drep == P_REP)
630 drep = P_REPE;
631 } else if (c == 0364) {
632 if (prefix->osp)
633 return false;
634 } else if (c == 0365) {
635 if (prefix->asp)
636 return false;
637 } else if (c == 0366) {
638 if (!prefix->osp)
639 return false;
640 o_used = true;
641 } else if (c == 0367) {
642 if (!prefix->asp)
643 return false;
644 o_used = true;
645 }
646 }
647
648 /* REX cannot be combined with DREX */
649 if ((ins->rex & REX_D) && (prefix->rex))
650 return false;
651
652 /*
653 * Check for unused rep or a/o prefixes.
654 */
655 for (i = 0; i < t->operands; i++) {
656 if (ins->oprs[i].segment != SEG_RMREG)
657 a_used = true;
658 }
659
660 ins->nprefix = 0;
661 if (lock)
662 ins->prefixes[ins->nprefix++] = P_LOCK;
663 if (drep)
664 ins->prefixes[ins->nprefix++] = drep;
665 if (!a_used && asize != segsize)
666 ins->prefixes[ins->nprefix++] = asize == 16 ? P_A16 : P_A32;
667 if (!o_used && osize == ((segsize == 16) ? 32 : 16))
668 ins->prefixes[ins->nprefix++] = osize == 16 ? P_O16 : P_O32;
669
670 /* Fix: check for redundant REX prefixes */
671
672 return data - origdata;
673 }
674
675 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
676 int32_t offset, int autosync, uint32_t prefer)
677 {
678 const struct itemplate * const *p, * const *best_p;
679 const struct disasm_index *ix;
680 uint8_t *dp;
681 int length, best_length = 0;
682 char *segover;
683 int i, slen, colon, n;
684 uint8_t *origdata;
685 int works;
686 insn tmp_ins, ins;
687 uint32_t goodness, best;
688 int best_pref;
689 struct prefix_info prefix;
690
691 memset(&ins, 0, sizeof ins);
692
693 /*
694 * Scan for prefixes.
695 */
696 memset(&prefix, 0, sizeof prefix);
697 prefix.asize = segsize;
698 prefix.osize = (segsize == 64) ? 32 : segsize;
699 segover = NULL;
700 origdata = data;
701 for (;;) {
702 if (*data == 0xF3 || *data == 0xF2)
703 prefix.rep = *data++;
704 else if (*data == 0xF0)
705 prefix.lock = *data++;
706 else if (*data == 0x2E)
707 segover = "cs", prefix.seg = *data++;
708 else if (*data == 0x36)
709 segover = "ss", prefix.seg = *data++;
710 else if (*data == 0x3E)
711 segover = "ds", prefix.seg = *data++;
712 else if (*data == 0x26)
713 segover = "es", prefix.seg = *data++;
714 else if (*data == 0x64)
715 segover = "fs", prefix.seg = *data++;
716 else if (*data == 0x65)
717 segover = "gs", prefix.seg = *data++;
718 else if (*data == 0x66) {
719 prefix.osize = (segsize == 16) ? 32 : 16;
720 prefix.osp = *data++;
721 } else if (*data == 0x67) {
722 prefix.asize = (segsize == 32) ? 16 : 32;
723 prefix.asp = *data++;
724 } else if (segsize == 64 && (*data & 0xf0) == REX_P) {
725 prefix.rex = *data++;
726 if (prefix.rex & REX_W)
727 prefix.osize = 64;
728 break; /* REX is always the last prefix */
729 } else {
730 break;
731 }
732 }
733
734 best = -1; /* Worst possible */
735 best_p = NULL;
736 best_pref = INT_MAX;
737
738 dp = data;
739 ix = itable + *dp++;
740 while (ix->n == -1) {
741 ix = (const struct disasm_index *)ix->p + *dp++;
742 }
743
744 p = (const struct itemplate * const *)ix->p;
745 for (n = ix->n; n; n--, p++) {
746 if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
747 works = true;
748 /*
749 * Final check to make sure the types of r/m match up.
750 * XXX: Need to make sure this is actually correct.
751 */
752 for (i = 0; i < (*p)->operands; i++) {
753 if (!((*p)->opd[i] & SAME_AS) &&
754 (
755 /* If it's a mem-only EA but we have a register, die. */
756 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
757 !(MEMORY & ~(*p)->opd[i])) ||
758 /* If it's a reg-only EA but we have a memory ref, die. */
759 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
760 !(REG_EA & ~(*p)->opd[i]) &&
761 !((*p)->opd[i] & REG_SMASK)) ||
762 /* Register type mismatch (eg FS vs REG_DESS): die. */
763 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
764 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
765 !whichreg((*p)->opd[i],
766 tmp_ins.oprs[i].basereg, tmp_ins.rex))
767 )) {
768 works = false;
769 break;
770 }
771 }
772
773 /*
774 * Note: we always prefer instructions which incorporate
775 * prefixes in the instructions themselves. This is to allow
776 * e.g. PAUSE to be preferred to REP NOP, and deal with
777 * MMX/SSE instructions where prefixes are used to select
778 * between MMX and SSE register sets or outright opcode
779 * selection.
780 */
781 if (works) {
782 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
783 if (tmp_ins.nprefix < best_pref ||
784 (tmp_ins.nprefix == best_pref && goodness < best)) {
785 /* This is the best one found so far */
786 best = goodness;
787 best_p = p;
788 best_pref = tmp_ins.nprefix;
789 best_length = length;
790 ins = tmp_ins;
791 }
792 }
793 }
794 }
795
796 if (!best_p)
797 return 0; /* no instruction was matched */
798
799 /* Pick the best match */
800 p = best_p;
801 length = best_length;
802
803 slen = 0;
804
805 /* TODO: snprintf returns the value that the string would have if
806 * the buffer were long enough, and not the actual length of
807 * the returned string, so each instance of using the return
808 * value of snprintf should actually be checked to assure that
809 * the return value is "sane." Maybe a macro wrapper could
810 * be used for that purpose.
811 */
812 for (i = 0; i < ins.nprefix; i++)
813 switch (ins.prefixes[i]) {
814 case P_LOCK:
815 slen += snprintf(output + slen, outbufsize - slen, "lock ");
816 break;
817 case P_REP:
818 slen += snprintf(output + slen, outbufsize - slen, "rep ");
819 break;
820 case P_REPE:
821 slen += snprintf(output + slen, outbufsize - slen, "repe ");
822 break;
823 case P_REPNE:
824 slen += snprintf(output + slen, outbufsize - slen, "repne ");
825 break;
826 case P_A16:
827 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
828 break;
829 case P_A32:
830 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
831 break;
832 case P_O16:
833 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
834 break;
835 case P_O32:
836 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
837 break;
838 default:
839 break;
840 }
841
842 for (i = 0; i < (int)elements(ico); i++)
843 if ((*p)->opcode == ico[i]) {
844 slen +=
845 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
846 whichcond(ins.condition));
847 break;
848 }
849 if (i >= (int)elements(ico))
850 slen +=
851 snprintf(output + slen, outbufsize - slen, "%s",
852 insn_names[(*p)->opcode]);
853 colon = false;
854 length += data - origdata; /* fix up for prefixes */
855 for (i = 0; i < (*p)->operands; i++) {
856 opflags_t t = (*p)->opd[i];
857 const operand *o = &ins.oprs[i];
858 int64_t offs;
859
860 if (t & SAME_AS) {
861 o = &ins.oprs[t & ~SAME_AS];
862 t = (*p)->opd[t & ~SAME_AS];
863 }
864
865 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
866
867 offs = o->offset;
868 if (o->segment & SEG_RELATIVE) {
869 offs += offset + length;
870 /*
871 * sort out wraparound
872 */
873 if (!(o->segment & (SEG_32BIT|SEG_64BIT)))
874 offs &= 0xffff;
875 /*
876 * add sync marker, if autosync is on
877 */
878 if (autosync)
879 add_sync(offs, 0L);
880 }
881
882 if (t & COLON)
883 colon = true;
884 else
885 colon = false;
886
887 if ((t & (REGISTER | FPUREG)) ||
888 (o->segment & SEG_RMREG)) {
889 enum reg_enum reg;
890 reg = whichreg(t, o->basereg, ins.rex);
891 if (t & TO)
892 slen += snprintf(output + slen, outbufsize - slen, "to ");
893 slen += snprintf(output + slen, outbufsize - slen, "%s",
894 reg_names[reg - EXPR_REG_START]);
895 } else if (!(UNITY & ~t)) {
896 output[slen++] = '1';
897 } else if (t & IMMEDIATE) {
898 if (t & BITS8) {
899 slen +=
900 snprintf(output + slen, outbufsize - slen, "byte ");
901 if (o->segment & SEG_SIGNED) {
902 if (offs < 0) {
903 offs *= -1;
904 output[slen++] = '-';
905 } else
906 output[slen++] = '+';
907 }
908 } else if (t & BITS16) {
909 slen +=
910 snprintf(output + slen, outbufsize - slen, "word ");
911 } else if (t & BITS32) {
912 slen +=
913 snprintf(output + slen, outbufsize - slen, "dword ");
914 } else if (t & BITS64) {
915 slen +=
916 snprintf(output + slen, outbufsize - slen, "qword ");
917 } else if (t & NEAR) {
918 slen +=
919 snprintf(output + slen, outbufsize - slen, "near ");
920 } else if (t & SHORT) {
921 slen +=
922 snprintf(output + slen, outbufsize - slen, "short ");
923 }
924 slen +=
925 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
926 offs);
927 } else if (!(MEM_OFFS & ~t)) {
928 slen +=
929 snprintf(output + slen, outbufsize - slen, "[%s%s%s0x%"PRIx64"]",
930 (segover ? segover : ""),
931 (segover ? ":" : ""),
932 (o->addr_size ==
933 32 ? "dword " : o->addr_size ==
934 16 ? "word " : ""), offs);
935 segover = NULL;
936 } else if (!(REGMEM & ~t)) {
937 int started = false;
938 if (t & BITS8)
939 slen +=
940 snprintf(output + slen, outbufsize - slen, "byte ");
941 if (t & BITS16)
942 slen +=
943 snprintf(output + slen, outbufsize - slen, "word ");
944 if (t & BITS32)
945 slen +=
946 snprintf(output + slen, outbufsize - slen, "dword ");
947 if (t & BITS64)
948 slen +=
949 snprintf(output + slen, outbufsize - slen, "qword ");
950 if (t & BITS80)
951 slen +=
952 snprintf(output + slen, outbufsize - slen, "tword ");
953 if (t & FAR)
954 slen += snprintf(output + slen, outbufsize - slen, "far ");
955 if (t & NEAR)
956 slen +=
957 snprintf(output + slen, outbufsize - slen, "near ");
958 output[slen++] = '[';
959 if (o->addr_size)
960 slen += snprintf(output + slen, outbufsize - slen, "%s",
961 (o->addr_size == 64 ? "qword " :
962 o->addr_size == 32 ? "dword " :
963 o->addr_size == 16 ? "word " :
964 ""));
965 if (o->eaflags & EAF_REL)
966 slen += snprintf(output + slen, outbufsize - slen, "rel ");
967 if (segover) {
968 slen +=
969 snprintf(output + slen, outbufsize - slen, "%s:",
970 segover);
971 segover = NULL;
972 }
973 if (o->basereg != -1) {
974 slen += snprintf(output + slen, outbufsize - slen, "%s",
975 reg_names[(o->basereg -
976 EXPR_REG_START)]);
977 started = true;
978 }
979 if (o->indexreg != -1) {
980 if (started)
981 output[slen++] = '+';
982 slen += snprintf(output + slen, outbufsize - slen, "%s",
983 reg_names[(o->indexreg -
984 EXPR_REG_START)]);
985 if (o->scale > 1)
986 slen +=
987 snprintf(output + slen, outbufsize - slen, "*%d",
988 o->scale);
989 started = true;
990 }
991 if (o->segment & SEG_DISP8) {
992 int minus = 0;
993 int8_t offset = offs;
994 if (offset < 0) {
995 minus = 1;
996 offset = -offset;
997 }
998 slen +=
999 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
1000 minus ? "-" : "+", offset);
1001 } else if (o->segment & SEG_DISP16) {
1002 int minus = 0;
1003 int16_t offset = offs;
1004 if (offset < 0) {
1005 minus = 1;
1006 offset = -offset;
1007 }
1008 slen +=
1009 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx16"",
1010 minus ? "-" : started ? "+" : "", offset);
1011 } else if (o->segment & SEG_DISP32) {
1012 char *prefix = "";
1013 int32_t offset = offs;
1014 if (offset < 0) {
1015 offset = -offset;
1016 prefix = "-";
1017 } else {
1018 prefix = started ? "+" : "";
1019 }
1020 slen +=
1021 snprintf(output + slen, outbufsize - slen,
1022 "%s0x%"PRIx32"", prefix, offset);
1023 }
1024 output[slen++] = ']';
1025 } else {
1026 slen +=
1027 snprintf(output + slen, outbufsize - slen, "<operand%d>",
1028 i);
1029 }
1030 }
1031 output[slen] = '\0';
1032 if (segover) { /* unused segment override */
1033 char *p = output;
1034 int count = slen + 1;
1035 while (count--)
1036 p[count + 3] = p[count];
1037 strncpy(output, segover, 2);
1038 output[2] = ' ';
1039 }
1040 return length;
1041 }
1042
1043 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
1044 {
1045 snprintf(output, outbufsize, "db 0x%02X", *data);
1046 return 1;
1047 }
The Netwide Assembler