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NASM 0.99.06
[nasm.git] / disasm.c
blobf89114d5bd2023eeceebff1ac72da2a9d305e612
1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
2 *
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
7 *
8 * initial version 27/iii/95 by Simon Tatham
9 */
10
11 #include "compiler.h"
12
13 #include <stdio.h>
14 #include <string.h>
15 #include <limits.h>
16 #include <inttypes.h>
17
18 #include "nasm.h"
19 #include "disasm.h"
20 #include "sync.h"
21 #include "insns.h"
22
23 #include "names.c"
24
25 /*
26 * Flags that go into the `segment' field of `insn' structures
27 * during disassembly.
28 */
29 #define SEG_RELATIVE 1
30 #define SEG_32BIT 2
31 #define SEG_RMREG 4
32 #define SEG_DISP8 8
33 #define SEG_DISP16 16
34 #define SEG_DISP32 32
35 #define SEG_NODISP 64
36 #define SEG_SIGNED 128
37 #define SEG_64BIT 256
38
39 #include "regdis.c"
40
41 /*
42 * Prefix information
43 */
44 struct prefix_info {
45 uint8_t osize; /* Operand size */
46 uint8_t asize; /* Address size */
47 uint8_t osp; /* Operand size prefix present */
48 uint8_t asp; /* Address size prefix present */
49 uint8_t rep; /* Rep prefix present */
50 uint8_t seg; /* Segment override prefix present */
51 uint8_t lock; /* Lock prefix present */
52 uint8_t rex; /* Rex prefix present */
53 };
54
55 #define getu8(x) (*(uint8_t *)(x))
56 #if defined(__i386__) || defined(__x86_64__)
57 /* Littleendian CPU which can handle unaligned references */
58 #define getu16(x) (*(uint16_t *)(x))
59 #define getu32(x) (*(uint32_t *)(x))
60 #define getu64(x) (*(uint64_t *)(x))
61 #else
62 static uint16_t getu16(uint8_t *data)
63 {
64 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
65 }
66 static uint32_t getu32(uint8_t *data)
67 {
68 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
69 }
70 static uint64_t getu64(uint8_t *data)
71 {
72 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
73 }
74 #endif
75
76 #define gets8(x) ((int8_t)getu8(x))
77 #define gets16(x) ((int16_t)getu16(x))
78 #define gets32(x) ((int32_t)getu32(x))
79 #define gets64(x) ((int64_t)getu64(x))
80
81 /* Important: regval must already have been adjusted for rex extensions */
82 static enum reg_enum whichreg(int32_t regflags, int regval, int rex)
83 {
84 if (!(regflags & (REGISTER|REGMEM)))
85 return 0; /* Registers not permissible?! */
86
87 regflags |= REGISTER;
88
89 if (!(REG_AL & ~regflags))
90 return R_AL;
91 if (!(REG_AX & ~regflags))
92 return R_AX;
93 if (!(REG_EAX & ~regflags))
94 return R_EAX;
95 if (!(REG_RAX & ~regflags))
96 return R_RAX;
97 if (!(REG_DL & ~regflags))
98 return R_DL;
99 if (!(REG_DX & ~regflags))
100 return R_DX;
101 if (!(REG_EDX & ~regflags))
102 return R_EDX;
103 if (!(REG_RDX & ~regflags))
104 return R_RDX;
105 if (!(REG_CL & ~regflags))
106 return R_CL;
107 if (!(REG_CX & ~regflags))
108 return R_CX;
109 if (!(REG_ECX & ~regflags))
110 return R_ECX;
111 if (!(REG_RCX & ~regflags))
112 return R_RCX;
113 if (!(FPU0 & ~regflags))
114 return R_ST0;
115 if (!(REG_CS & ~regflags))
116 return (regval == 1) ? R_CS : 0;
117 if (!(REG_DESS & ~regflags))
118 return (regval == 0 || regval == 2
119 || regval == 3 ? rd_sreg[regval] : 0);
120 if (!(REG_FSGS & ~regflags))
121 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
122 if (!(REG_SEG67 & ~regflags))
123 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
124
125 /* All the entries below look up regval in an 16-entry array */
126 if (regval < 0 || regval > 15)
127 return 0;
128
129 if (!(REG8 & ~regflags)) {
130 if (rex & REX_P)
131 return rd_reg8_rex[regval];
132 else
133 return rd_reg8[regval];
134 }
135 if (!(REG16 & ~regflags))
136 return rd_reg16[regval];
137 if (!(REG32 & ~regflags))
138 return rd_reg32[regval];
139 if (!(REG64 & ~regflags))
140 return rd_reg64[regval];
141 if (!(REG_SREG & ~regflags))
142 return rd_sreg[regval & 7]; /* Ignore REX */
143 if (!(REG_CREG & ~regflags))
144 return rd_creg[regval];
145 if (!(REG_DREG & ~regflags))
146 return rd_dreg[regval];
147 if (!(REG_TREG & ~regflags)) {
148 if (rex & REX_P)
149 return 0; /* TR registers are ill-defined with rex */
150 return rd_treg[regval];
151 }
152 if (!(FPUREG & ~regflags))
153 return rd_fpureg[regval & 7]; /* Ignore REX */
154 if (!(MMXREG & ~regflags))
155 return rd_mmxreg[regval & 7]; /* Ignore REX */
156 if (!(XMMREG & ~regflags))
157 return rd_xmmreg[regval];
158
159 return 0;
160 }
161
162 static const char *whichcond(int condval)
163 {
164 static int conds[] = {
165 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
166 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
167 };
168 return conditions[conds[condval]];
169 }
170
171 /*
172 * Process a DREX suffix
173 */
174 static uint8_t *do_drex(uint8_t *data, insn *ins)
175 {
176 uint8_t drex = *data++;
177 operand *dst = &ins->oprs[ins->drexdst];
178
179 if ((drex & 8) != ((ins->rex & REX_OC) ? 8 : 0))
180 return NULL; /* OC0 mismatch */
181 ins->rex = (ins->rex & ~7) | (drex & 7);
182
183 dst->segment = SEG_RMREG;
184 dst->basereg = drex >> 4;
185 return data;
186 }
187
188
189 /*
190 * Process an effective address (ModRM) specification.
191 */
192 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
193 int segsize, operand * op, insn *ins)
194 {
195 int mod, rm, scale, index, base;
196 int rex;
197 uint8_t sib = 0;
198
199 mod = (modrm >> 6) & 03;
200 rm = modrm & 07;
201
202 if (mod != 3 && rm == 4 && asize != 16)
203 sib = *data++;
204
205 if (ins->rex & REX_D) {
206 data = do_drex(data, ins);
207 if (!data)
208 return NULL;
209 }
210 rex = ins->rex;
211
212 if (mod == 3) { /* pure register version */
213 op->basereg = rm+(rex & REX_B ? 8 : 0);
214 op->segment |= SEG_RMREG;
215 return data;
216 }
217
218 op->disp_size = 0;
219 op->eaflags = 0;
220
221 if (asize == 16) {
222 /*
223 * <mod> specifies the displacement size (none, byte or
224 * word), and <rm> specifies the register combination.
225 * Exception: mod=0,rm=6 does not specify [BP] as one might
226 * expect, but instead specifies [disp16].
227 */
228 op->indexreg = op->basereg = -1;
229 op->scale = 1; /* always, in 16 bits */
230 switch (rm) {
231 case 0:
232 op->basereg = R_BX;
233 op->indexreg = R_SI;
234 break;
235 case 1:
236 op->basereg = R_BX;
237 op->indexreg = R_DI;
238 break;
239 case 2:
240 op->basereg = R_BP;
241 op->indexreg = R_SI;
242 break;
243 case 3:
244 op->basereg = R_BP;
245 op->indexreg = R_DI;
246 break;
247 case 4:
248 op->basereg = R_SI;
249 break;
250 case 5:
251 op->basereg = R_DI;
252 break;
253 case 6:
254 op->basereg = R_BP;
255 break;
256 case 7:
257 op->basereg = R_BX;
258 break;
259 }
260 if (rm == 6 && mod == 0) { /* special case */
261 op->basereg = -1;
262 if (segsize != 16)
263 op->disp_size = 16;
264 mod = 2; /* fake disp16 */
265 }
266 switch (mod) {
267 case 0:
268 op->segment |= SEG_NODISP;
269 break;
270 case 1:
271 op->segment |= SEG_DISP8;
272 op->offset = (int8_t)*data++;
273 break;
274 case 2:
275 op->segment |= SEG_DISP16;
276 op->offset = *data++;
277 op->offset |= ((unsigned)*data++) << 8;
278 break;
279 }
280 return data;
281 } else {
282 /*
283 * Once again, <mod> specifies displacement size (this time
284 * none, byte or *dword*), while <rm> specifies the base
285 * register. Again, [EBP] is missing, replaced by a pure
286 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
287 * and RIP-relative addressing in 64-bit mode.
288 *
289 * However, rm=4
290 * indicates not a single base register, but instead the
291 * presence of a SIB byte...
292 */
293 int a64 = asize == 64;
294
295 op->indexreg = -1;
296
297 if (a64)
298 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
299 else
300 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
301
302 if (rm == 5 && mod == 0) {
303 if (segsize == 64) {
304 op->eaflags |= EAF_REL;
305 op->segment |= SEG_RELATIVE;
306 mod = 2; /* fake disp32 */
307 }
308
309 if (asize != 64)
310 op->disp_size = asize;
311
312 op->basereg = -1;
313 mod = 2; /* fake disp32 */
314 }
315
316 if (rm == 4) { /* process SIB */
317 scale = (sib >> 6) & 03;
318 index = (sib >> 3) & 07;
319 base = sib & 07;
320
321 op->scale = 1 << scale;
322
323 if (index == 4)
324 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
325 else if (a64)
326 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
327 else
328 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
329
330 if (base == 5 && mod == 0) {
331 op->basereg = -1;
332 mod = 2; /* Fake disp32 */
333 } else if (a64)
334 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
335 else
336 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
337
338 if (segsize != 32)
339 op->disp_size = 32;
340 }
341
342 switch (mod) {
343 case 0:
344 op->segment |= SEG_NODISP;
345 break;
346 case 1:
347 op->segment |= SEG_DISP8;
348 op->offset = gets8(data);
349 data++;
350 break;
351 case 2:
352 op->segment |= SEG_DISP32;
353 op->offset = getu32(data);
354 data += 4;
355 break;
356 }
357 return data;
358 }
359 }
360
361 /*
362 * Determine whether the instruction template in t corresponds to the data
363 * stream in data. Return the number of bytes matched if so.
364 */
365 static int matches(const struct itemplate *t, uint8_t *data,
366 const struct prefix_info *prefix, int segsize, insn *ins)
367 {
368 uint8_t *r = (uint8_t *)(t->code);
369 uint8_t *origdata = data;
370 bool a_used = false, o_used = false;
371 enum prefixes drep = 0;
372 uint8_t lock = prefix->lock;
373 int osize = prefix->osize;
374 int asize = prefix->asize;
375 int i;
376
377 for (i = 0; i < MAX_OPERANDS; i++) {
378 ins->oprs[i].segment = ins->oprs[i].disp_size =
379 (segsize == 64 ? SEG_64BIT : segsize == 32 ? SEG_32BIT : 0);
380 }
381 ins->condition = -1;
382 ins->rex = prefix->rex;
383
384 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
385 return false;
386
387 if (prefix->rep == 0xF2)
388 drep = P_REPNE;
389 else if (prefix->rep == 0xF3)
390 drep = P_REP;
391
392 while (*r) {
393 int c = *r++;
394
395 /* FIX: change this into a switch */
396 if (c >= 01 && c <= 03) {
397 while (c--)
398 if (*r++ != *data++)
399 return false;
400 } else if (c == 04) {
401 switch (*data++) {
402 case 0x07:
403 ins->oprs[0].basereg = 0;
404 break;
405 case 0x17:
406 ins->oprs[0].basereg = 2;
407 break;
408 case 0x1F:
409 ins->oprs[0].basereg = 3;
410 break;
411 default:
412 return false;
413 }
414 } else if (c == 05) {
415 switch (*data++) {
416 case 0xA1:
417 ins->oprs[0].basereg = 4;
418 break;
419 case 0xA9:
420 ins->oprs[0].basereg = 5;
421 break;
422 default:
423 return false;
424 }
425 } else if (c == 06) {
426 switch (*data++) {
427 case 0x06:
428 ins->oprs[0].basereg = 0;
429 break;
430 case 0x0E:
431 ins->oprs[0].basereg = 1;
432 break;
433 case 0x16:
434 ins->oprs[0].basereg = 2;
435 break;
436 case 0x1E:
437 ins->oprs[0].basereg = 3;
438 break;
439 default:
440 return false;
441 }
442 } else if (c == 07) {
443 switch (*data++) {
444 case 0xA0:
445 ins->oprs[0].basereg = 4;
446 break;
447 case 0xA8:
448 ins->oprs[0].basereg = 5;
449 break;
450 default:
451 return false;
452 }
453 } else if (c >= 010 && c <= 013) {
454 int t = *r++, d = *data++;
455 if (d < t || d > t + 7)
456 return false;
457 else {
458 ins->oprs[c - 010].basereg = (d-t)+
459 (ins->rex & REX_B ? 8 : 0);
460 ins->oprs[c - 010].segment |= SEG_RMREG;
461 }
462 } else if (c >= 014 && c <= 017) {
463 ins->oprs[c - 014].offset = (int8_t)*data++;
464 ins->oprs[c - 014].segment |= SEG_SIGNED;
465 } else if (c >= 020 && c <= 023) {
466 ins->oprs[c - 020].offset = *data++;
467 } else if (c >= 024 && c <= 027) {
468 ins->oprs[c - 024].offset = *data++;
469 } else if (c >= 030 && c <= 033) {
470 ins->oprs[c - 030].offset = getu16(data);
471 data += 2;
472 } else if (c >= 034 && c <= 037) {
473 if (osize == 32) {
474 ins->oprs[c - 034].offset = getu32(data);
475 data += 4;
476 } else {
477 ins->oprs[c - 034].offset = getu16(data);
478 data += 2;
479 }
480 if (segsize != asize)
481 ins->oprs[c - 034].disp_size = asize;
482 } else if (c >= 040 && c <= 043) {
483 ins->oprs[c - 040].offset = getu32(data);
484 data += 4;
485 } else if (c >= 044 && c <= 047) {
486 switch (asize) {
487 case 16:
488 ins->oprs[c - 044].offset = getu16(data);
489 data += 2;
490 break;
491 case 32:
492 ins->oprs[c - 044].offset = getu32(data);
493 data += 4;
494 break;
495 case 64:
496 ins->oprs[c - 044].offset = getu64(data);
497 data += 8;
498 break;
499 }
500 if (segsize != asize)
501 ins->oprs[c - 044].disp_size = asize;
502 } else if (c >= 050 && c <= 053) {
503 ins->oprs[c - 050].offset = gets8(data++);
504 ins->oprs[c - 050].segment |= SEG_RELATIVE;
505 } else if (c >= 054 && c <= 057) {
506 ins->oprs[c - 054].offset = getu64(data);
507 data += 8;
508 } else if (c >= 060 && c <= 063) {
509 ins->oprs[c - 060].offset = gets16(data);
510 data += 2;
511 ins->oprs[c - 060].segment |= SEG_RELATIVE;
512 ins->oprs[c - 060].segment &= ~SEG_32BIT;
513 } else if (c >= 064 && c <= 067) {
514 ins->oprs[c - 064].segment |= SEG_RELATIVE;
515 if (osize == 16) {
516 ins->oprs[c - 064].offset = getu16(data);
517 data += 2;
518 ins->oprs[c - 064].segment &= ~(SEG_32BIT|SEG_64BIT);
519 } else if (osize == 32) {
520 ins->oprs[c - 064].offset = getu32(data);
521 data += 4;
522 ins->oprs[c - 064].segment &= ~SEG_64BIT;
523 ins->oprs[c - 064].segment |= SEG_32BIT;
524 }
525 if (segsize != osize) {
526 ins->oprs[c - 064].type =
527 (ins->oprs[c - 064].type & ~SIZE_MASK)
528 | ((osize == 16) ? BITS16 : BITS32);
529 }
530 } else if (c >= 070 && c <= 073) {
531 ins->oprs[c - 070].offset = getu32(data);
532 data += 4;
533 ins->oprs[c - 070].segment |= SEG_32BIT | SEG_RELATIVE;
534 } else if (c >= 0100 && c < 0140) {
535 int modrm = *data++;
536 ins->oprs[c & 07].segment |= SEG_RMREG;
537 data = do_ea(data, modrm, asize, segsize,
538 &ins->oprs[(c >> 3) & 07], ins);
539 if (!data)
540 return false;
541 ins->oprs[c & 07].basereg = ((modrm >> 3)&7)+
542 (ins->rex & REX_R ? 8 : 0);
543 } else if (c >= 0140 && c <= 0143) {
544 ins->oprs[c - 0140].offset = getu16(data);
545 data += 2;
546 } else if (c >= 0150 && c <= 0153) {
547 ins->oprs[c - 0150].offset = getu32(data);
548 data += 4;
549 } else if (c >= 0160 && c <= 0167) {
550 ins->rex |= (c & 4) ? REX_D|REX_OC : REX_D;
551 ins->drexdst = c & 3;
552 } else if (c == 0170) {
553 if (*data++)
554 return false;
555 } else if (c == 0171) {
556 data = do_drex(data, ins);
557 if (!data)
558 return false;
559 } else if (c >= 0200 && c <= 0277) {
560 int modrm = *data++;
561 if (((modrm >> 3) & 07) != (c & 07))
562 return false; /* spare field doesn't match up */
563 data = do_ea(data, modrm, asize, segsize,
564 &ins->oprs[(c >> 3) & 07], ins);
565 if (!data)
566 return false;
567 } else if (c == 0310) {
568 if (asize != 16)
569 return false;
570 else
571 a_used = true;
572 } else if (c == 0311) {
573 if (asize == 16)
574 return false;
575 else
576 a_used = true;
577 } else if (c == 0312) {
578 if (asize != segsize)
579 return false;
580 else
581 a_used = true;
582 } else if (c == 0313) {
583 if (asize != 64)
584 return false;
585 else
586 a_used = true;
587 } else if (c == 0320) {
588 if (osize != 16)
589 return false;
590 else
591 o_used = true;
592 } else if (c == 0321) {
593 if (osize != 32)
594 return false;
595 else
596 o_used = true;
597 } else if (c == 0322) {
598 if (osize != (segsize == 16) ? 16 : 32)
599 return false;
600 else
601 o_used = true;
602 } else if (c == 0323) {
603 ins->rex |= REX_W; /* 64-bit only instruction */
604 osize = 64;
605 } else if (c == 0324) {
606 if (!(ins->rex & (REX_P|REX_W)) || osize != 64)
607 return false;
608 } else if (c == 0330) {
609 int t = *r++, d = *data++;
610 if (d < t || d > t + 15)
611 return false;
612 else
613 ins->condition = d - t;
614 } else if (c == 0331) {
615 if (prefix->rep)
616 return false;
617 } else if (c == 0332) {
618 if (prefix->rep != 0xF2)
619 return false;
620 } else if (c == 0333) {
621 if (prefix->rep != 0xF3)
622 return false;
623 drep = 0;
624 } else if (c == 0334) {
625 if (lock) {
626 ins->rex |= REX_R;
627 lock = 0;
628 }
629 } else if (c == 0335) {
630 if (drep == P_REP)
631 drep = P_REPE;
632 } else if (c == 0364) {
633 if (prefix->osp)
634 return false;
635 } else if (c == 0365) {
636 if (prefix->asp)
637 return false;
638 } else if (c == 0366) {
639 if (!prefix->osp)
640 return false;
641 o_used = true;
642 } else if (c == 0367) {
643 if (!prefix->asp)
644 return false;
645 o_used = true;
646 }
647 }
648
649 /* REX cannot be combined with DREX */
650 if ((ins->rex & REX_D) && (prefix->rex))
651 return false;
652
653 /*
654 * Check for unused rep or a/o prefixes.
655 */
656 for (i = 0; i < t->operands; i++) {
657 if (ins->oprs[i].segment != SEG_RMREG)
658 a_used = true;
659 }
660
661 if (lock) {
662 if (ins->prefixes[PPS_LREP])
663 return false;
664 ins->prefixes[PPS_LREP] = P_LOCK;
665 }
666 if (drep) {
667 if (ins->prefixes[PPS_LREP])
668 return false;
669 ins->prefixes[PPS_LREP] = drep;
670 }
671 if (!o_used && osize == ((segsize == 16) ? 32 : 16)) {
672 if (ins->prefixes[PPS_OSIZE])
673 return false;
674 ins->prefixes[PPS_OSIZE] = osize == 16 ? P_O16 : P_O32;
675 }
676 if (!a_used && asize != segsize) {
677 if (ins->prefixes[PPS_ASIZE])
678 return false;
679 ins->prefixes[PPS_ASIZE] = asize == 16 ? P_A16 : P_A32;
680 }
681
682 /* Fix: check for redundant REX prefixes */
683
684 return data - origdata;
685 }
686
687 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
688 int32_t offset, int autosync, uint32_t prefer)
689 {
690 const struct itemplate * const *p, * const *best_p;
691 const struct disasm_index *ix;
692 uint8_t *dp;
693 int length, best_length = 0;
694 char *segover;
695 int i, slen, colon, n;
696 uint8_t *origdata;
697 int works;
698 insn tmp_ins, ins;
699 uint32_t goodness, best;
700 int best_pref;
701 struct prefix_info prefix;
702
703 memset(&ins, 0, sizeof ins);
704
705 /*
706 * Scan for prefixes.
707 */
708 memset(&prefix, 0, sizeof prefix);
709 prefix.asize = segsize;
710 prefix.osize = (segsize == 64) ? 32 : segsize;
711 segover = NULL;
712 origdata = data;
713 for (;;) {
714 if (*data == 0xF3 || *data == 0xF2)
715 prefix.rep = *data++;
716 else if (*data == 0xF0)
717 prefix.lock = *data++;
718 else if (*data == 0x2E)
719 segover = "cs", prefix.seg = *data++;
720 else if (*data == 0x36)
721 segover = "ss", prefix.seg = *data++;
722 else if (*data == 0x3E)
723 segover = "ds", prefix.seg = *data++;
724 else if (*data == 0x26)
725 segover = "es", prefix.seg = *data++;
726 else if (*data == 0x64)
727 segover = "fs", prefix.seg = *data++;
728 else if (*data == 0x65)
729 segover = "gs", prefix.seg = *data++;
730 else if (*data == 0x66) {
731 prefix.osize = (segsize == 16) ? 32 : 16;
732 prefix.osp = *data++;
733 } else if (*data == 0x67) {
734 prefix.asize = (segsize == 32) ? 16 : 32;
735 prefix.asp = *data++;
736 } else if (segsize == 64 && (*data & 0xf0) == REX_P) {
737 prefix.rex = *data++;
738 if (prefix.rex & REX_W)
739 prefix.osize = 64;
740 break; /* REX is always the last prefix */
741 } else {
742 break;
743 }
744 }
745
746 best = -1; /* Worst possible */
747 best_p = NULL;
748 best_pref = INT_MAX;
749
750 dp = data;
751 ix = itable + *dp++;
752 while (ix->n == -1) {
753 ix = (const struct disasm_index *)ix->p + *dp++;
754 }
755
756 p = (const struct itemplate * const *)ix->p;
757 for (n = ix->n; n; n--, p++) {
758 if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
759 works = true;
760 /*
761 * Final check to make sure the types of r/m match up.
762 * XXX: Need to make sure this is actually correct.
763 */
764 for (i = 0; i < (*p)->operands; i++) {
765 if (!((*p)->opd[i] & SAME_AS) &&
766 (
767 /* If it's a mem-only EA but we have a register, die. */
768 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
769 !(MEMORY & ~(*p)->opd[i])) ||
770 /* If it's a reg-only EA but we have a memory ref, die. */
771 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
772 !(REG_EA & ~(*p)->opd[i]) &&
773 !((*p)->opd[i] & REG_SMASK)) ||
774 /* Register type mismatch (eg FS vs REG_DESS): die. */
775 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
776 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
777 !whichreg((*p)->opd[i],
778 tmp_ins.oprs[i].basereg, tmp_ins.rex))
779 )) {
780 works = false;
781 break;
782 }
783 }
784
785 /*
786 * Note: we always prefer instructions which incorporate
787 * prefixes in the instructions themselves. This is to allow
788 * e.g. PAUSE to be preferred to REP NOP, and deal with
789 * MMX/SSE instructions where prefixes are used to select
790 * between MMX and SSE register sets or outright opcode
791 * selection.
792 */
793 if (works) {
794 int i, nprefix;
795 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
796 nprefix = 0;
797 for (i = 0; i < MAXPREFIX; i++)
798 if (tmp_ins.prefixes[i])
799 nprefix++;
800 if (nprefix < best_pref ||
801 (nprefix == best_pref && goodness < best)) {
802 /* This is the best one found so far */
803 best = goodness;
804 best_p = p;
805 best_pref = nprefix;
806 best_length = length;
807 ins = tmp_ins;
808 }
809 }
810 }
811 }
812
813 if (!best_p)
814 return 0; /* no instruction was matched */
815
816 /* Pick the best match */
817 p = best_p;
818 length = best_length;
819
820 slen = 0;
821
822 /* TODO: snprintf returns the value that the string would have if
823 * the buffer were long enough, and not the actual length of
824 * the returned string, so each instance of using the return
825 * value of snprintf should actually be checked to assure that
826 * the return value is "sane." Maybe a macro wrapper could
827 * be used for that purpose.
828 */
829 for (i = 0; i < MAXPREFIX; i++)
830 switch (ins.prefixes[i]) {
831 case P_LOCK:
832 slen += snprintf(output + slen, outbufsize - slen, "lock ");
833 break;
834 case P_REP:
835 slen += snprintf(output + slen, outbufsize - slen, "rep ");
836 break;
837 case P_REPE:
838 slen += snprintf(output + slen, outbufsize - slen, "repe ");
839 break;
840 case P_REPNE:
841 slen += snprintf(output + slen, outbufsize - slen, "repne ");
842 break;
843 case P_A16:
844 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
845 break;
846 case P_A32:
847 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
848 break;
849 case P_O16:
850 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
851 break;
852 case P_O32:
853 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
854 break;
855 default:
856 break;
857 }
858
859 for (i = 0; i < (int)elements(ico); i++)
860 if ((*p)->opcode == ico[i]) {
861 slen +=
862 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
863 whichcond(ins.condition));
864 break;
865 }
866 if (i >= (int)elements(ico))
867 slen +=
868 snprintf(output + slen, outbufsize - slen, "%s",
869 insn_names[(*p)->opcode]);
870 colon = false;
871 length += data - origdata; /* fix up for prefixes */
872 for (i = 0; i < (*p)->operands; i++) {
873 opflags_t t = (*p)->opd[i];
874 const operand *o = &ins.oprs[i];
875 int64_t offs;
876
877 if (t & SAME_AS) {
878 o = &ins.oprs[t & ~SAME_AS];
879 t = (*p)->opd[t & ~SAME_AS];
880 }
881
882 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
883
884 offs = o->offset;
885 if (o->segment & SEG_RELATIVE) {
886 offs += offset + length;
887 /*
888 * sort out wraparound
889 */
890 if (!(o->segment & (SEG_32BIT|SEG_64BIT)))
891 offs &= 0xffff;
892 /*
893 * add sync marker, if autosync is on
894 */
895 if (autosync)
896 add_sync(offs, 0L);
897 }
898
899 if (t & COLON)
900 colon = true;
901 else
902 colon = false;
903
904 if ((t & (REGISTER | FPUREG)) ||
905 (o->segment & SEG_RMREG)) {
906 enum reg_enum reg;
907 reg = whichreg(t, o->basereg, ins.rex);
908 if (t & TO)
909 slen += snprintf(output + slen, outbufsize - slen, "to ");
910 slen += snprintf(output + slen, outbufsize - slen, "%s",
911 reg_names[reg - EXPR_REG_START]);
912 } else if (!(UNITY & ~t)) {
913 output[slen++] = '1';
914 } else if (t & IMMEDIATE) {
915 if (t & BITS8) {
916 slen +=
917 snprintf(output + slen, outbufsize - slen, "byte ");
918 if (o->segment & SEG_SIGNED) {
919 if (offs < 0) {
920 offs *= -1;
921 output[slen++] = '-';
922 } else
923 output[slen++] = '+';
924 }
925 } else if (t & BITS16) {
926 slen +=
927 snprintf(output + slen, outbufsize - slen, "word ");
928 } else if (t & BITS32) {
929 slen +=
930 snprintf(output + slen, outbufsize - slen, "dword ");
931 } else if (t & BITS64) {
932 slen +=
933 snprintf(output + slen, outbufsize - slen, "qword ");
934 } else if (t & NEAR) {
935 slen +=
936 snprintf(output + slen, outbufsize - slen, "near ");
937 } else if (t & SHORT) {
938 slen +=
939 snprintf(output + slen, outbufsize - slen, "short ");
940 }
941 slen +=
942 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
943 offs);
944 } else if (!(MEM_OFFS & ~t)) {
945 slen +=
946 snprintf(output + slen, outbufsize - slen, "[%s%s%s0x%"PRIx64"]",
947 (segover ? segover : ""),
948 (segover ? ":" : ""),
949 (o->disp_size ==
950 32 ? "dword " : o->disp_size ==
951 16 ? "word " : ""), offs);
952 segover = NULL;
953 } else if (!(REGMEM & ~t)) {
954 int started = false;
955 if (t & BITS8)
956 slen +=
957 snprintf(output + slen, outbufsize - slen, "byte ");
958 if (t & BITS16)
959 slen +=
960 snprintf(output + slen, outbufsize - slen, "word ");
961 if (t & BITS32)
962 slen +=
963 snprintf(output + slen, outbufsize - slen, "dword ");
964 if (t & BITS64)
965 slen +=
966 snprintf(output + slen, outbufsize - slen, "qword ");
967 if (t & BITS80)
968 slen +=
969 snprintf(output + slen, outbufsize - slen, "tword ");
970 if (t & FAR)
971 slen += snprintf(output + slen, outbufsize - slen, "far ");
972 if (t & NEAR)
973 slen +=
974 snprintf(output + slen, outbufsize - slen, "near ");
975 output[slen++] = '[';
976 if (o->disp_size)
977 slen += snprintf(output + slen, outbufsize - slen, "%s",
978 (o->disp_size == 64 ? "qword " :
979 o->disp_size == 32 ? "dword " :
980 o->disp_size == 16 ? "word " :
981 ""));
982 if (o->eaflags & EAF_REL)
983 slen += snprintf(output + slen, outbufsize - slen, "rel ");
984 if (segover) {
985 slen +=
986 snprintf(output + slen, outbufsize - slen, "%s:",
987 segover);
988 segover = NULL;
989 }
990 if (o->basereg != -1) {
991 slen += snprintf(output + slen, outbufsize - slen, "%s",
992 reg_names[(o->basereg -
993 EXPR_REG_START)]);
994 started = true;
995 }
996 if (o->indexreg != -1) {
997 if (started)
998 output[slen++] = '+';
999 slen += snprintf(output + slen, outbufsize - slen, "%s",
1000 reg_names[(o->indexreg -
1001 EXPR_REG_START)]);
1002 if (o->scale > 1)
1003 slen +=
1004 snprintf(output + slen, outbufsize - slen, "*%d",
1005 o->scale);
1006 started = true;
1007 }
1008 if (o->segment & SEG_DISP8) {
1009 int minus = 0;
1010 int8_t offset = offs;
1011 if (offset < 0) {
1012 minus = 1;
1013 offset = -offset;
1014 }
1015 slen +=
1016 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
1017 minus ? "-" : "+", offset);
1018 } else if (o->segment & SEG_DISP16) {
1019 int minus = 0;
1020 int16_t offset = offs;
1021 if (offset < 0) {
1022 minus = 1;
1023 offset = -offset;
1024 }
1025 slen +=
1026 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx16"",
1027 minus ? "-" : started ? "+" : "", offset);
1028 } else if (o->segment & SEG_DISP32) {
1029 char *prefix = "";
1030 int32_t offset = offs;
1031 if (offset < 0) {
1032 offset = -offset;
1033 prefix = "-";
1034 } else {
1035 prefix = started ? "+" : "";
1036 }
1037 slen +=
1038 snprintf(output + slen, outbufsize - slen,
1039 "%s0x%"PRIx32"", prefix, offset);
1040 }
1041 output[slen++] = ']';
1042 } else {
1043 slen +=
1044 snprintf(output + slen, outbufsize - slen, "<operand%d>",
1045 i);
1046 }
1047 }
1048 output[slen] = '\0';
1049 if (segover) { /* unused segment override */
1050 char *p = output;
1051 int count = slen + 1;
1052 while (count--)
1053 p[count + 3] = p[count];
1054 strncpy(output, segover, 2);
1055 output[2] = ' ';
1056 }
1057 return length;
1058 }
1059
1060 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
1061 {
1062 snprintf(output, outbufsize, "db 0x%02X", *data);
1063 return 1;
1064 }
The Netwide Assembler