kernel/2.6.29.6-aldebaran-rt/include/drm/drm_mode.h

   1 /*
   2  * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
   3  * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
   4  * Copyright (c) 2008 Red Hat Inc.
   5  * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
   6  * Copyright (c) 2007-2008 Intel Corporation
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  23  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  24  * IN THE SOFTWARE.
  25  */
  26
  27 #ifndef _DRM_MODE_H
  28 #define _DRM_MODE_H
  29
  30 #include <linux/kernel.h>
  31 #include <linux/types.h>
  32
  33 #define DRM_DISPLAY_INFO_LEN    32
  34 #define DRM_CONNECTOR_NAME_LEN  32
  35 #define DRM_DISPLAY_MODE_LEN    32
  36 #define DRM_PROP_NAME_LEN       32
  37
  38 #define DRM_MODE_TYPE_BUILTIN   (1<<0)
  39 #define DRM_MODE_TYPE_CLOCK_C   ((1<<1) | DRM_MODE_TYPE_BUILTIN)
  40 #define DRM_MODE_TYPE_CRTC_C    ((1<<2) | DRM_MODE_TYPE_BUILTIN)
  41 #define DRM_MODE_TYPE_PREFERRED (1<<3)
  42 #define DRM_MODE_TYPE_DEFAULT   (1<<4)
  43 #define DRM_MODE_TYPE_USERDEF   (1<<5)
  44 #define DRM_MODE_TYPE_DRIVER    (1<<6)
  45
  46 /* Video mode flags */
  47 /* bit compatible with the xorg definitions. */
  48 #define DRM_MODE_FLAG_PHSYNC    (1<<0)
  49 #define DRM_MODE_FLAG_NHSYNC    (1<<1)
  50 #define DRM_MODE_FLAG_PVSYNC    (1<<2)
  51 #define DRM_MODE_FLAG_NVSYNC    (1<<3)
  52 #define DRM_MODE_FLAG_INTERLACE (1<<4)
  53 #define DRM_MODE_FLAG_DBLSCAN   (1<<5)
  54 #define DRM_MODE_FLAG_CSYNC     (1<<6)
  55 #define DRM_MODE_FLAG_PCSYNC    (1<<7)
  56 #define DRM_MODE_FLAG_NCSYNC    (1<<8)
  57 #define DRM_MODE_FLAG_HSKEW     (1<<9) /* hskew provided */
  58 #define DRM_MODE_FLAG_BCAST     (1<<10)
  59 #define DRM_MODE_FLAG_PIXMUX    (1<<11)
  60 #define DRM_MODE_FLAG_DBLCLK    (1<<12)
  61 #define DRM_MODE_FLAG_CLKDIV2   (1<<13)
  62
  63 /* DPMS flags */
  64 /* bit compatible with the xorg definitions. */
  65 #define DRM_MODE_DPMS_ON        0
  66 #define DRM_MODE_DPMS_STANDBY   1
  67 #define DRM_MODE_DPMS_SUSPEND   2
  68 #define DRM_MODE_DPMS_OFF       3
  69
  70 /* Scaling mode options */
  71 #define DRM_MODE_SCALE_NON_GPU          0
  72 #define DRM_MODE_SCALE_FULLSCREEN       1
  73 #define DRM_MODE_SCALE_NO_SCALE         2
  74 #define DRM_MODE_SCALE_ASPECT           3
  75
  76 /* Dithering mode options */
  77 #define DRM_MODE_DITHERING_OFF  0
  78 #define DRM_MODE_DITHERING_ON   1
  79
  80 struct drm_mode_modeinfo {
  81         __u32 clock;
  82         __u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
  83         __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
  84
  85         __u32 vrefresh; /* vertical refresh * 1000 */
  86
  87         __u32 flags;
  88         __u32 type;
  89         char name[DRM_DISPLAY_MODE_LEN];
  90 };
  91
  92 struct drm_mode_card_res {
  93         __u64 fb_id_ptr;
  94         __u64 crtc_id_ptr;
  95         __u64 connector_id_ptr;
  96         __u64 encoder_id_ptr;
  97         __u32 count_fbs;
  98         __u32 count_crtcs;
  99         __u32 count_connectors;
 100         __u32 count_encoders;
 101         __u32 min_width, max_width;
 102         __u32 min_height, max_height;
 103 };
 104
 105 struct drm_mode_crtc {
 106         __u64 set_connectors_ptr;
 107         __u32 count_connectors;
 108
 109         __u32 crtc_id; /**< Id */
 110         __u32 fb_id; /**< Id of framebuffer */
 111
 112         __u32 x, y; /**< Position on the frameuffer */
 113
 114         __u32 gamma_size;
 115         __u32 mode_valid;
 116         struct drm_mode_modeinfo mode;
 117 };
 118
 119 #define DRM_MODE_ENCODER_NONE   0
 120 #define DRM_MODE_ENCODER_DAC    1
 121 #define DRM_MODE_ENCODER_TMDS   2
 122 #define DRM_MODE_ENCODER_LVDS   3
 123 #define DRM_MODE_ENCODER_TVDAC  4
 124
 125 struct drm_mode_get_encoder {
 126         __u32 encoder_id;
 127         __u32 encoder_type;
 128
 129         __u32 crtc_id; /**< Id of crtc */
 130
 131         __u32 possible_crtcs;
 132         __u32 possible_clones;
 133 };
 134
 135 /* This is for connectors with multiple signal types. */
 136 /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
 137 #define DRM_MODE_SUBCONNECTOR_Automatic 0
 138 #define DRM_MODE_SUBCONNECTOR_Unknown   0
 139 #define DRM_MODE_SUBCONNECTOR_DVID      3
 140 #define DRM_MODE_SUBCONNECTOR_DVIA      4
 141 #define DRM_MODE_SUBCONNECTOR_Composite 5
 142 #define DRM_MODE_SUBCONNECTOR_SVIDEO    6
 143 #define DRM_MODE_SUBCONNECTOR_Component 8
 144
 145 #define DRM_MODE_CONNECTOR_Unknown      0
 146 #define DRM_MODE_CONNECTOR_VGA          1
 147 #define DRM_MODE_CONNECTOR_DVII         2
 148 #define DRM_MODE_CONNECTOR_DVID         3
 149 #define DRM_MODE_CONNECTOR_DVIA         4
 150 #define DRM_MODE_CONNECTOR_Composite    5
 151 #define DRM_MODE_CONNECTOR_SVIDEO       6
 152 #define DRM_MODE_CONNECTOR_LVDS         7
 153 #define DRM_MODE_CONNECTOR_Component    8
 154 #define DRM_MODE_CONNECTOR_9PinDIN      9
 155 #define DRM_MODE_CONNECTOR_DisplayPort  10
 156 #define DRM_MODE_CONNECTOR_HDMIA        11
 157 #define DRM_MODE_CONNECTOR_HDMIB        12
 158
 159 struct drm_mode_get_connector {
 160
 161         __u64 encoders_ptr;
 162         __u64 modes_ptr;
 163         __u64 props_ptr;
 164         __u64 prop_values_ptr;
 165
 166         __u32 count_modes;
 167         __u32 count_props;
 168         __u32 count_encoders;
 169
 170         __u32 encoder_id; /**< Current Encoder */
 171         __u32 connector_id; /**< Id */
 172         __u32 connector_type;
 173         __u32 connector_type_id;
 174
 175         __u32 connection;
 176         __u32 mm_width, mm_height; /**< HxW in millimeters */
 177         __u32 subpixel;
 178 };
 179
 180 #define DRM_MODE_PROP_PENDING   (1<<0)
 181 #define DRM_MODE_PROP_RANGE     (1<<1)
 182 #define DRM_MODE_PROP_IMMUTABLE (1<<2)
 183 #define DRM_MODE_PROP_ENUM      (1<<3) /* enumerated type with text strings */
 184 #define DRM_MODE_PROP_BLOB      (1<<4)
 185
 186 struct drm_mode_property_enum {
 187         __u64 value;
 188         char name[DRM_PROP_NAME_LEN];
 189 };
 190
 191 struct drm_mode_get_property {
 192         __u64 values_ptr; /* values and blob lengths */
 193         __u64 enum_blob_ptr; /* enum and blob id ptrs */
 194
 195         __u32 prop_id;
 196         __u32 flags;
 197         char name[DRM_PROP_NAME_LEN];
 198
 199         __u32 count_values;
 200         __u32 count_enum_blobs;
 201 };
 202
 203 struct drm_mode_connector_set_property {
 204         __u64 value;
 205         __u32 prop_id;
 206         __u32 connector_id;
 207 };
 208
 209 struct drm_mode_get_blob {
 210         __u32 blob_id;
 211         __u32 length;
 212         __u64 data;
 213 };
 214
 215 struct drm_mode_fb_cmd {
 216         __u32 fb_id;
 217         __u32 width, height;
 218         __u32 pitch;
 219         __u32 bpp;
 220         __u32 depth;
 221         /* driver specific handle */
 222         __u32 handle;
 223 };
 224
 225 struct drm_mode_mode_cmd {
 226         __u32 connector_id;
 227         struct drm_mode_modeinfo mode;
 228 };
 229
 230 #define DRM_MODE_CURSOR_BO      (1<<0)
 231 #define DRM_MODE_CURSOR_MOVE    (1<<1)
 232
 233 /*
 234  * depending on the value in flags diffrent members are used.
 235  *
 236  * CURSOR_BO uses
 237  *    crtc
 238  *    width
 239  *    height
 240  *    handle - if 0 turns the cursor of
 241  *
 242  * CURSOR_MOVE uses
 243  *    crtc
 244  *    x
 245  *    y
 246  */
 247 struct drm_mode_cursor {
 248         __u32 flags;
 249         __u32 crtc_id;
 250         __s32 x;
 251         __s32 y;
 252         __u32 width;
 253         __u32 height;
 254         /* driver specific handle */
 255         __u32 handle;
 256 };
 257
 258 struct drm_mode_crtc_lut {
 259         __u32 crtc_id;
 260         __u32 gamma_size;
 261
 262         /* pointers to arrays */
 263         __u64 red;
 264         __u64 green;
 265         __u64 blue;
 266 };
 267
 268 #endif