kernel/2.6.29.6-aldebaran-rt/drivers/usb/host/ehci-mem.c

   1 /*
   2  * Copyright (c) 2001 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 /* this file is part of ehci-hcd.c */
  20
  21 /*-------------------------------------------------------------------------*/
  22
  23 /*
  24  * There's basically three types of memory:
  25  *      - data used only by the HCD ... kmalloc is fine
  26  *      - async and periodic schedules, shared by HC and HCD ... these
  27  *        need to use dma_pool or dma_alloc_coherent
  28  *      - driver buffers, read/written by HC ... single shot DMA mapped
  29  *
  30  * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
  31  * No memory seen by this driver is pageable.
  32  */
  33
  34 /*-------------------------------------------------------------------------*/
  35
  36 /* Allocate the key transfer structures from the previously allocated pool */
  37
  38 static inline void ehci_qtd_init(struct ehci_hcd *ehci, struct ehci_qtd *qtd,
  39                                   dma_addr_t dma)
  40 {
  41         memset (qtd, 0, sizeof *qtd);
  42         qtd->qtd_dma = dma;
  43         qtd->hw_token = cpu_to_le32 (QTD_STS_HALT);
  44         qtd->hw_next = EHCI_LIST_END(ehci);
  45         qtd->hw_alt_next = EHCI_LIST_END(ehci);
  46         INIT_LIST_HEAD (&qtd->qtd_list);
  47 }
  48
  49 static struct ehci_qtd *ehci_qtd_alloc (struct ehci_hcd *ehci, gfp_t flags)
  50 {
  51         struct ehci_qtd         *qtd;
  52         dma_addr_t              dma;
  53
  54         qtd = dma_pool_alloc (ehci->qtd_pool, flags, &dma);
  55         if (qtd != NULL) {
  56                 ehci_qtd_init(ehci, qtd, dma);
  57         }
  58         return qtd;
  59 }
  60
  61 static inline void ehci_qtd_free (struct ehci_hcd *ehci, struct ehci_qtd *qtd)
  62 {
  63         dma_pool_free (ehci->qtd_pool, qtd, qtd->qtd_dma);
  64 }
  65
  66
  67 static void qh_destroy(struct ehci_qh *qh)
  68 {
  69         struct ehci_hcd *ehci = qh->ehci;
  70
  71         /* clean qtds first, and know this is not linked */
  72         if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) {
  73                 ehci_dbg (ehci, "unused qh not empty!\n");
  74                 BUG ();
  75         }
  76         if (qh->dummy)
  77                 ehci_qtd_free (ehci, qh->dummy);
  78         dma_pool_free (ehci->qh_pool, qh, qh->qh_dma);
  79 }
  80
  81 static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, gfp_t flags)
  82 {
  83         struct ehci_qh          *qh;
  84         dma_addr_t              dma;
  85
  86         qh = (struct ehci_qh *)
  87                 dma_pool_alloc (ehci->qh_pool, flags, &dma);
  88         if (!qh)
  89                 return qh;
  90
  91         memset (qh, 0, sizeof *qh);
  92         qh->refcount = 1;
  93         qh->ehci = ehci;
  94         qh->qh_dma = dma;
  95         // INIT_LIST_HEAD (&qh->qh_list);
  96         INIT_LIST_HEAD (&qh->qtd_list);
  97
  98         /* dummy td enables safe urb queuing */
  99         qh->dummy = ehci_qtd_alloc (ehci, flags);
 100         if (qh->dummy == NULL) {
 101                 ehci_dbg (ehci, "no dummy td\n");
 102                 dma_pool_free (ehci->qh_pool, qh, qh->qh_dma);
 103                 qh = NULL;
 104         }
 105         return qh;
 106 }
 107
 108 /* to share a qh (cpu threads, or hc) */
 109 static inline struct ehci_qh *qh_get (struct ehci_qh *qh)
 110 {
 111         WARN_ON(!qh->refcount);
 112         qh->refcount++;
 113         return qh;
 114 }
 115
 116 static inline void qh_put (struct ehci_qh *qh)
 117 {
 118         if (!--qh->refcount)
 119                 qh_destroy(qh);
 120 }
 121
 122 /*-------------------------------------------------------------------------*/
 123
 124 /* The queue heads and transfer descriptors are managed from pools tied
 125  * to each of the "per device" structures.
 126  * This is the initialisation and cleanup code.
 127  */
 128
 129 static void ehci_mem_cleanup (struct ehci_hcd *ehci)
 130 {
 131         free_cached_itd_list(ehci);
 132         if (ehci->async)
 133                 qh_put (ehci->async);
 134         ehci->async = NULL;
 135
 136         /* DMA consistent memory and pools */
 137         if (ehci->qtd_pool)
 138                 dma_pool_destroy (ehci->qtd_pool);
 139         ehci->qtd_pool = NULL;
 140
 141         if (ehci->qh_pool) {
 142                 dma_pool_destroy (ehci->qh_pool);
 143                 ehci->qh_pool = NULL;
 144         }
 145
 146         if (ehci->itd_pool)
 147                 dma_pool_destroy (ehci->itd_pool);
 148         ehci->itd_pool = NULL;
 149
 150         if (ehci->sitd_pool)
 151                 dma_pool_destroy (ehci->sitd_pool);
 152         ehci->sitd_pool = NULL;
 153
 154         if (ehci->periodic)
 155                 dma_free_coherent (ehci_to_hcd(ehci)->self.controller,
 156                         ehci->periodic_size * sizeof (u32),
 157                         ehci->periodic, ehci->periodic_dma);
 158         ehci->periodic = NULL;
 159
 160         /* shadow periodic table */
 161         kfree(ehci->pshadow);
 162         ehci->pshadow = NULL;
 163 }
 164
 165 /* remember to add cleanup code (above) if you add anything here */
 166 static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
 167 {
 168         int i;
 169
 170         /* QTDs for control/bulk/intr transfers */
 171         ehci->qtd_pool = dma_pool_create ("ehci_qtd",
 172                         ehci_to_hcd(ehci)->self.controller,
 173                         sizeof (struct ehci_qtd),
 174                         32 /* byte alignment (for hw parts) */,
 175                         4096 /* can't cross 4K */);
 176         if (!ehci->qtd_pool) {
 177                 goto fail;
 178         }
 179
 180         /* QHs for control/bulk/intr transfers */
 181         ehci->qh_pool = dma_pool_create ("ehci_qh",
 182                         ehci_to_hcd(ehci)->self.controller,
 183                         sizeof (struct ehci_qh),
 184                         32 /* byte alignment (for hw parts) */,
 185                         4096 /* can't cross 4K */);
 186         if (!ehci->qh_pool) {
 187                 goto fail;
 188         }
 189         ehci->async = ehci_qh_alloc (ehci, flags);
 190         if (!ehci->async) {
 191                 goto fail;
 192         }
 193
 194         /* ITD for high speed ISO transfers */
 195         ehci->itd_pool = dma_pool_create ("ehci_itd",
 196                         ehci_to_hcd(ehci)->self.controller,
 197                         sizeof (struct ehci_itd),
 198                         32 /* byte alignment (for hw parts) */,
 199                         4096 /* can't cross 4K */);
 200         if (!ehci->itd_pool) {
 201                 goto fail;
 202         }
 203
 204         /* SITD for full/low speed split ISO transfers */
 205         ehci->sitd_pool = dma_pool_create ("ehci_sitd",
 206                         ehci_to_hcd(ehci)->self.controller,
 207                         sizeof (struct ehci_sitd),
 208                         32 /* byte alignment (for hw parts) */,
 209                         4096 /* can't cross 4K */);
 210         if (!ehci->sitd_pool) {
 211                 goto fail;
 212         }
 213
 214         /* Hardware periodic table */
 215         ehci->periodic = (__le32 *)
 216                 dma_alloc_coherent (ehci_to_hcd(ehci)->self.controller,
 217                         ehci->periodic_size * sizeof(__le32),
 218                         &ehci->periodic_dma, 0);
 219         if (ehci->periodic == NULL) {
 220                 goto fail;
 221         }
 222         for (i = 0; i < ehci->periodic_size; i++)
 223                 ehci->periodic [i] = EHCI_LIST_END(ehci);
 224
 225         /* software shadow of hardware table */
 226         ehci->pshadow = kcalloc(ehci->periodic_size, sizeof(void *), flags);
 227         if (ehci->pshadow != NULL)
 228                 return 0;
 229
 230 fail:
 231         ehci_dbg (ehci, "couldn't init memory\n");
 232         ehci_mem_cleanup (ehci);
 233         return -ENOMEM;
 234 }