| blob | 167f356ef86b3441bb57b17957bf5dcd6eb76f53 |
1 /*
2 * Copyright (C) 1997-2008 Alacritech, Inc. All rights reserved
3 *
4 * sxgphycode.h:
5 *
6 * This file PHY microcode and register initialization data.
7 */
9 /**********************************************************************
10 * PHY Microcode
11 *
12 * The following contains both PHY microcode and PHY register
13 * initialization data. It is specific to both the PHY and the
14 * type of transceiver.
15 *
16 **********************************************************************/
18 /*
19 * Download for AEL2005C PHY with SR/LR transceiver (10GBASE-SR or 10GBASE-LR)
20 */
22 /*
23 * NOTE: An address of 0 is a special case. When the download routine
24 * sees an address of 0, it does not write to the PHY. Instead, it
25 * delays the download. The length of the delay (in ms) is given in
26 * the data field.
27 *
28 * Delays are required at certain points.
29 */
31 /*
32 * Platform-specific MDIO Patches:
33 * (include patches for 10G RX polarity flip, 50Mhz Synth, etc)
34 */
35 /* Addr, Data */
37 /* patch for SFP+ applications) */
46 /* complete. (mandatory patch) */
48 /* Configure the LED's */
53 /* Transceiver-specific MDIO Patches: */
55 /* LOS signal in 1.000A */
56 /* (mandatory patch for SR code) */
58 /* 1.C005 (mandatory patch for SR code) */
60 /* Transceiver-specific Microcontroller Initialization: */
63 /* writing in code. */
65 /* code block starts here: */
342 /* end of code block */
344 /* Unpause the microcontroller to start program */
349 };