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added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / drivers / serial / crisv10.c
blobe642c22c80e230f8ad5da30a69b9512838cc34b9
1 /*
2 * Serial port driver for the ETRAX 100LX chip
3 *
4 * Copyright (C) 1998-2007 Axis Communications AB
5 *
6 * Many, many authors. Based once upon a time on serial.c for 16x50.
7 *
8 */
9
10 static char *serial_version = "$Revision: 1.25 $";
11
12 #include <linux/types.h>
13 #include <linux/errno.h>
14 #include <linux/signal.h>
15 #include <linux/sched.h>
16 #include <linux/timer.h>
17 #include <linux/interrupt.h>
18 #include <linux/tty.h>
19 #include <linux/tty_flip.h>
20 #include <linux/major.h>
21 #include <linux/string.h>
22 #include <linux/fcntl.h>
23 #include <linux/mm.h>
24 #include <linux/slab.h>
25 #include <linux/init.h>
26 #include <asm/uaccess.h>
27 #include <linux/kernel.h>
28 #include <linux/mutex.h>
29 #include <linux/bitops.h>
30
31 #include <asm/io.h>
32 #include <asm/irq.h>
33 #include <asm/dma.h>
34 #include <asm/system.h>
35 #include <linux/delay.h>
36
37 #include <arch/svinto.h>
38
39 /* non-arch dependent serial structures are in linux/serial.h */
40 #include <linux/serial.h>
41 /* while we keep our own stuff (struct e100_serial) in a local .h file */
42 #include "crisv10.h"
43 #include <asm/fasttimer.h>
44 #include <arch/io_interface_mux.h>
45
46 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
47 #ifndef CONFIG_ETRAX_FAST_TIMER
48 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
49 #endif
50 #endif
51
52 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
53 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
54 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
55 #endif
56
57 #if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
58 #error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
59 #endif
60
61 /*
62 * All of the compatibilty code so we can compile serial.c against
63 * older kernels is hidden in serial_compat.h
64 */
65 #if defined(LOCAL_HEADERS)
66 #include "serial_compat.h"
67 #endif
68
69 struct tty_driver *serial_driver;
70
71 /* number of characters left in xmit buffer before we ask for more */
72 #define WAKEUP_CHARS 256
73
74 //#define SERIAL_DEBUG_INTR
75 //#define SERIAL_DEBUG_OPEN
76 //#define SERIAL_DEBUG_FLOW
77 //#define SERIAL_DEBUG_DATA
78 //#define SERIAL_DEBUG_THROTTLE
79 //#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
80 //#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
81
82 /* Enable this to use serial interrupts to handle when you
83 expect the first received event on the serial port to
84 be an error, break or similar. Used to be able to flash IRMA
85 from eLinux */
86 #define SERIAL_HANDLE_EARLY_ERRORS
87
88 /* Currently 16 descriptors x 128 bytes = 2048 bytes */
89 #define SERIAL_DESCR_BUF_SIZE 256
90
91 #define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
92 #define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
93
94 /* We don't want to load the system with massive fast timer interrupt
95 * on high baudrates so limit it to 250 us (4kHz) */
96 #define MIN_FLUSH_TIME_USEC 250
97
98 /* Add an x here to log a lot of timer stuff */
99 #define TIMERD(x)
100 /* Debug details of interrupt handling */
101 #define DINTR1(x) /* irq on/off, errors */
102 #define DINTR2(x) /* tx and rx */
103 /* Debug flip buffer stuff */
104 #define DFLIP(x)
105 /* Debug flow control and overview of data flow */
106 #define DFLOW(x)
107 #define DBAUD(x)
108 #define DLOG_INT_TRIG(x)
109
110 //#define DEBUG_LOG_INCLUDED
111 #ifndef DEBUG_LOG_INCLUDED
112 #define DEBUG_LOG(line, string, value)
113 #else
114 struct debug_log_info
115 {
116 unsigned long time;
117 unsigned long timer_data;
118 // int line;
119 const char *string;
120 int value;
121 };
122 #define DEBUG_LOG_SIZE 4096
123
124 struct debug_log_info debug_log[DEBUG_LOG_SIZE];
125 int debug_log_pos = 0;
126
127 #define DEBUG_LOG(_line, _string, _value) do { \
128 if ((_line) == SERIAL_DEBUG_LINE) {\
129 debug_log_func(_line, _string, _value); \
130 }\
131 }while(0)
132
133 void debug_log_func(int line, const char *string, int value)
134 {
135 if (debug_log_pos < DEBUG_LOG_SIZE) {
136 debug_log[debug_log_pos].time = jiffies;
137 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
138 // debug_log[debug_log_pos].line = line;
139 debug_log[debug_log_pos].string = string;
140 debug_log[debug_log_pos].value = value;
141 debug_log_pos++;
142 }
143 /*printk(string, value);*/
144 }
145 #endif
146
147 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
148 /* Default number of timer ticks before flushing rx fifo
149 * When using "little data, low latency applications: use 0
150 * When using "much data applications (PPP)" use ~5
151 */
152 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
153 #endif
154
155 unsigned long timer_data_to_ns(unsigned long timer_data);
156
157 static void change_speed(struct e100_serial *info);
158 static void rs_throttle(struct tty_struct * tty);
159 static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
160 static int rs_write(struct tty_struct *tty,
161 const unsigned char *buf, int count);
162 #ifdef CONFIG_ETRAX_RS485
163 static int e100_write_rs485(struct tty_struct *tty,
164 const unsigned char *buf, int count);
165 #endif
166 static int get_lsr_info(struct e100_serial *info, unsigned int *value);
167
168
169 #define DEF_BAUD 115200 /* 115.2 kbit/s */
170 #define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
171 #define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
172 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
173 #define DEF_TX 0x80 /* or SERIAL_CTRL_B */
174
175 /* offsets from R_SERIALx_CTRL */
176
177 #define REG_DATA 0
178 #define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
179 #define REG_TR_DATA 0
180 #define REG_STATUS 1
181 #define REG_TR_CTRL 1
182 #define REG_REC_CTRL 2
183 #define REG_BAUD 3
184 #define REG_XOFF 4 /* this is a 32 bit register */
185
186 /* The bitfields are the same for all serial ports */
187 #define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
188 #define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
189 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
190 #define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
191 #define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
192
193 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
194
195 /* Values for info->errorcode */
196 #define ERRCODE_SET_BREAK (TTY_BREAK)
197 #define ERRCODE_INSERT 0x100
198 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
199
200 #define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
201
202 /*
203 * General note regarding the use of IO_* macros in this file:
204 *
205 * We will use the bits defined for DMA channel 6 when using various
206 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
207 * the same for all channels (which of course they are).
208 *
209 * We will also use the bits defined for serial port 0 when writing commands
210 * to the different ports, as these bits too are the same for all ports.
211 */
212
213
214 /* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
215 static const unsigned long e100_ser_int_mask = 0
216 #ifdef CONFIG_ETRAX_SERIAL_PORT0
217 | IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
218 #endif
219 #ifdef CONFIG_ETRAX_SERIAL_PORT1
220 | IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
221 #endif
222 #ifdef CONFIG_ETRAX_SERIAL_PORT2
223 | IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
224 #endif
225 #ifdef CONFIG_ETRAX_SERIAL_PORT3
226 | IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
227 #endif
228 ;
229 unsigned long r_alt_ser_baudrate_shadow = 0;
230
231 /* this is the data for the four serial ports in the etrax100 */
232 /* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
233 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
234
235 static struct e100_serial rs_table[] = {
236 { .baud = DEF_BAUD,
237 .ioport = (unsigned char *)R_SERIAL0_CTRL,
238 .irq = 1U << 12, /* uses DMA 6 and 7 */
239 .oclrintradr = R_DMA_CH6_CLR_INTR,
240 .ofirstadr = R_DMA_CH6_FIRST,
241 .ocmdadr = R_DMA_CH6_CMD,
242 .ostatusadr = R_DMA_CH6_STATUS,
243 .iclrintradr = R_DMA_CH7_CLR_INTR,
244 .ifirstadr = R_DMA_CH7_FIRST,
245 .icmdadr = R_DMA_CH7_CMD,
246 .idescradr = R_DMA_CH7_DESCR,
247 .flags = STD_FLAGS,
248 .rx_ctrl = DEF_RX,
249 .tx_ctrl = DEF_TX,
250 .iseteop = 2,
251 .dma_owner = dma_ser0,
252 .io_if = if_serial_0,
253 #ifdef CONFIG_ETRAX_SERIAL_PORT0
254 .enabled = 1,
255 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
256 .dma_out_enabled = 1,
257 .dma_out_nbr = SER0_TX_DMA_NBR,
258 .dma_out_irq_nbr = SER0_DMA_TX_IRQ_NBR,
259 .dma_out_irq_flags = IRQF_DISABLED,
260 .dma_out_irq_description = "serial 0 dma tr",
261 #else
262 .dma_out_enabled = 0,
263 .dma_out_nbr = UINT_MAX,
264 .dma_out_irq_nbr = 0,
265 .dma_out_irq_flags = 0,
266 .dma_out_irq_description = NULL,
267 #endif
268 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
269 .dma_in_enabled = 1,
270 .dma_in_nbr = SER0_RX_DMA_NBR,
271 .dma_in_irq_nbr = SER0_DMA_RX_IRQ_NBR,
272 .dma_in_irq_flags = IRQF_DISABLED,
273 .dma_in_irq_description = "serial 0 dma rec",
274 #else
275 .dma_in_enabled = 0,
276 .dma_in_nbr = UINT_MAX,
277 .dma_in_irq_nbr = 0,
278 .dma_in_irq_flags = 0,
279 .dma_in_irq_description = NULL,
280 #endif
281 #else
282 .enabled = 0,
283 .io_if_description = NULL,
284 .dma_out_enabled = 0,
285 .dma_in_enabled = 0
286 #endif
287
288 }, /* ttyS0 */
289 #ifndef CONFIG_SVINTO_SIM
290 { .baud = DEF_BAUD,
291 .ioport = (unsigned char *)R_SERIAL1_CTRL,
292 .irq = 1U << 16, /* uses DMA 8 and 9 */
293 .oclrintradr = R_DMA_CH8_CLR_INTR,
294 .ofirstadr = R_DMA_CH8_FIRST,
295 .ocmdadr = R_DMA_CH8_CMD,
296 .ostatusadr = R_DMA_CH8_STATUS,
297 .iclrintradr = R_DMA_CH9_CLR_INTR,
298 .ifirstadr = R_DMA_CH9_FIRST,
299 .icmdadr = R_DMA_CH9_CMD,
300 .idescradr = R_DMA_CH9_DESCR,
301 .flags = STD_FLAGS,
302 .rx_ctrl = DEF_RX,
303 .tx_ctrl = DEF_TX,
304 .iseteop = 3,
305 .dma_owner = dma_ser1,
306 .io_if = if_serial_1,
307 #ifdef CONFIG_ETRAX_SERIAL_PORT1
308 .enabled = 1,
309 .io_if_description = "ser1",
310 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
311 .dma_out_enabled = 1,
312 .dma_out_nbr = SER1_TX_DMA_NBR,
313 .dma_out_irq_nbr = SER1_DMA_TX_IRQ_NBR,
314 .dma_out_irq_flags = IRQF_DISABLED,
315 .dma_out_irq_description = "serial 1 dma tr",
316 #else
317 .dma_out_enabled = 0,
318 .dma_out_nbr = UINT_MAX,
319 .dma_out_irq_nbr = 0,
320 .dma_out_irq_flags = 0,
321 .dma_out_irq_description = NULL,
322 #endif
323 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
324 .dma_in_enabled = 1,
325 .dma_in_nbr = SER1_RX_DMA_NBR,
326 .dma_in_irq_nbr = SER1_DMA_RX_IRQ_NBR,
327 .dma_in_irq_flags = IRQF_DISABLED,
328 .dma_in_irq_description = "serial 1 dma rec",
329 #else
330 .dma_in_enabled = 0,
331 .dma_in_enabled = 0,
332 .dma_in_nbr = UINT_MAX,
333 .dma_in_irq_nbr = 0,
334 .dma_in_irq_flags = 0,
335 .dma_in_irq_description = NULL,
336 #endif
337 #else
338 .enabled = 0,
339 .io_if_description = NULL,
340 .dma_in_irq_nbr = 0,
341 .dma_out_enabled = 0,
342 .dma_in_enabled = 0
343 #endif
344 }, /* ttyS1 */
345
346 { .baud = DEF_BAUD,
347 .ioport = (unsigned char *)R_SERIAL2_CTRL,
348 .irq = 1U << 4, /* uses DMA 2 and 3 */
349 .oclrintradr = R_DMA_CH2_CLR_INTR,
350 .ofirstadr = R_DMA_CH2_FIRST,
351 .ocmdadr = R_DMA_CH2_CMD,
352 .ostatusadr = R_DMA_CH2_STATUS,
353 .iclrintradr = R_DMA_CH3_CLR_INTR,
354 .ifirstadr = R_DMA_CH3_FIRST,
355 .icmdadr = R_DMA_CH3_CMD,
356 .idescradr = R_DMA_CH3_DESCR,
357 .flags = STD_FLAGS,
358 .rx_ctrl = DEF_RX,
359 .tx_ctrl = DEF_TX,
360 .iseteop = 0,
361 .dma_owner = dma_ser2,
362 .io_if = if_serial_2,
363 #ifdef CONFIG_ETRAX_SERIAL_PORT2
364 .enabled = 1,
365 .io_if_description = "ser2",
366 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
367 .dma_out_enabled = 1,
368 .dma_out_nbr = SER2_TX_DMA_NBR,
369 .dma_out_irq_nbr = SER2_DMA_TX_IRQ_NBR,
370 .dma_out_irq_flags = IRQF_DISABLED,
371 .dma_out_irq_description = "serial 2 dma tr",
372 #else
373 .dma_out_enabled = 0,
374 .dma_out_nbr = UINT_MAX,
375 .dma_out_irq_nbr = 0,
376 .dma_out_irq_flags = 0,
377 .dma_out_irq_description = NULL,
378 #endif
379 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
380 .dma_in_enabled = 1,
381 .dma_in_nbr = SER2_RX_DMA_NBR,
382 .dma_in_irq_nbr = SER2_DMA_RX_IRQ_NBR,
383 .dma_in_irq_flags = IRQF_DISABLED,
384 .dma_in_irq_description = "serial 2 dma rec",
385 #else
386 .dma_in_enabled = 0,
387 .dma_in_nbr = UINT_MAX,
388 .dma_in_irq_nbr = 0,
389 .dma_in_irq_flags = 0,
390 .dma_in_irq_description = NULL,
391 #endif
392 #else
393 .enabled = 0,
394 .io_if_description = NULL,
395 .dma_out_enabled = 0,
396 .dma_in_enabled = 0
397 #endif
398 }, /* ttyS2 */
399
400 { .baud = DEF_BAUD,
401 .ioport = (unsigned char *)R_SERIAL3_CTRL,
402 .irq = 1U << 8, /* uses DMA 4 and 5 */
403 .oclrintradr = R_DMA_CH4_CLR_INTR,
404 .ofirstadr = R_DMA_CH4_FIRST,
405 .ocmdadr = R_DMA_CH4_CMD,
406 .ostatusadr = R_DMA_CH4_STATUS,
407 .iclrintradr = R_DMA_CH5_CLR_INTR,
408 .ifirstadr = R_DMA_CH5_FIRST,
409 .icmdadr = R_DMA_CH5_CMD,
410 .idescradr = R_DMA_CH5_DESCR,
411 .flags = STD_FLAGS,
412 .rx_ctrl = DEF_RX,
413 .tx_ctrl = DEF_TX,
414 .iseteop = 1,
415 .dma_owner = dma_ser3,
416 .io_if = if_serial_3,
417 #ifdef CONFIG_ETRAX_SERIAL_PORT3
418 .enabled = 1,
419 .io_if_description = "ser3",
420 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
421 .dma_out_enabled = 1,
422 .dma_out_nbr = SER3_TX_DMA_NBR,
423 .dma_out_irq_nbr = SER3_DMA_TX_IRQ_NBR,
424 .dma_out_irq_flags = IRQF_DISABLED,
425 .dma_out_irq_description = "serial 3 dma tr",
426 #else
427 .dma_out_enabled = 0,
428 .dma_out_nbr = UINT_MAX,
429 .dma_out_irq_nbr = 0,
430 .dma_out_irq_flags = 0,
431 .dma_out_irq_description = NULL,
432 #endif
433 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
434 .dma_in_enabled = 1,
435 .dma_in_nbr = SER3_RX_DMA_NBR,
436 .dma_in_irq_nbr = SER3_DMA_RX_IRQ_NBR,
437 .dma_in_irq_flags = IRQF_DISABLED,
438 .dma_in_irq_description = "serial 3 dma rec",
439 #else
440 .dma_in_enabled = 0,
441 .dma_in_nbr = UINT_MAX,
442 .dma_in_irq_nbr = 0,
443 .dma_in_irq_flags = 0,
444 .dma_in_irq_description = NULL
445 #endif
446 #else
447 .enabled = 0,
448 .io_if_description = NULL,
449 .dma_out_enabled = 0,
450 .dma_in_enabled = 0
451 #endif
452 } /* ttyS3 */
453 #endif
454 };
455
456
457 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
458
459 static struct ktermios *serial_termios[NR_PORTS];
460 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
461 static struct fast_timer fast_timers[NR_PORTS];
462 #endif
463
464 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
465 #define PROCSTAT(x) x
466 struct ser_statistics_type {
467 int overrun_cnt;
468 int early_errors_cnt;
469 int ser_ints_ok_cnt;
470 int errors_cnt;
471 unsigned long int processing_flip;
472 unsigned long processing_flip_still_room;
473 unsigned long int timeout_flush_cnt;
474 int rx_dma_ints;
475 int tx_dma_ints;
476 int rx_tot;
477 int tx_tot;
478 };
479
480 static struct ser_statistics_type ser_stat[NR_PORTS];
481
482 #else
483
484 #define PROCSTAT(x)
485
486 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
487
488 /* RS-485 */
489 #if defined(CONFIG_ETRAX_RS485)
490 #ifdef CONFIG_ETRAX_FAST_TIMER
491 static struct fast_timer fast_timers_rs485[NR_PORTS];
492 #endif
493 #if defined(CONFIG_ETRAX_RS485_ON_PA)
494 static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
495 #endif
496 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
497 static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
498 #endif
499 #endif
500
501 /* Info and macros needed for each ports extra control/status signals. */
502 #define E100_STRUCT_PORT(line, pinname) \
503 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
504 (R_PORT_PA_DATA): ( \
505 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
506 (R_PORT_PB_DATA):&dummy_ser[line]))
507
508 #define E100_STRUCT_SHADOW(line, pinname) \
509 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
510 (&port_pa_data_shadow): ( \
511 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
512 (&port_pb_data_shadow):&dummy_ser[line]))
513 #define E100_STRUCT_MASK(line, pinname) \
514 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
515 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
516 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
517 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
518
519 #define DUMMY_DTR_MASK 1
520 #define DUMMY_RI_MASK 2
521 #define DUMMY_DSR_MASK 4
522 #define DUMMY_CD_MASK 8
523 static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
524
525 /* If not all status pins are used or disabled, use mixed mode */
526 #ifdef CONFIG_ETRAX_SERIAL_PORT0
527
528 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
529
530 #if SER0_PA_BITSUM != -4
531 # if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
532 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
533 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
534 # endif
535 # endif
536 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
537 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
538 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
539 # endif
540 # endif
541 # if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
542 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
543 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
544 # endif
545 # endif
546 # if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
547 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
548 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
549 # endif
550 # endif
551 #endif
552
553 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
554
555 #if SER0_PB_BITSUM != -4
556 # if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
557 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
558 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
559 # endif
560 # endif
561 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
562 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
563 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
564 # endif
565 # endif
566 # if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
567 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
568 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
569 # endif
570 # endif
571 # if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
572 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
573 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
574 # endif
575 # endif
576 #endif
577
578 #endif /* PORT0 */
579
580
581 #ifdef CONFIG_ETRAX_SERIAL_PORT1
582
583 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
584
585 #if SER1_PA_BITSUM != -4
586 # if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
587 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
588 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
589 # endif
590 # endif
591 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
592 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
593 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
594 # endif
595 # endif
596 # if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
597 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
598 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
599 # endif
600 # endif
601 # if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
602 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
603 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
604 # endif
605 # endif
606 #endif
607
608 #define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
609
610 #if SER1_PB_BITSUM != -4
611 # if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
612 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
613 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
614 # endif
615 # endif
616 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
617 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
618 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
619 # endif
620 # endif
621 # if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
622 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
623 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
624 # endif
625 # endif
626 # if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
627 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
628 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
629 # endif
630 # endif
631 #endif
632
633 #endif /* PORT1 */
634
635 #ifdef CONFIG_ETRAX_SERIAL_PORT2
636
637 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
638
639 #if SER2_PA_BITSUM != -4
640 # if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
641 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
642 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
643 # endif
644 # endif
645 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
646 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
647 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
648 # endif
649 # endif
650 # if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
651 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
652 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
653 # endif
654 # endif
655 # if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
656 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
657 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
658 # endif
659 # endif
660 #endif
661
662 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
663
664 #if SER2_PB_BITSUM != -4
665 # if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
666 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
667 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
668 # endif
669 # endif
670 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
671 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
672 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
673 # endif
674 # endif
675 # if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
676 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
677 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
678 # endif
679 # endif
680 # if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
681 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
682 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
683 # endif
684 # endif
685 #endif
686
687 #endif /* PORT2 */
688
689 #ifdef CONFIG_ETRAX_SERIAL_PORT3
690
691 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
692
693 #if SER3_PA_BITSUM != -4
694 # if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
695 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
696 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
697 # endif
698 # endif
699 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
700 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
701 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
702 # endif
703 # endif
704 # if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
705 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
706 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
707 # endif
708 # endif
709 # if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
710 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
711 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
712 # endif
713 # endif
714 #endif
715
716 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
717
718 #if SER3_PB_BITSUM != -4
719 # if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
720 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
721 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
722 # endif
723 # endif
724 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
725 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
726 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
727 # endif
728 # endif
729 # if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
730 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
731 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
732 # endif
733 # endif
734 # if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
735 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
736 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
737 # endif
738 # endif
739 #endif
740
741 #endif /* PORT3 */
742
743
744 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
745 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
746 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
747 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
748 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
749 #endif
750
751 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
752 /* The pins can be mixed on PA and PB */
753 #define CONTROL_PINS_PORT_NOT_USED(line) \
754 &dummy_ser[line], &dummy_ser[line], \
755 &dummy_ser[line], &dummy_ser[line], \
756 &dummy_ser[line], &dummy_ser[line], \
757 &dummy_ser[line], &dummy_ser[line], \
758 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
759
760
761 struct control_pins
762 {
763 volatile unsigned char *dtr_port;
764 unsigned char *dtr_shadow;
765 volatile unsigned char *ri_port;
766 unsigned char *ri_shadow;
767 volatile unsigned char *dsr_port;
768 unsigned char *dsr_shadow;
769 volatile unsigned char *cd_port;
770 unsigned char *cd_shadow;
771
772 unsigned char dtr_mask;
773 unsigned char ri_mask;
774 unsigned char dsr_mask;
775 unsigned char cd_mask;
776 };
777
778 static const struct control_pins e100_modem_pins[NR_PORTS] =
779 {
780 /* Ser 0 */
781 {
782 #ifdef CONFIG_ETRAX_SERIAL_PORT0
783 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
784 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
785 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
786 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
787 E100_STRUCT_MASK(0,DTR),
788 E100_STRUCT_MASK(0,RI),
789 E100_STRUCT_MASK(0,DSR),
790 E100_STRUCT_MASK(0,CD)
791 #else
792 CONTROL_PINS_PORT_NOT_USED(0)
793 #endif
794 },
795
796 /* Ser 1 */
797 {
798 #ifdef CONFIG_ETRAX_SERIAL_PORT1
799 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
800 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
801 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
802 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
803 E100_STRUCT_MASK(1,DTR),
804 E100_STRUCT_MASK(1,RI),
805 E100_STRUCT_MASK(1,DSR),
806 E100_STRUCT_MASK(1,CD)
807 #else
808 CONTROL_PINS_PORT_NOT_USED(1)
809 #endif
810 },
811
812 /* Ser 2 */
813 {
814 #ifdef CONFIG_ETRAX_SERIAL_PORT2
815 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
816 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
817 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
818 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
819 E100_STRUCT_MASK(2,DTR),
820 E100_STRUCT_MASK(2,RI),
821 E100_STRUCT_MASK(2,DSR),
822 E100_STRUCT_MASK(2,CD)
823 #else
824 CONTROL_PINS_PORT_NOT_USED(2)
825 #endif
826 },
827
828 /* Ser 3 */
829 {
830 #ifdef CONFIG_ETRAX_SERIAL_PORT3
831 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
832 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
833 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
834 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
835 E100_STRUCT_MASK(3,DTR),
836 E100_STRUCT_MASK(3,RI),
837 E100_STRUCT_MASK(3,DSR),
838 E100_STRUCT_MASK(3,CD)
839 #else
840 CONTROL_PINS_PORT_NOT_USED(3)
841 #endif
842 }
843 };
844 #else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
845
846 /* All pins are on either PA or PB for each serial port */
847 #define CONTROL_PINS_PORT_NOT_USED(line) \
848 &dummy_ser[line], &dummy_ser[line], \
849 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
850
851
852 struct control_pins
853 {
854 volatile unsigned char *port;
855 unsigned char *shadow;
856
857 unsigned char dtr_mask;
858 unsigned char ri_mask;
859 unsigned char dsr_mask;
860 unsigned char cd_mask;
861 };
862
863 #define dtr_port port
864 #define dtr_shadow shadow
865 #define ri_port port
866 #define ri_shadow shadow
867 #define dsr_port port
868 #define dsr_shadow shadow
869 #define cd_port port
870 #define cd_shadow shadow
871
872 static const struct control_pins e100_modem_pins[NR_PORTS] =
873 {
874 /* Ser 0 */
875 {
876 #ifdef CONFIG_ETRAX_SERIAL_PORT0
877 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
878 E100_STRUCT_MASK(0,DTR),
879 E100_STRUCT_MASK(0,RI),
880 E100_STRUCT_MASK(0,DSR),
881 E100_STRUCT_MASK(0,CD)
882 #else
883 CONTROL_PINS_PORT_NOT_USED(0)
884 #endif
885 },
886
887 /* Ser 1 */
888 {
889 #ifdef CONFIG_ETRAX_SERIAL_PORT1
890 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
891 E100_STRUCT_MASK(1,DTR),
892 E100_STRUCT_MASK(1,RI),
893 E100_STRUCT_MASK(1,DSR),
894 E100_STRUCT_MASK(1,CD)
895 #else
896 CONTROL_PINS_PORT_NOT_USED(1)
897 #endif
898 },
899
900 /* Ser 2 */
901 {
902 #ifdef CONFIG_ETRAX_SERIAL_PORT2
903 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
904 E100_STRUCT_MASK(2,DTR),
905 E100_STRUCT_MASK(2,RI),
906 E100_STRUCT_MASK(2,DSR),
907 E100_STRUCT_MASK(2,CD)
908 #else
909 CONTROL_PINS_PORT_NOT_USED(2)
910 #endif
911 },
912
913 /* Ser 3 */
914 {
915 #ifdef CONFIG_ETRAX_SERIAL_PORT3
916 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
917 E100_STRUCT_MASK(3,DTR),
918 E100_STRUCT_MASK(3,RI),
919 E100_STRUCT_MASK(3,DSR),
920 E100_STRUCT_MASK(3,CD)
921 #else
922 CONTROL_PINS_PORT_NOT_USED(3)
923 #endif
924 }
925 };
926 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
927
928 #define E100_RTS_MASK 0x20
929 #define E100_CTS_MASK 0x40
930
931 /* All serial port signals are active low:
932 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
933 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
934 *
935 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
936 */
937
938 /* Output */
939 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
940 /* Input */
941 #define E100_CTS_GET(info) ((info)->ioport[REG_STATUS] & E100_CTS_MASK)
942
943 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
944 /* Is an output */
945 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
946
947 /* Normally inputs */
948 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
949 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
950
951 /* Input */
952 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
953
954
955 /*
956 * tmp_buf is used as a temporary buffer by serial_write. We need to
957 * lock it in case the memcpy_fromfs blocks while swapping in a page,
958 * and some other program tries to do a serial write at the same time.
959 * Since the lock will only come under contention when the system is
960 * swapping and available memory is low, it makes sense to share one
961 * buffer across all the serial ports, since it significantly saves
962 * memory if large numbers of serial ports are open.
963 */
964 static unsigned char *tmp_buf;
965 static DEFINE_MUTEX(tmp_buf_mutex);
966
967 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
968 static void update_char_time(struct e100_serial * info)
969 {
970 tcflag_t cflags = info->port.tty->termios->c_cflag;
971 int bits;
972
973 /* calc. number of bits / data byte */
974 /* databits + startbit and 1 stopbit */
975 if ((cflags & CSIZE) == CS7)
976 bits = 9;
977 else
978 bits = 10;
979
980 if (cflags & CSTOPB) /* 2 stopbits ? */
981 bits++;
982
983 if (cflags & PARENB) /* parity bit ? */
984 bits++;
985
986 /* calc timeout */
987 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
988 info->flush_time_usec = 4*info->char_time_usec;
989 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
990 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
991
992 }
993
994 /*
995 * This function maps from the Bxxxx defines in asm/termbits.h into real
996 * baud rates.
997 */
998
999 static int
1000 cflag_to_baud(unsigned int cflag)
1001 {
1002 static int baud_table[] = {
1003 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1004 4800, 9600, 19200, 38400 };
1005
1006 static int ext_baud_table[] = {
1007 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1008 0, 0, 0, 0, 0, 0, 0, 0 };
1009
1010 if (cflag & CBAUDEX)
1011 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1012 else
1013 return baud_table[cflag & CBAUD];
1014 }
1015
1016 /* and this maps to an etrax100 hardware baud constant */
1017
1018 static unsigned char
1019 cflag_to_etrax_baud(unsigned int cflag)
1020 {
1021 char retval;
1022
1023 static char baud_table[] = {
1024 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1025
1026 static char ext_baud_table[] = {
1027 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1028
1029 if (cflag & CBAUDEX)
1030 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1031 else
1032 retval = baud_table[cflag & CBAUD];
1033
1034 if (retval < 0) {
1035 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1036 retval = 5; /* choose default 9600 instead */
1037 }
1038
1039 return retval | (retval << 4); /* choose same for both TX and RX */
1040 }
1041
1042
1043 /* Various static support functions */
1044
1045 /* Functions to set or clear DTR/RTS on the requested line */
1046 /* It is complicated by the fact that RTS is a serial port register, while
1047 * DTR might not be implemented in the HW at all, and if it is, it can be on
1048 * any general port.
1049 */
1050
1051
1052 static inline void
1053 e100_dtr(struct e100_serial *info, int set)
1054 {
1055 #ifndef CONFIG_SVINTO_SIM
1056 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1057
1058 #ifdef SERIAL_DEBUG_IO
1059 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1060 printk("ser%i shadow before 0x%02X get: %i\n",
1061 info->line, *e100_modem_pins[info->line].dtr_shadow,
1062 E100_DTR_GET(info));
1063 #endif
1064 /* DTR is active low */
1065 {
1066 unsigned long flags;
1067
1068 local_irq_save(flags);
1069 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1070 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1071 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1072 local_irq_restore(flags);
1073 }
1074
1075 #ifdef SERIAL_DEBUG_IO
1076 printk("ser%i shadow after 0x%02X get: %i\n",
1077 info->line, *e100_modem_pins[info->line].dtr_shadow,
1078 E100_DTR_GET(info));
1079 #endif
1080 #endif
1081 }
1082
1083 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1084 * 0=0V , 1=3.3V
1085 */
1086 static inline void
1087 e100_rts(struct e100_serial *info, int set)
1088 {
1089 #ifndef CONFIG_SVINTO_SIM
1090 unsigned long flags;
1091 local_irq_save(flags);
1092 info->rx_ctrl &= ~E100_RTS_MASK;
1093 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1094 info->ioport[REG_REC_CTRL] = info->rx_ctrl;
1095 local_irq_restore(flags);
1096 #ifdef SERIAL_DEBUG_IO
1097 printk("ser%i rts %i\n", info->line, set);
1098 #endif
1099 #endif
1100 }
1101
1102
1103 /* If this behaves as a modem, RI and CD is an output */
1104 static inline void
1105 e100_ri_out(struct e100_serial *info, int set)
1106 {
1107 #ifndef CONFIG_SVINTO_SIM
1108 /* RI is active low */
1109 {
1110 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1111 unsigned long flags;
1112
1113 local_irq_save(flags);
1114 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1115 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1116 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1117 local_irq_restore(flags);
1118 }
1119 #endif
1120 }
1121 static inline void
1122 e100_cd_out(struct e100_serial *info, int set)
1123 {
1124 #ifndef CONFIG_SVINTO_SIM
1125 /* CD is active low */
1126 {
1127 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1128 unsigned long flags;
1129
1130 local_irq_save(flags);
1131 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1132 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1133 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1134 local_irq_restore(flags);
1135 }
1136 #endif
1137 }
1138
1139 static inline void
1140 e100_disable_rx(struct e100_serial *info)
1141 {
1142 #ifndef CONFIG_SVINTO_SIM
1143 /* disable the receiver */
1144 info->ioport[REG_REC_CTRL] =
1145 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1146 #endif
1147 }
1148
1149 static inline void
1150 e100_enable_rx(struct e100_serial *info)
1151 {
1152 #ifndef CONFIG_SVINTO_SIM
1153 /* enable the receiver */
1154 info->ioport[REG_REC_CTRL] =
1155 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1156 #endif
1157 }
1158
1159 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1160
1161 static inline void
1162 e100_disable_rxdma_irq(struct e100_serial *info)
1163 {
1164 #ifdef SERIAL_DEBUG_INTR
1165 printk("rxdma_irq(%d): 0\n",info->line);
1166 #endif
1167 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1168 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1169 }
1170
1171 static inline void
1172 e100_enable_rxdma_irq(struct e100_serial *info)
1173 {
1174 #ifdef SERIAL_DEBUG_INTR
1175 printk("rxdma_irq(%d): 1\n",info->line);
1176 #endif
1177 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1178 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1179 }
1180
1181 /* the tx DMA uses only dma_descr interrupt */
1182
1183 static void e100_disable_txdma_irq(struct e100_serial *info)
1184 {
1185 #ifdef SERIAL_DEBUG_INTR
1186 printk("txdma_irq(%d): 0\n",info->line);
1187 #endif
1188 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1189 *R_IRQ_MASK2_CLR = info->irq;
1190 }
1191
1192 static void e100_enable_txdma_irq(struct e100_serial *info)
1193 {
1194 #ifdef SERIAL_DEBUG_INTR
1195 printk("txdma_irq(%d): 1\n",info->line);
1196 #endif
1197 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1198 *R_IRQ_MASK2_SET = info->irq;
1199 }
1200
1201 static void e100_disable_txdma_channel(struct e100_serial *info)
1202 {
1203 unsigned long flags;
1204
1205 /* Disable output DMA channel for the serial port in question
1206 * ( set to something other than serialX)
1207 */
1208 local_irq_save(flags);
1209 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1210 if (info->line == 0) {
1211 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1212 IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1213 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1214 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1215 }
1216 } else if (info->line == 1) {
1217 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1218 IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1219 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1220 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1221 }
1222 } else if (info->line == 2) {
1223 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1224 IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1225 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1226 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1227 }
1228 } else if (info->line == 3) {
1229 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1230 IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1231 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1232 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1233 }
1234 }
1235 *R_GEN_CONFIG = genconfig_shadow;
1236 local_irq_restore(flags);
1237 }
1238
1239
1240 static void e100_enable_txdma_channel(struct e100_serial *info)
1241 {
1242 unsigned long flags;
1243
1244 local_irq_save(flags);
1245 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1246 /* Enable output DMA channel for the serial port in question */
1247 if (info->line == 0) {
1248 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1249 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1250 } else if (info->line == 1) {
1251 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1252 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1253 } else if (info->line == 2) {
1254 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1255 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1256 } else if (info->line == 3) {
1257 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1258 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1259 }
1260 *R_GEN_CONFIG = genconfig_shadow;
1261 local_irq_restore(flags);
1262 }
1263
1264 static void e100_disable_rxdma_channel(struct e100_serial *info)
1265 {
1266 unsigned long flags;
1267
1268 /* Disable input DMA channel for the serial port in question
1269 * ( set to something other than serialX)
1270 */
1271 local_irq_save(flags);
1272 if (info->line == 0) {
1273 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1274 IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1275 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1276 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1277 }
1278 } else if (info->line == 1) {
1279 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1280 IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1281 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1282 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1283 }
1284 } else if (info->line == 2) {
1285 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1286 IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1287 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1288 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1289 }
1290 } else if (info->line == 3) {
1291 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1292 IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1293 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1294 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1295 }
1296 }
1297 *R_GEN_CONFIG = genconfig_shadow;
1298 local_irq_restore(flags);
1299 }
1300
1301
1302 static void e100_enable_rxdma_channel(struct e100_serial *info)
1303 {
1304 unsigned long flags;
1305
1306 local_irq_save(flags);
1307 /* Enable input DMA channel for the serial port in question */
1308 if (info->line == 0) {
1309 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1310 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1311 } else if (info->line == 1) {
1312 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1313 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1314 } else if (info->line == 2) {
1315 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1316 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1317 } else if (info->line == 3) {
1318 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1319 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1320 }
1321 *R_GEN_CONFIG = genconfig_shadow;
1322 local_irq_restore(flags);
1323 }
1324
1325 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1326 /* in order to detect and fix errors on the first byte
1327 we have to use the serial interrupts as well. */
1328
1329 static inline void
1330 e100_disable_serial_data_irq(struct e100_serial *info)
1331 {
1332 #ifdef SERIAL_DEBUG_INTR
1333 printk("ser_irq(%d): 0\n",info->line);
1334 #endif
1335 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1336 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1337 }
1338
1339 static inline void
1340 e100_enable_serial_data_irq(struct e100_serial *info)
1341 {
1342 #ifdef SERIAL_DEBUG_INTR
1343 printk("ser_irq(%d): 1\n",info->line);
1344 printk("**** %d = %d\n",
1345 (8+2*info->line),
1346 (1U << (8+2*info->line)));
1347 #endif
1348 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1349 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1350 }
1351 #endif
1352
1353 static inline void
1354 e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1355 {
1356 #ifdef SERIAL_DEBUG_INTR
1357 printk("ser_tx_irq(%d): 0\n",info->line);
1358 #endif
1359 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1360 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1361 }
1362
1363 static inline void
1364 e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1365 {
1366 #ifdef SERIAL_DEBUG_INTR
1367 printk("ser_tx_irq(%d): 1\n",info->line);
1368 printk("**** %d = %d\n",
1369 (8+1+2*info->line),
1370 (1U << (8+1+2*info->line)));
1371 #endif
1372 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1373 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1374 }
1375
1376 static inline void e100_enable_rx_irq(struct e100_serial *info)
1377 {
1378 if (info->uses_dma_in)
1379 e100_enable_rxdma_irq(info);
1380 else
1381 e100_enable_serial_data_irq(info);
1382 }
1383 static inline void e100_disable_rx_irq(struct e100_serial *info)
1384 {
1385 if (info->uses_dma_in)
1386 e100_disable_rxdma_irq(info);
1387 else
1388 e100_disable_serial_data_irq(info);
1389 }
1390
1391 #if defined(CONFIG_ETRAX_RS485)
1392 /* Enable RS-485 mode on selected port. This is UGLY. */
1393 static int
1394 e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r)
1395 {
1396 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1397
1398 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1399 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1400 #endif
1401 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1402 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1403 rs485_port_g_bit, 1);
1404 #endif
1405 #if defined(CONFIG_ETRAX_RS485_LTC1387)
1406 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1407 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1408 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1409 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1410 #endif
1411
1412 info->rs485.rts_on_send = 0x01 & r->rts_on_send;
1413 info->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
1414 if (r->delay_rts_before_send >= 1000)
1415 info->rs485.delay_rts_before_send = 1000;
1416 else
1417 info->rs485.delay_rts_before_send = r->delay_rts_before_send;
1418 info->rs485.enabled = r->enabled;
1419 /* printk("rts: on send = %i, after = %i, enabled = %i",
1420 info->rs485.rts_on_send,
1421 info->rs485.rts_after_sent,
1422 info->rs485.enabled
1423 );
1424 */
1425 return 0;
1426 }
1427
1428 static int
1429 e100_write_rs485(struct tty_struct *tty,
1430 const unsigned char *buf, int count)
1431 {
1432 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1433 int old_enabled = info->rs485.enabled;
1434
1435 /* rs485 is always implicitly enabled if we're using the ioctl()
1436 * but it doesn't have to be set in the rs485_control
1437 * (to be backward compatible with old apps)
1438 * So we store, set and restore it.
1439 */
1440 info->rs485.enabled = 1;
1441 /* rs_write now deals with RS485 if enabled */
1442 count = rs_write(tty, buf, count);
1443 info->rs485.enabled = old_enabled;
1444 return count;
1445 }
1446
1447 #ifdef CONFIG_ETRAX_FAST_TIMER
1448 /* Timer function to toggle RTS when using FAST_TIMER */
1449 static void rs485_toggle_rts_timer_function(unsigned long data)
1450 {
1451 struct e100_serial *info = (struct e100_serial *)data;
1452
1453 fast_timers_rs485[info->line].function = NULL;
1454 e100_rts(info, info->rs485.rts_after_sent);
1455 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1456 e100_enable_rx(info);
1457 e100_enable_rx_irq(info);
1458 #endif
1459 }
1460 #endif
1461 #endif /* CONFIG_ETRAX_RS485 */
1462
1463 /*
1464 * ------------------------------------------------------------
1465 * rs_stop() and rs_start()
1466 *
1467 * This routines are called before setting or resetting tty->stopped.
1468 * They enable or disable transmitter using the XOFF registers, as necessary.
1469 * ------------------------------------------------------------
1470 */
1471
1472 static void
1473 rs_stop(struct tty_struct *tty)
1474 {
1475 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1476 if (info) {
1477 unsigned long flags;
1478 unsigned long xoff;
1479
1480 local_irq_save(flags);
1481 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1482 CIRC_CNT(info->xmit.head,
1483 info->xmit.tail,SERIAL_XMIT_SIZE)));
1484
1485 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char,
1486 STOP_CHAR(info->port.tty));
1487 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1488 if (tty->termios->c_iflag & IXON ) {
1489 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1490 }
1491
1492 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
1493 local_irq_restore(flags);
1494 }
1495 }
1496
1497 static void
1498 rs_start(struct tty_struct *tty)
1499 {
1500 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1501 if (info) {
1502 unsigned long flags;
1503 unsigned long xoff;
1504
1505 local_irq_save(flags);
1506 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1507 CIRC_CNT(info->xmit.head,
1508 info->xmit.tail,SERIAL_XMIT_SIZE)));
1509 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1510 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1511 if (tty->termios->c_iflag & IXON ) {
1512 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1513 }
1514
1515 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
1516 if (!info->uses_dma_out &&
1517 info->xmit.head != info->xmit.tail && info->xmit.buf)
1518 e100_enable_serial_tx_ready_irq(info);
1519
1520 local_irq_restore(flags);
1521 }
1522 }
1523
1524 /*
1525 * ----------------------------------------------------------------------
1526 *
1527 * Here starts the interrupt handling routines. All of the following
1528 * subroutines are declared as inline and are folded into
1529 * rs_interrupt(). They were separated out for readability's sake.
1530 *
1531 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1532 * runs with interrupts turned off. People who may want to modify
1533 * rs_interrupt() should try to keep the interrupt handler as fast as
1534 * possible. After you are done making modifications, it is not a bad
1535 * idea to do:
1536 *
1537 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1538 *
1539 * and look at the resulting assemble code in serial.s.
1540 *
1541 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1542 * -----------------------------------------------------------------------
1543 */
1544
1545 /*
1546 * This routine is used by the interrupt handler to schedule
1547 * processing in the software interrupt portion of the driver.
1548 */
1549 static void rs_sched_event(struct e100_serial *info, int event)
1550 {
1551 if (info->event & (1 << event))
1552 return;
1553 info->event |= 1 << event;
1554 schedule_work(&info->work);
1555 }
1556
1557 /* The output DMA channel is free - use it to send as many chars as possible
1558 * NOTES:
1559 * We don't pay attention to info->x_char, which means if the TTY wants to
1560 * use XON/XOFF it will set info->x_char but we won't send any X char!
1561 *
1562 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1563 * buffer containing the X char, and skip updating xmit. We'd also have to
1564 * check if the last sent char was the X char when we enter this function
1565 * the next time, to avoid updating xmit with the sent X value.
1566 */
1567
1568 static void
1569 transmit_chars_dma(struct e100_serial *info)
1570 {
1571 unsigned int c, sentl;
1572 struct etrax_dma_descr *descr;
1573
1574 #ifdef CONFIG_SVINTO_SIM
1575 /* This will output too little if tail is not 0 always since
1576 * we don't reloop to send the other part. Anyway this SHOULD be a
1577 * no-op - transmit_chars_dma would never really be called during sim
1578 * since rs_write does not write into the xmit buffer then.
1579 */
1580 if (info->xmit.tail)
1581 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1582 if (info->xmit.head != info->xmit.tail) {
1583 SIMCOUT(info->xmit.buf + info->xmit.tail,
1584 CIRC_CNT(info->xmit.head,
1585 info->xmit.tail,
1586 SERIAL_XMIT_SIZE));
1587 info->xmit.head = info->xmit.tail; /* move back head */
1588 info->tr_running = 0;
1589 }
1590 return;
1591 #endif
1592 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1593 *info->oclrintradr =
1594 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1595 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1596
1597 #ifdef SERIAL_DEBUG_INTR
1598 if (info->line == SERIAL_DEBUG_LINE)
1599 printk("tc\n");
1600 #endif
1601 if (!info->tr_running) {
1602 /* weirdo... we shouldn't get here! */
1603 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1604 return;
1605 }
1606
1607 descr = &info->tr_descr;
1608
1609 /* first get the amount of bytes sent during the last DMA transfer,
1610 and update xmit accordingly */
1611
1612 /* if the stop bit was not set, all data has been sent */
1613 if (!(descr->status & d_stop)) {
1614 sentl = descr->sw_len;
1615 } else
1616 /* otherwise we find the amount of data sent here */
1617 sentl = descr->hw_len;
1618
1619 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1620
1621 /* update stats */
1622 info->icount.tx += sentl;
1623
1624 /* update xmit buffer */
1625 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1626
1627 /* if there is only a few chars left in the buf, wake up the blocked
1628 write if any */
1629 if (CIRC_CNT(info->xmit.head,
1630 info->xmit.tail,
1631 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
1632 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
1633
1634 /* find out the largest amount of consecutive bytes we want to send now */
1635
1636 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
1637
1638 /* Don't send all in one DMA transfer - divide it so we wake up
1639 * application before all is sent
1640 */
1641
1642 if (c >= 4*WAKEUP_CHARS)
1643 c = c/2;
1644
1645 if (c <= 0) {
1646 /* our job here is done, don't schedule any new DMA transfer */
1647 info->tr_running = 0;
1648
1649 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
1650 if (info->rs485.enabled) {
1651 /* Set a short timer to toggle RTS */
1652 start_one_shot_timer(&fast_timers_rs485[info->line],
1653 rs485_toggle_rts_timer_function,
1654 (unsigned long)info,
1655 info->char_time_usec*2,
1656 "RS-485");
1657 }
1658 #endif /* RS485 */
1659 return;
1660 }
1661
1662 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
1663 /* set up the descriptor correctly for output */
1664 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
1665 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
1666 descr->sw_len = c;
1667 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
1668 descr->status = 0;
1669
1670 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
1671 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
1672
1673 /* DMA is now running (hopefully) */
1674 } /* transmit_chars_dma */
1675
1676 static void
1677 start_transmit(struct e100_serial *info)
1678 {
1679 #if 0
1680 if (info->line == SERIAL_DEBUG_LINE)
1681 printk("x\n");
1682 #endif
1683
1684 info->tr_descr.sw_len = 0;
1685 info->tr_descr.hw_len = 0;
1686 info->tr_descr.status = 0;
1687 info->tr_running = 1;
1688 if (info->uses_dma_out)
1689 transmit_chars_dma(info);
1690 else
1691 e100_enable_serial_tx_ready_irq(info);
1692 } /* start_transmit */
1693
1694 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
1695 static int serial_fast_timer_started = 0;
1696 static int serial_fast_timer_expired = 0;
1697 static void flush_timeout_function(unsigned long data);
1698 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
1699 unsigned long timer_flags; \
1700 local_irq_save(timer_flags); \
1701 if (fast_timers[info->line].function == NULL) { \
1702 serial_fast_timer_started++; \
1703 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
1704 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
1705 start_one_shot_timer(&fast_timers[info->line], \
1706 flush_timeout_function, \
1707 (unsigned long)info, \
1708 (usec), \
1709 string); \
1710 } \
1711 else { \
1712 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
1713 } \
1714 local_irq_restore(timer_flags); \
1715 }
1716 #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
1717
1718 #else
1719 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
1720 #define START_FLUSH_FAST_TIMER(info, string)
1721 #endif
1722
1723 static struct etrax_recv_buffer *
1724 alloc_recv_buffer(unsigned int size)
1725 {
1726 struct etrax_recv_buffer *buffer;
1727
1728 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
1729 return NULL;
1730
1731 buffer->next = NULL;
1732 buffer->length = 0;
1733 buffer->error = TTY_NORMAL;
1734
1735 return buffer;
1736 }
1737
1738 static void
1739 append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
1740 {
1741 unsigned long flags;
1742
1743 local_irq_save(flags);
1744
1745 if (!info->first_recv_buffer)
1746 info->first_recv_buffer = buffer;
1747 else
1748 info->last_recv_buffer->next = buffer;
1749
1750 info->last_recv_buffer = buffer;
1751
1752 info->recv_cnt += buffer->length;
1753 if (info->recv_cnt > info->max_recv_cnt)
1754 info->max_recv_cnt = info->recv_cnt;
1755
1756 local_irq_restore(flags);
1757 }
1758
1759 static int
1760 add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
1761 {
1762 struct etrax_recv_buffer *buffer;
1763 if (info->uses_dma_in) {
1764 if (!(buffer = alloc_recv_buffer(4)))
1765 return 0;
1766
1767 buffer->length = 1;
1768 buffer->error = flag;
1769 buffer->buffer[0] = data;
1770
1771 append_recv_buffer(info, buffer);
1772
1773 info->icount.rx++;
1774 } else {
1775 struct tty_struct *tty = info->port.tty;
1776 tty_insert_flip_char(tty, data, flag);
1777 info->icount.rx++;
1778 }
1779
1780 return 1;
1781 }
1782
1783 static unsigned int handle_descr_data(struct e100_serial *info,
1784 struct etrax_dma_descr *descr,
1785 unsigned int recvl)
1786 {
1787 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
1788
1789 if (info->recv_cnt + recvl > 65536) {
1790 printk(KERN_CRIT
1791 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __func__, recvl);
1792 return 0;
1793 }
1794
1795 buffer->length = recvl;
1796
1797 if (info->errorcode == ERRCODE_SET_BREAK)
1798 buffer->error = TTY_BREAK;
1799 info->errorcode = 0;
1800
1801 append_recv_buffer(info, buffer);
1802
1803 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
1804 panic("%s: Failed to allocate memory for receive buffer!\n", __func__);
1805
1806 descr->buf = virt_to_phys(buffer->buffer);
1807
1808 return recvl;
1809 }
1810
1811 static unsigned int handle_all_descr_data(struct e100_serial *info)
1812 {
1813 struct etrax_dma_descr *descr;
1814 unsigned int recvl;
1815 unsigned int ret = 0;
1816
1817 while (1)
1818 {
1819 descr = &info->rec_descr[info->cur_rec_descr];
1820
1821 if (descr == phys_to_virt(*info->idescradr))
1822 break;
1823
1824 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
1825 info->cur_rec_descr = 0;
1826
1827 /* find out how many bytes were read */
1828
1829 /* if the eop bit was not set, all data has been received */
1830 if (!(descr->status & d_eop)) {
1831 recvl = descr->sw_len;
1832 } else {
1833 /* otherwise we find the amount of data received here */
1834 recvl = descr->hw_len;
1835 }
1836
1837 /* Reset the status information */
1838 descr->status = 0;
1839
1840 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
1841 if (info->port.tty->stopped) {
1842 unsigned char *buf = phys_to_virt(descr->buf);
1843 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
1844 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
1845 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
1846 }
1847 );
1848
1849 /* update stats */
1850 info->icount.rx += recvl;
1851
1852 ret += handle_descr_data(info, descr, recvl);
1853 }
1854
1855 return ret;
1856 }
1857
1858 static void receive_chars_dma(struct e100_serial *info)
1859 {
1860 struct tty_struct *tty;
1861 unsigned char rstat;
1862
1863 #ifdef CONFIG_SVINTO_SIM
1864 /* No receive in the simulator. Will probably be when the rest of
1865 * the serial interface works, and this piece will just be removed.
1866 */
1867 return;
1868 #endif
1869
1870 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1871 *info->iclrintradr =
1872 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1873 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1874
1875 tty = info->port.tty;
1876 if (!tty) /* Something wrong... */
1877 return;
1878
1879 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1880 if (info->uses_dma_in)
1881 e100_enable_serial_data_irq(info);
1882 #endif
1883
1884 if (info->errorcode == ERRCODE_INSERT_BREAK)
1885 add_char_and_flag(info, '\0', TTY_BREAK);
1886
1887 handle_all_descr_data(info);
1888
1889 /* Read the status register to detect errors */
1890 rstat = info->ioport[REG_STATUS];
1891 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
1892 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
1893 }
1894
1895 if (rstat & SER_ERROR_MASK) {
1896 /* If we got an error, we must reset it by reading the
1897 * data_in field
1898 */
1899 unsigned char data = info->ioport[REG_DATA];
1900
1901 PROCSTAT(ser_stat[info->line].errors_cnt++);
1902 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
1903 ((rstat & SER_ERROR_MASK) << 8) | data);
1904
1905 if (rstat & SER_PAR_ERR_MASK)
1906 add_char_and_flag(info, data, TTY_PARITY);
1907 else if (rstat & SER_OVERRUN_MASK)
1908 add_char_and_flag(info, data, TTY_OVERRUN);
1909 else if (rstat & SER_FRAMING_ERR_MASK)
1910 add_char_and_flag(info, data, TTY_FRAME);
1911 }
1912
1913 START_FLUSH_FAST_TIMER(info, "receive_chars");
1914
1915 /* Restart the receiving DMA */
1916 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
1917 }
1918
1919 static int start_recv_dma(struct e100_serial *info)
1920 {
1921 struct etrax_dma_descr *descr = info->rec_descr;
1922 struct etrax_recv_buffer *buffer;
1923 int i;
1924
1925 /* Set up the receiving descriptors */
1926 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
1927 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
1928 panic("%s: Failed to allocate memory for receive buffer!\n", __func__);
1929
1930 descr[i].ctrl = d_int;
1931 descr[i].buf = virt_to_phys(buffer->buffer);
1932 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
1933 descr[i].hw_len = 0;
1934 descr[i].status = 0;
1935 descr[i].next = virt_to_phys(&descr[i+1]);
1936 }
1937
1938 /* Link the last descriptor to the first */
1939 descr[i-1].next = virt_to_phys(&descr[0]);
1940
1941 /* Start with the first descriptor in the list */
1942 info->cur_rec_descr = 0;
1943
1944 /* Start the DMA */
1945 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
1946 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
1947
1948 /* Input DMA should be running now */
1949 return 1;
1950 }
1951
1952 static void
1953 start_receive(struct e100_serial *info)
1954 {
1955 #ifdef CONFIG_SVINTO_SIM
1956 /* No receive in the simulator. Will probably be when the rest of
1957 * the serial interface works, and this piece will just be removed.
1958 */
1959 return;
1960 #endif
1961 if (info->uses_dma_in) {
1962 /* reset the input dma channel to be sure it works */
1963
1964 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
1965 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
1966 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
1967
1968 start_recv_dma(info);
1969 }
1970 }
1971
1972
1973 /* the bits in the MASK2 register are laid out like this:
1974 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
1975 where I is the input channel and O is the output channel for the port.
1976 info->irq is the bit number for the DMAO_DESCR so to check the others we
1977 shift info->irq to the left.
1978 */
1979
1980 /* dma output channel interrupt handler
1981 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
1982 DMA8(ser1) when they have finished a descriptor with the intr flag set.
1983 */
1984
1985 static irqreturn_t
1986 tr_interrupt(int irq, void *dev_id)
1987 {
1988 struct e100_serial *info;
1989 unsigned long ireg;
1990 int i;
1991 int handled = 0;
1992
1993 #ifdef CONFIG_SVINTO_SIM
1994 /* No receive in the simulator. Will probably be when the rest of
1995 * the serial interface works, and this piece will just be removed.
1996 */
1997 {
1998 const char *s = "What? tr_interrupt in simulator??\n";
1999 SIMCOUT(s,strlen(s));
2000 }
2001 return IRQ_HANDLED;
2002 #endif
2003
2004 /* find out the line that caused this irq and get it from rs_table */
2005
2006 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2007
2008 for (i = 0; i < NR_PORTS; i++) {
2009 info = rs_table + i;
2010 if (!info->enabled || !info->uses_dma_out)
2011 continue;
2012 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2013 if (ireg & info->irq) {
2014 handled = 1;
2015 /* we can send a new dma bunch. make it so. */
2016 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
2017 /* Read jiffies_usec first,
2018 * we want this time to be as late as possible
2019 */
2020 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2021 info->last_tx_active_usec = GET_JIFFIES_USEC();
2022 info->last_tx_active = jiffies;
2023 transmit_chars_dma(info);
2024 }
2025
2026 /* FIXME: here we should really check for a change in the
2027 status lines and if so call status_handle(info) */
2028 }
2029 return IRQ_RETVAL(handled);
2030 } /* tr_interrupt */
2031
2032 /* dma input channel interrupt handler */
2033
2034 static irqreturn_t
2035 rec_interrupt(int irq, void *dev_id)
2036 {
2037 struct e100_serial *info;
2038 unsigned long ireg;
2039 int i;
2040 int handled = 0;
2041
2042 #ifdef CONFIG_SVINTO_SIM
2043 /* No receive in the simulator. Will probably be when the rest of
2044 * the serial interface works, and this piece will just be removed.
2045 */
2046 {
2047 const char *s = "What? rec_interrupt in simulator??\n";
2048 SIMCOUT(s,strlen(s));
2049 }
2050 return IRQ_HANDLED;
2051 #endif
2052
2053 /* find out the line that caused this irq and get it from rs_table */
2054
2055 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2056
2057 for (i = 0; i < NR_PORTS; i++) {
2058 info = rs_table + i;
2059 if (!info->enabled || !info->uses_dma_in)
2060 continue;
2061 /* check for both dma_eop and dma_descr for the input dma channel */
2062 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2063 handled = 1;
2064 /* we have received something */
2065 receive_chars_dma(info);
2066 }
2067
2068 /* FIXME: here we should really check for a change in the
2069 status lines and if so call status_handle(info) */
2070 }
2071 return IRQ_RETVAL(handled);
2072 } /* rec_interrupt */
2073
2074 static int force_eop_if_needed(struct e100_serial *info)
2075 {
2076 /* We check data_avail bit to determine if data has
2077 * arrived since last time
2078 */
2079 unsigned char rstat = info->ioport[REG_STATUS];
2080
2081 /* error or datavail? */
2082 if (rstat & SER_ERROR_MASK) {
2083 /* Some error has occurred. If there has been valid data, an
2084 * EOP interrupt will be made automatically. If no data, the
2085 * normal ser_interrupt should be enabled and handle it.
2086 * So do nothing!
2087 */
2088 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2089 rstat | (info->line << 8));
2090 return 0;
2091 }
2092
2093 if (rstat & SER_DATA_AVAIL_MASK) {
2094 /* Ok data, no error, count it */
2095 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2096 rstat | (info->line << 8)));
2097 /* Read data to clear status flags */
2098 (void)info->ioport[REG_DATA];
2099
2100 info->forced_eop = 0;
2101 START_FLUSH_FAST_TIMER(info, "magic");
2102 return 0;
2103 }
2104
2105 /* hit the timeout, force an EOP for the input
2106 * dma channel if we haven't already
2107 */
2108 if (!info->forced_eop) {
2109 info->forced_eop = 1;
2110 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2111 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2112 FORCE_EOP(info);
2113 }
2114
2115 return 1;
2116 }
2117
2118 static void flush_to_flip_buffer(struct e100_serial *info)
2119 {
2120 struct tty_struct *tty;
2121 struct etrax_recv_buffer *buffer;
2122 unsigned long flags;
2123
2124 local_irq_save(flags);
2125 tty = info->port.tty;
2126
2127 if (!tty) {
2128 local_irq_restore(flags);
2129 return;
2130 }
2131
2132 while ((buffer = info->first_recv_buffer) != NULL) {
2133 unsigned int count = buffer->length;
2134
2135 tty_insert_flip_string(tty, buffer->buffer, count);
2136 info->recv_cnt -= count;
2137
2138 if (count == buffer->length) {
2139 info->first_recv_buffer = buffer->next;
2140 kfree(buffer);
2141 } else {
2142 buffer->length -= count;
2143 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2144 buffer->error = TTY_NORMAL;
2145 }
2146 }
2147
2148 if (!info->first_recv_buffer)
2149 info->last_recv_buffer = NULL;
2150
2151 local_irq_restore(flags);
2152
2153 /* This includes a check for low-latency */
2154 tty_flip_buffer_push(tty);
2155 }
2156
2157 static void check_flush_timeout(struct e100_serial *info)
2158 {
2159 /* Flip what we've got (if we can) */
2160 flush_to_flip_buffer(info);
2161
2162 /* We might need to flip later, but not to fast
2163 * since the system is busy processing input... */
2164 if (info->first_recv_buffer)
2165 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2166
2167 /* Force eop last, since data might have come while we're processing
2168 * and if we started the slow timer above, we won't start a fast
2169 * below.
2170 */
2171 force_eop_if_needed(info);
2172 }
2173
2174 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2175 static void flush_timeout_function(unsigned long data)
2176 {
2177 struct e100_serial *info = (struct e100_serial *)data;
2178
2179 fast_timers[info->line].function = NULL;
2180 serial_fast_timer_expired++;
2181 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2182 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2183 check_flush_timeout(info);
2184 }
2185
2186 #else
2187
2188 /* dma fifo/buffer timeout handler
2189 forces an end-of-packet for the dma input channel if no chars
2190 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2191 */
2192
2193 static struct timer_list flush_timer;
2194
2195 static void
2196 timed_flush_handler(unsigned long ptr)
2197 {
2198 struct e100_serial *info;
2199 int i;
2200
2201 #ifdef CONFIG_SVINTO_SIM
2202 return;
2203 #endif
2204
2205 for (i = 0; i < NR_PORTS; i++) {
2206 info = rs_table + i;
2207 if (info->uses_dma_in)
2208 check_flush_timeout(info);
2209 }
2210
2211 /* restart flush timer */
2212 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2213 }
2214 #endif
2215
2216 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2217
2218 /* If there is an error (ie break) when the DMA is running and
2219 * there are no bytes in the fifo the DMA is stopped and we get no
2220 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2221 * transfer, and if it is without error we can turn the serial
2222 * interrupts off.
2223 */
2224
2225 /*
2226 BREAK handling on ETRAX 100:
2227 ETRAX will generate interrupt although there is no stop bit between the
2228 characters.
2229
2230 Depending on how long the break sequence is, the end of the breaksequence
2231 will look differently:
2232 | indicates start/end of a character.
2233
2234 B= Break character (0x00) with framing error.
2235 E= Error byte with parity error received after B characters.
2236 F= "Faked" valid byte received immediately after B characters.
2237 V= Valid byte
2238
2239 1.
2240 B BL ___________________________ V
2241 .._|__________|__________| |valid data |
2242
2243 Multiple frame errors with data == 0x00 (B),
2244 the timing matches up "perfectly" so no extra ending char is detected.
2245 The RXD pin is 1 in the last interrupt, in that case
2246 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2247 know if another byte will come and this really is case 2. below
2248 (e.g F=0xFF or 0xFE)
2249 If RXD pin is 0 we can expect another character (see 2. below).
2250
2251
2252 2.
2253
2254 B B E or F__________________..__ V
2255 .._|__________|__________|______ | |valid data
2256 "valid" or
2257 parity error
2258
2259 Multiple frame errors with data == 0x00 (B),
2260 but the part of the break trigs is interpreted as a start bit (and possibly
2261 some 0 bits followed by a number of 1 bits and a stop bit).
2262 Depending on parity settings etc. this last character can be either
2263 a fake "valid" char (F) or have a parity error (E).
2264
2265 If the character is valid it will be put in the buffer,
2266 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2267 will set the flags so the tty will handle it,
2268 if it's an error byte it will not be put in the buffer
2269 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2270
2271 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2272 of the last faulty char (B) and compares it with the current time:
2273 If the time elapsed time is less then 2*char_time_usec we will assume
2274 it's a faked F char and not a Valid char and set
2275 info->errorcode = ERRCODE_SET_BREAK.
2276
2277 Flaws in the above solution:
2278 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2279 We use the timer to distinguish a F character from a V character,
2280 if a V character is to close after the break we might make the wrong decision.
2281
2282 TODO: The break will be delayed until an F or V character is received.
2283
2284 */
2285
2286 static
2287 struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2288 {
2289 unsigned long data_read;
2290 struct tty_struct *tty = info->port.tty;
2291
2292 if (!tty) {
2293 printk("!NO TTY!\n");
2294 return info;
2295 }
2296
2297 /* Read data and status at the same time */
2298 data_read = *((unsigned long *)&info->ioport[REG_DATA_STATUS32]);
2299 more_data:
2300 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2301 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2302 }
2303 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2304
2305 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2306 IO_MASK(R_SERIAL0_READ, par_err) |
2307 IO_MASK(R_SERIAL0_READ, overrun) )) {
2308 /* An error */
2309 info->last_rx_active_usec = GET_JIFFIES_USEC();
2310 info->last_rx_active = jiffies;
2311 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2312 DLOG_INT_TRIG(
2313 if (!log_int_trig1_pos) {
2314 log_int_trig1_pos = log_int_pos;
2315 log_int(rdpc(), 0, 0);
2316 }
2317 );
2318
2319
2320 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2321 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2322 /* Most likely a break, but we get interrupts over and
2323 * over again.
2324 */
2325
2326 if (!info->break_detected_cnt) {
2327 DEBUG_LOG(info->line, "#BRK start\n", 0);
2328 }
2329 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2330 /* The RX pin is high now, so the break
2331 * must be over, but....
2332 * we can't really know if we will get another
2333 * last byte ending the break or not.
2334 * And we don't know if the byte (if any) will
2335 * have an error or look valid.
2336 */
2337 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2338 info->errorcode = ERRCODE_INSERT_BREAK;
2339 }
2340 info->break_detected_cnt++;
2341 } else {
2342 /* The error does not look like a break, but could be
2343 * the end of one
2344 */
2345 if (info->break_detected_cnt) {
2346 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2347 info->errorcode = ERRCODE_INSERT_BREAK;
2348 } else {
2349 unsigned char data = IO_EXTRACT(R_SERIAL0_READ,
2350 data_in, data_read);
2351 char flag = TTY_NORMAL;
2352 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2353 struct tty_struct *tty = info->port.tty;
2354 tty_insert_flip_char(tty, 0, flag);
2355 info->icount.rx++;
2356 }
2357
2358 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2359 info->icount.parity++;
2360 flag = TTY_PARITY;
2361 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2362 info->icount.overrun++;
2363 flag = TTY_OVERRUN;
2364 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2365 info->icount.frame++;
2366 flag = TTY_FRAME;
2367 }
2368 tty_insert_flip_char(tty, data, flag);
2369 info->errorcode = 0;
2370 }
2371 info->break_detected_cnt = 0;
2372 }
2373 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2374 /* No error */
2375 DLOG_INT_TRIG(
2376 if (!log_int_trig1_pos) {
2377 if (log_int_pos >= log_int_size) {
2378 log_int_pos = 0;
2379 }
2380 log_int_trig0_pos = log_int_pos;
2381 log_int(rdpc(), 0, 0);
2382 }
2383 );
2384 tty_insert_flip_char(tty,
2385 IO_EXTRACT(R_SERIAL0_READ, data_in, data_read),
2386 TTY_NORMAL);
2387 } else {
2388 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
2389 }
2390
2391
2392 info->icount.rx++;
2393 data_read = *((unsigned long *)&info->ioport[REG_DATA_STATUS32]);
2394 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2395 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2396 goto more_data;
2397 }
2398
2399 tty_flip_buffer_push(info->port.tty);
2400 return info;
2401 }
2402
2403 static struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info)
2404 {
2405 unsigned char rstat;
2406
2407 #ifdef SERIAL_DEBUG_INTR
2408 printk("Interrupt from serport %d\n", i);
2409 #endif
2410 /* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2411 if (!info->uses_dma_in) {
2412 return handle_ser_rx_interrupt_no_dma(info);
2413 }
2414 /* DMA is used */
2415 rstat = info->ioport[REG_STATUS];
2416 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2417 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2418 }
2419
2420 if (rstat & SER_ERROR_MASK) {
2421 unsigned char data;
2422
2423 info->last_rx_active_usec = GET_JIFFIES_USEC();
2424 info->last_rx_active = jiffies;
2425 /* If we got an error, we must reset it by reading the
2426 * data_in field
2427 */
2428 data = info->ioport[REG_DATA];
2429 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
2430 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2431 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2432 /* Most likely a break, but we get interrupts over and
2433 * over again.
2434 */
2435
2436 if (!info->break_detected_cnt) {
2437 DEBUG_LOG(info->line, "#BRK start\n", 0);
2438 }
2439 if (rstat & SER_RXD_MASK) {
2440 /* The RX pin is high now, so the break
2441 * must be over, but....
2442 * we can't really know if we will get another
2443 * last byte ending the break or not.
2444 * And we don't know if the byte (if any) will
2445 * have an error or look valid.
2446 */
2447 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2448 info->errorcode = ERRCODE_INSERT_BREAK;
2449 }
2450 info->break_detected_cnt++;
2451 } else {
2452 /* The error does not look like a break, but could be
2453 * the end of one
2454 */
2455 if (info->break_detected_cnt) {
2456 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2457 info->errorcode = ERRCODE_INSERT_BREAK;
2458 } else {
2459 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2460 info->icount.brk++;
2461 add_char_and_flag(info, '\0', TTY_BREAK);
2462 }
2463
2464 if (rstat & SER_PAR_ERR_MASK) {
2465 info->icount.parity++;
2466 add_char_and_flag(info, data, TTY_PARITY);
2467 } else if (rstat & SER_OVERRUN_MASK) {
2468 info->icount.overrun++;
2469 add_char_and_flag(info, data, TTY_OVERRUN);
2470 } else if (rstat & SER_FRAMING_ERR_MASK) {
2471 info->icount.frame++;
2472 add_char_and_flag(info, data, TTY_FRAME);
2473 }
2474
2475 info->errorcode = 0;
2476 }
2477 info->break_detected_cnt = 0;
2478 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2479 ((rstat & SER_ERROR_MASK) << 8) | data);
2480 }
2481 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2482 } else { /* It was a valid byte, now let the DMA do the rest */
2483 unsigned long curr_time_u = GET_JIFFIES_USEC();
2484 unsigned long curr_time = jiffies;
2485
2486 if (info->break_detected_cnt) {
2487 /* Detect if this character is a new valid char or the
2488 * last char in a break sequence: If LSBits are 0 and
2489 * MSBits are high AND the time is close to the
2490 * previous interrupt we should discard it.
2491 */
2492 long elapsed_usec =
2493 (curr_time - info->last_rx_active) * (1000000/HZ) +
2494 curr_time_u - info->last_rx_active_usec;
2495 if (elapsed_usec < 2*info->char_time_usec) {
2496 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2497 /* Report as BREAK (error) and let
2498 * receive_chars_dma() handle it
2499 */
2500 info->errorcode = ERRCODE_SET_BREAK;
2501 } else {
2502 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2503 }
2504 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2505 }
2506
2507 #ifdef SERIAL_DEBUG_INTR
2508 printk("** OK, disabling ser_interrupts\n");
2509 #endif
2510 e100_disable_serial_data_irq(info);
2511 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2512 info->break_detected_cnt = 0;
2513
2514 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2515 }
2516 /* Restarting the DMA never hurts */
2517 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2518 START_FLUSH_FAST_TIMER(info, "ser_int");
2519 return info;
2520 } /* handle_ser_rx_interrupt */
2521
2522 static void handle_ser_tx_interrupt(struct e100_serial *info)
2523 {
2524 unsigned long flags;
2525
2526 if (info->x_char) {
2527 unsigned char rstat;
2528 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
2529 local_irq_save(flags);
2530 rstat = info->ioport[REG_STATUS];
2531 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2532
2533 info->ioport[REG_TR_DATA] = info->x_char;
2534 info->icount.tx++;
2535 info->x_char = 0;
2536 /* We must enable since it is disabled in ser_interrupt */
2537 e100_enable_serial_tx_ready_irq(info);
2538 local_irq_restore(flags);
2539 return;
2540 }
2541 if (info->uses_dma_out) {
2542 unsigned char rstat;
2543 int i;
2544 /* We only use normal tx interrupt when sending x_char */
2545 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
2546 local_irq_save(flags);
2547 rstat = info->ioport[REG_STATUS];
2548 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2549 e100_disable_serial_tx_ready_irq(info);
2550 if (info->port.tty->stopped)
2551 rs_stop(info->port.tty);
2552 /* Enable the DMA channel and tell it to continue */
2553 e100_enable_txdma_channel(info);
2554 /* Wait 12 cycles before doing the DMA command */
2555 for(i = 6; i > 0; i--)
2556 nop();
2557
2558 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
2559 local_irq_restore(flags);
2560 return;
2561 }
2562 /* Normal char-by-char interrupt */
2563 if (info->xmit.head == info->xmit.tail
2564 || info->port.tty->stopped
2565 || info->port.tty->hw_stopped) {
2566 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n",
2567 info->port.tty->stopped));
2568 e100_disable_serial_tx_ready_irq(info);
2569 info->tr_running = 0;
2570 return;
2571 }
2572 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
2573 /* Send a byte, rs485 timing is critical so turn of ints */
2574 local_irq_save(flags);
2575 info->ioport[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
2576 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
2577 info->icount.tx++;
2578 if (info->xmit.head == info->xmit.tail) {
2579 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2580 if (info->rs485.enabled) {
2581 /* Set a short timer to toggle RTS */
2582 start_one_shot_timer(&fast_timers_rs485[info->line],
2583 rs485_toggle_rts_timer_function,
2584 (unsigned long)info,
2585 info->char_time_usec*2,
2586 "RS-485");
2587 }
2588 #endif /* RS485 */
2589 info->last_tx_active_usec = GET_JIFFIES_USEC();
2590 info->last_tx_active = jiffies;
2591 e100_disable_serial_tx_ready_irq(info);
2592 info->tr_running = 0;
2593 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
2594 } else {
2595 /* We must enable since it is disabled in ser_interrupt */
2596 e100_enable_serial_tx_ready_irq(info);
2597 }
2598 local_irq_restore(flags);
2599
2600 if (CIRC_CNT(info->xmit.head,
2601 info->xmit.tail,
2602 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
2603 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
2604
2605 } /* handle_ser_tx_interrupt */
2606
2607 /* result of time measurements:
2608 * RX duration 54-60 us when doing something, otherwise 6-9 us
2609 * ser_int duration: just sending: 8-15 us normally, up to 73 us
2610 */
2611 static irqreturn_t
2612 ser_interrupt(int irq, void *dev_id)
2613 {
2614 static volatile int tx_started = 0;
2615 struct e100_serial *info;
2616 int i;
2617 unsigned long flags;
2618 unsigned long irq_mask1_rd;
2619 unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
2620 int handled = 0;
2621 static volatile unsigned long reentered_ready_mask = 0;
2622
2623 local_irq_save(flags);
2624 irq_mask1_rd = *R_IRQ_MASK1_RD;
2625 /* First handle all rx interrupts with ints disabled */
2626 info = rs_table;
2627 irq_mask1_rd &= e100_ser_int_mask;
2628 for (i = 0; i < NR_PORTS; i++) {
2629 /* Which line caused the data irq? */
2630 if (irq_mask1_rd & data_mask) {
2631 handled = 1;
2632 handle_ser_rx_interrupt(info);
2633 }
2634 info += 1;
2635 data_mask <<= 2;
2636 }
2637 /* Handle tx interrupts with interrupts enabled so we
2638 * can take care of new data interrupts while transmitting
2639 * We protect the tx part with the tx_started flag.
2640 * We disable the tr_ready interrupts we are about to handle and
2641 * unblock the serial interrupt so new serial interrupts may come.
2642 *
2643 * If we get a new interrupt:
2644 * - it migth be due to synchronous serial ports.
2645 * - serial irq will be blocked by general irq handler.
2646 * - async data will be handled above (sync will be ignored).
2647 * - tx_started flag will prevent us from trying to send again and
2648 * we will exit fast - no need to unblock serial irq.
2649 * - Next (sync) serial interrupt handler will be runned with
2650 * disabled interrupt due to restore_flags() at end of function,
2651 * so sync handler will not be preempted or reentered.
2652 */
2653 if (!tx_started) {
2654 unsigned long ready_mask;
2655 unsigned long
2656 tx_started = 1;
2657 /* Only the tr_ready interrupts left */
2658 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
2659 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
2660 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
2661 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
2662 while (irq_mask1_rd) {
2663 /* Disable those we are about to handle */
2664 *R_IRQ_MASK1_CLR = irq_mask1_rd;
2665 /* Unblock the serial interrupt */
2666 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
2667
2668 local_irq_enable();
2669 ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
2670 info = rs_table;
2671 for (i = 0; i < NR_PORTS; i++) {
2672 /* Which line caused the ready irq? */
2673 if (irq_mask1_rd & ready_mask) {
2674 handled = 1;
2675 handle_ser_tx_interrupt(info);
2676 }
2677 info += 1;
2678 ready_mask <<= 2;
2679 }
2680 /* handle_ser_tx_interrupt enables tr_ready interrupts */
2681 local_irq_disable();
2682 /* Handle reentered TX interrupt */
2683 irq_mask1_rd = reentered_ready_mask;
2684 }
2685 local_irq_disable();
2686 tx_started = 0;
2687 } else {
2688 unsigned long ready_mask;
2689 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
2690 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
2691 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
2692 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
2693 if (ready_mask) {
2694 reentered_ready_mask |= ready_mask;
2695 /* Disable those we are about to handle */
2696 *R_IRQ_MASK1_CLR = ready_mask;
2697 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
2698 }
2699 }
2700
2701 local_irq_restore(flags);
2702 return IRQ_RETVAL(handled);
2703 } /* ser_interrupt */
2704 #endif
2705
2706 /*
2707 * -------------------------------------------------------------------
2708 * Here ends the serial interrupt routines.
2709 * -------------------------------------------------------------------
2710 */
2711
2712 /*
2713 * This routine is used to handle the "bottom half" processing for the
2714 * serial driver, known also the "software interrupt" processing.
2715 * This processing is done at the kernel interrupt level, after the
2716 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
2717 * is where time-consuming activities which can not be done in the
2718 * interrupt driver proper are done; the interrupt driver schedules
2719 * them using rs_sched_event(), and they get done here.
2720 */
2721 static void
2722 do_softint(struct work_struct *work)
2723 {
2724 struct e100_serial *info;
2725 struct tty_struct *tty;
2726
2727 info = container_of(work, struct e100_serial, work);
2728
2729 tty = info->port.tty;
2730 if (!tty)
2731 return;
2732
2733 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
2734 tty_wakeup(tty);
2735 }
2736
2737 static int
2738 startup(struct e100_serial * info)
2739 {
2740 unsigned long flags;
2741 unsigned long xmit_page;
2742 int i;
2743
2744 xmit_page = get_zeroed_page(GFP_KERNEL);
2745 if (!xmit_page)
2746 return -ENOMEM;
2747
2748 local_irq_save(flags);
2749
2750 /* if it was already initialized, skip this */
2751
2752 if (info->flags & ASYNC_INITIALIZED) {
2753 local_irq_restore(flags);
2754 free_page(xmit_page);
2755 return 0;
2756 }
2757
2758 if (info->xmit.buf)
2759 free_page(xmit_page);
2760 else
2761 info->xmit.buf = (unsigned char *) xmit_page;
2762
2763 #ifdef SERIAL_DEBUG_OPEN
2764 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
2765 #endif
2766
2767 #ifdef CONFIG_SVINTO_SIM
2768 /* Bits and pieces collected from below. Better to have them
2769 in one ifdef:ed clause than to mix in a lot of ifdefs,
2770 right? */
2771 if (info->port.tty)
2772 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2773
2774 info->xmit.head = info->xmit.tail = 0;
2775 info->first_recv_buffer = info->last_recv_buffer = NULL;
2776 info->recv_cnt = info->max_recv_cnt = 0;
2777
2778 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2779 info->rec_descr[i].buf = NULL;
2780
2781 /* No real action in the simulator, but may set info important
2782 to ioctl. */
2783 change_speed(info);
2784 #else
2785
2786 /*
2787 * Clear the FIFO buffers and disable them
2788 * (they will be reenabled in change_speed())
2789 */
2790
2791 /*
2792 * Reset the DMA channels and make sure their interrupts are cleared
2793 */
2794
2795 if (info->dma_in_enabled) {
2796 info->uses_dma_in = 1;
2797 e100_enable_rxdma_channel(info);
2798
2799 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2800
2801 /* Wait until reset cycle is complete */
2802 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2803 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2804
2805 /* Make sure the irqs are cleared */
2806 *info->iclrintradr =
2807 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2808 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2809 } else {
2810 e100_disable_rxdma_channel(info);
2811 }
2812
2813 if (info->dma_out_enabled) {
2814 info->uses_dma_out = 1;
2815 e100_enable_txdma_channel(info);
2816 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2817
2818 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
2819 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2820
2821 /* Make sure the irqs are cleared */
2822 *info->oclrintradr =
2823 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2824 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2825 } else {
2826 e100_disable_txdma_channel(info);
2827 }
2828
2829 if (info->port.tty)
2830 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2831
2832 info->xmit.head = info->xmit.tail = 0;
2833 info->first_recv_buffer = info->last_recv_buffer = NULL;
2834 info->recv_cnt = info->max_recv_cnt = 0;
2835
2836 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2837 info->rec_descr[i].buf = 0;
2838
2839 /*
2840 * and set the speed and other flags of the serial port
2841 * this will start the rx/tx as well
2842 */
2843 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2844 e100_enable_serial_data_irq(info);
2845 #endif
2846 change_speed(info);
2847
2848 /* dummy read to reset any serial errors */
2849
2850 (void)info->ioport[REG_DATA];
2851
2852 /* enable the interrupts */
2853 if (info->uses_dma_out)
2854 e100_enable_txdma_irq(info);
2855
2856 e100_enable_rx_irq(info);
2857
2858 info->tr_running = 0; /* to be sure we don't lock up the transmitter */
2859
2860 /* setup the dma input descriptor and start dma */
2861
2862 start_receive(info);
2863
2864 /* for safety, make sure the descriptors last result is 0 bytes written */
2865
2866 info->tr_descr.sw_len = 0;
2867 info->tr_descr.hw_len = 0;
2868 info->tr_descr.status = 0;
2869
2870 /* enable RTS/DTR last */
2871
2872 e100_rts(info, 1);
2873 e100_dtr(info, 1);
2874
2875 #endif /* CONFIG_SVINTO_SIM */
2876
2877 info->flags |= ASYNC_INITIALIZED;
2878
2879 local_irq_restore(flags);
2880 return 0;
2881 }
2882
2883 /*
2884 * This routine will shutdown a serial port; interrupts are disabled, and
2885 * DTR is dropped if the hangup on close termio flag is on.
2886 */
2887 static void
2888 shutdown(struct e100_serial * info)
2889 {
2890 unsigned long flags;
2891 struct etrax_dma_descr *descr = info->rec_descr;
2892 struct etrax_recv_buffer *buffer;
2893 int i;
2894
2895 #ifndef CONFIG_SVINTO_SIM
2896 /* shut down the transmitter and receiver */
2897 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
2898 e100_disable_rx(info);
2899 info->ioport[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
2900
2901 /* disable interrupts, reset dma channels */
2902 if (info->uses_dma_in) {
2903 e100_disable_rxdma_irq(info);
2904 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2905 info->uses_dma_in = 0;
2906 } else {
2907 e100_disable_serial_data_irq(info);
2908 }
2909
2910 if (info->uses_dma_out) {
2911 e100_disable_txdma_irq(info);
2912 info->tr_running = 0;
2913 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2914 info->uses_dma_out = 0;
2915 } else {
2916 e100_disable_serial_tx_ready_irq(info);
2917 info->tr_running = 0;
2918 }
2919
2920 #endif /* CONFIG_SVINTO_SIM */
2921
2922 if (!(info->flags & ASYNC_INITIALIZED))
2923 return;
2924
2925 #ifdef SERIAL_DEBUG_OPEN
2926 printk("Shutting down serial port %d (irq %d)....\n", info->line,
2927 info->irq);
2928 #endif
2929
2930 local_irq_save(flags);
2931
2932 if (info->xmit.buf) {
2933 free_page((unsigned long)info->xmit.buf);
2934 info->xmit.buf = NULL;
2935 }
2936
2937 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2938 if (descr[i].buf) {
2939 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
2940 kfree(buffer);
2941 descr[i].buf = 0;
2942 }
2943
2944 if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL)) {
2945 /* hang up DTR and RTS if HUPCL is enabled */
2946 e100_dtr(info, 0);
2947 e100_rts(info, 0); /* could check CRTSCTS before doing this */
2948 }
2949
2950 if (info->port.tty)
2951 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
2952
2953 info->flags &= ~ASYNC_INITIALIZED;
2954 local_irq_restore(flags);
2955 }
2956
2957
2958 /* change baud rate and other assorted parameters */
2959
2960 static void
2961 change_speed(struct e100_serial *info)
2962 {
2963 unsigned int cflag;
2964 unsigned long xoff;
2965 unsigned long flags;
2966 /* first some safety checks */
2967
2968 if (!info->port.tty || !info->port.tty->termios)
2969 return;
2970 if (!info->ioport)
2971 return;
2972
2973 cflag = info->port.tty->termios->c_cflag;
2974
2975 /* possibly, the tx/rx should be disabled first to do this safely */
2976
2977 /* change baud-rate and write it to the hardware */
2978 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
2979 /* Special baudrate */
2980 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
2981 unsigned long alt_source =
2982 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
2983 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
2984 /* R_ALT_SER_BAUDRATE selects the source */
2985 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
2986 (unsigned long)info->baud_base, info->custom_divisor));
2987 if (info->baud_base == SERIAL_PRESCALE_BASE) {
2988 /* 0, 2-65535 (0=65536) */
2989 u16 divisor = info->custom_divisor;
2990 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
2991 /* baudrate is 3.125MHz/custom_divisor */
2992 alt_source =
2993 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
2994 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
2995 alt_source = 0x11;
2996 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
2997 *R_SERIAL_PRESCALE = divisor;
2998 info->baud = SERIAL_PRESCALE_BASE/divisor;
2999 }
3000 #ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
3001 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
3002 info->custom_divisor == 1) ||
3003 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
3004 info->custom_divisor == 8)) {
3005 /* ext_clk selected */
3006 alt_source =
3007 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
3008 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
3009 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
3010 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
3011 }
3012 #endif
3013 else
3014 {
3015 /* Bad baudbase, we don't support using timer0
3016 * for baudrate.
3017 */
3018 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
3019 (unsigned long)info->baud_base, info->custom_divisor);
3020 }
3021 r_alt_ser_baudrate_shadow &= ~mask;
3022 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3023 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3024 } else {
3025 /* Normal baudrate */
3026 /* Make sure we use normal baudrate */
3027 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3028 unsigned long alt_source =
3029 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3030 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3031 r_alt_ser_baudrate_shadow &= ~mask;
3032 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3033 #ifndef CONFIG_SVINTO_SIM
3034 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3035 #endif /* CONFIG_SVINTO_SIM */
3036
3037 info->baud = cflag_to_baud(cflag);
3038 #ifndef CONFIG_SVINTO_SIM
3039 info->ioport[REG_BAUD] = cflag_to_etrax_baud(cflag);
3040 #endif /* CONFIG_SVINTO_SIM */
3041 }
3042
3043 #ifndef CONFIG_SVINTO_SIM
3044 /* start with default settings and then fill in changes */
3045 local_irq_save(flags);
3046 /* 8 bit, no/even parity */
3047 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
3048 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
3049 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
3050
3051 /* 8 bit, no/even parity, 1 stop bit, no cts */
3052 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3053 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
3054 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
3055 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
3056 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
3057
3058 if ((cflag & CSIZE) == CS7) {
3059 /* set 7 bit mode */
3060 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3061 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
3062 }
3063
3064 if (cflag & CSTOPB) {
3065 /* set 2 stop bit mode */
3066 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3067 }
3068
3069 if (cflag & PARENB) {
3070 /* enable parity */
3071 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3072 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
3073 }
3074
3075 if (cflag & CMSPAR) {
3076 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3077 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3078 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
3079 }
3080 if (cflag & PARODD) {
3081 /* set odd parity (or Mark if CMSPAR) */
3082 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3083 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
3084 }
3085
3086 if (cflag & CRTSCTS) {
3087 /* enable automatic CTS handling */
3088 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
3089 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3090 }
3091
3092 /* make sure the tx and rx are enabled */
3093
3094 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3095 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
3096
3097 /* actually write the control regs to the hardware */
3098
3099 info->ioport[REG_TR_CTRL] = info->tx_ctrl;
3100 info->ioport[REG_REC_CTRL] = info->rx_ctrl;
3101 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->port.tty));
3102 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
3103 if (info->port.tty->termios->c_iflag & IXON ) {
3104 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n",
3105 STOP_CHAR(info->port.tty)));
3106 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
3107 }
3108
3109 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
3110 local_irq_restore(flags);
3111 #endif /* !CONFIG_SVINTO_SIM */
3112
3113 update_char_time(info);
3114
3115 } /* change_speed */
3116
3117 /* start transmitting chars NOW */
3118
3119 static void
3120 rs_flush_chars(struct tty_struct *tty)
3121 {
3122 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3123 unsigned long flags;
3124
3125 if (info->tr_running ||
3126 info->xmit.head == info->xmit.tail ||
3127 tty->stopped ||
3128 tty->hw_stopped ||
3129 !info->xmit.buf)
3130 return;
3131
3132 #ifdef SERIAL_DEBUG_FLOW
3133 printk("rs_flush_chars\n");
3134 #endif
3135
3136 /* this protection might not exactly be necessary here */
3137
3138 local_irq_save(flags);
3139 start_transmit(info);
3140 local_irq_restore(flags);
3141 }
3142
3143 static int rs_raw_write(struct tty_struct *tty,
3144 const unsigned char *buf, int count)
3145 {
3146 int c, ret = 0;
3147 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3148 unsigned long flags;
3149
3150 /* first some sanity checks */
3151
3152 if (!tty || !info->xmit.buf || !tmp_buf)
3153 return 0;
3154
3155 #ifdef SERIAL_DEBUG_DATA
3156 if (info->line == SERIAL_DEBUG_LINE)
3157 printk("rs_raw_write (%d), status %d\n",
3158 count, info->ioport[REG_STATUS]);
3159 #endif
3160
3161 #ifdef CONFIG_SVINTO_SIM
3162 /* Really simple. The output is here and now. */
3163 SIMCOUT(buf, count);
3164 return count;
3165 #endif
3166 local_save_flags(flags);
3167 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3168 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3169
3170
3171 /* The local_irq_disable/restore_flags pairs below are needed
3172 * because the DMA interrupt handler moves the info->xmit values.
3173 * the memcpy needs to be in the critical region unfortunately,
3174 * because we need to read xmit values, memcpy, write xmit values
3175 * in one atomic operation... this could perhaps be avoided by
3176 * more clever design.
3177 */
3178 local_irq_disable();
3179 while (count) {
3180 c = CIRC_SPACE_TO_END(info->xmit.head,
3181 info->xmit.tail,
3182 SERIAL_XMIT_SIZE);
3183
3184 if (count < c)
3185 c = count;
3186 if (c <= 0)
3187 break;
3188
3189 memcpy(info->xmit.buf + info->xmit.head, buf, c);
3190 info->xmit.head = (info->xmit.head + c) &
3191 (SERIAL_XMIT_SIZE-1);
3192 buf += c;
3193 count -= c;
3194 ret += c;
3195 }
3196 local_irq_restore(flags);
3197
3198 /* enable transmitter if not running, unless the tty is stopped
3199 * this does not need IRQ protection since if tr_running == 0
3200 * the IRQ's are not running anyway for this port.
3201 */
3202 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3203
3204 if (info->xmit.head != info->xmit.tail &&
3205 !tty->stopped &&
3206 !tty->hw_stopped &&
3207 !info->tr_running) {
3208 start_transmit(info);
3209 }
3210
3211 return ret;
3212 } /* raw_raw_write() */
3213
3214 static int
3215 rs_write(struct tty_struct *tty,
3216 const unsigned char *buf, int count)
3217 {
3218 #if defined(CONFIG_ETRAX_RS485)
3219 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3220
3221 if (info->rs485.enabled)
3222 {
3223 /* If we are in RS-485 mode, we need to toggle RTS and disable
3224 * the receiver before initiating a DMA transfer
3225 */
3226 #ifdef CONFIG_ETRAX_FAST_TIMER
3227 /* Abort any started timer */
3228 fast_timers_rs485[info->line].function = NULL;
3229 del_fast_timer(&fast_timers_rs485[info->line]);
3230 #endif
3231 e100_rts(info, info->rs485.rts_on_send);
3232 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3233 e100_disable_rx(info);
3234 e100_enable_rx_irq(info);
3235 #endif
3236
3237 if (info->rs485.delay_rts_before_send > 0)
3238 msleep(info->rs485.delay_rts_before_send);
3239 }
3240 #endif /* CONFIG_ETRAX_RS485 */
3241
3242 count = rs_raw_write(tty, buf, count);
3243
3244 #if defined(CONFIG_ETRAX_RS485)
3245 if (info->rs485.enabled)
3246 {
3247 unsigned int val;
3248 /* If we are in RS-485 mode the following has to be done:
3249 * wait until DMA is ready
3250 * wait on transmit shift register
3251 * toggle RTS
3252 * enable the receiver
3253 */
3254
3255 /* Sleep until all sent */
3256 tty_wait_until_sent(tty, 0);
3257 #ifdef CONFIG_ETRAX_FAST_TIMER
3258 /* Now sleep a little more so that shift register is empty */
3259 schedule_usleep(info->char_time_usec * 2);
3260 #endif
3261 /* wait on transmit shift register */
3262 do{
3263 get_lsr_info(info, &val);
3264 }while (!(val & TIOCSER_TEMT));
3265
3266 e100_rts(info, info->rs485.rts_after_sent);
3267
3268 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3269 e100_enable_rx(info);
3270 e100_enable_rxdma_irq(info);
3271 #endif
3272 }
3273 #endif /* CONFIG_ETRAX_RS485 */
3274
3275 return count;
3276 } /* rs_write */
3277
3278
3279 /* how much space is available in the xmit buffer? */
3280
3281 static int
3282 rs_write_room(struct tty_struct *tty)
3283 {
3284 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3285
3286 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3287 }
3288
3289 /* How many chars are in the xmit buffer?
3290 * This does not include any chars in the transmitter FIFO.
3291 * Use wait_until_sent for waiting for FIFO drain.
3292 */
3293
3294 static int
3295 rs_chars_in_buffer(struct tty_struct *tty)
3296 {
3297 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3298
3299 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3300 }
3301
3302 /* discard everything in the xmit buffer */
3303
3304 static void
3305 rs_flush_buffer(struct tty_struct *tty)
3306 {
3307 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3308 unsigned long flags;
3309
3310 local_irq_save(flags);
3311 info->xmit.head = info->xmit.tail = 0;
3312 local_irq_restore(flags);
3313
3314 tty_wakeup(tty);
3315 }
3316
3317 /*
3318 * This function is used to send a high-priority XON/XOFF character to
3319 * the device
3320 *
3321 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3322 * but we do it in handle_ser_tx_interrupt().
3323 * We disable DMA channel and enable tx ready interrupt and write the
3324 * character when possible.
3325 */
3326 static void rs_send_xchar(struct tty_struct *tty, char ch)
3327 {
3328 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3329 unsigned long flags;
3330 local_irq_save(flags);
3331 if (info->uses_dma_out) {
3332 /* Put the DMA on hold and disable the channel */
3333 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3334 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3335 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3336 e100_disable_txdma_channel(info);
3337 }
3338
3339 /* Must make sure transmitter is not stopped before we can transmit */
3340 if (tty->stopped)
3341 rs_start(tty);
3342
3343 /* Enable manual transmit interrupt and send from there */
3344 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3345 info->x_char = ch;
3346 e100_enable_serial_tx_ready_irq(info);
3347 local_irq_restore(flags);
3348 }
3349
3350 /*
3351 * ------------------------------------------------------------
3352 * rs_throttle()
3353 *
3354 * This routine is called by the upper-layer tty layer to signal that
3355 * incoming characters should be throttled.
3356 * ------------------------------------------------------------
3357 */
3358 static void
3359 rs_throttle(struct tty_struct * tty)
3360 {
3361 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3362 #ifdef SERIAL_DEBUG_THROTTLE
3363 char buf[64];
3364
3365 printk("throttle %s: %lu....\n", tty_name(tty, buf),
3366 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3367 #endif
3368 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3369
3370 /* Do RTS before XOFF since XOFF might take some time */
3371 if (tty->termios->c_cflag & CRTSCTS) {
3372 /* Turn off RTS line */
3373 e100_rts(info, 0);
3374 }
3375 if (I_IXOFF(tty))
3376 rs_send_xchar(tty, STOP_CHAR(tty));
3377
3378 }
3379
3380 static void
3381 rs_unthrottle(struct tty_struct * tty)
3382 {
3383 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3384 #ifdef SERIAL_DEBUG_THROTTLE
3385 char buf[64];
3386
3387 printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3388 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3389 #endif
3390 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3391 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3392 /* Do RTS before XOFF since XOFF might take some time */
3393 if (tty->termios->c_cflag & CRTSCTS) {
3394 /* Assert RTS line */
3395 e100_rts(info, 1);
3396 }
3397
3398 if (I_IXOFF(tty)) {
3399 if (info->x_char)
3400 info->x_char = 0;
3401 else
3402 rs_send_xchar(tty, START_CHAR(tty));
3403 }
3404
3405 }
3406
3407 /*
3408 * ------------------------------------------------------------
3409 * rs_ioctl() and friends
3410 * ------------------------------------------------------------
3411 */
3412
3413 static int
3414 get_serial_info(struct e100_serial * info,
3415 struct serial_struct * retinfo)
3416 {
3417 struct serial_struct tmp;
3418
3419 /* this is all probably wrong, there are a lot of fields
3420 * here that we don't have in e100_serial and maybe we
3421 * should set them to something else than 0.
3422 */
3423
3424 if (!retinfo)
3425 return -EFAULT;
3426 memset(&tmp, 0, sizeof(tmp));
3427 tmp.type = info->type;
3428 tmp.line = info->line;
3429 tmp.port = (int)info->ioport;
3430 tmp.irq = info->irq;
3431 tmp.flags = info->flags;
3432 tmp.baud_base = info->baud_base;
3433 tmp.close_delay = info->close_delay;
3434 tmp.closing_wait = info->closing_wait;
3435 tmp.custom_divisor = info->custom_divisor;
3436 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3437 return -EFAULT;
3438 return 0;
3439 }
3440
3441 static int
3442 set_serial_info(struct e100_serial *info,
3443 struct serial_struct *new_info)
3444 {
3445 struct serial_struct new_serial;
3446 struct e100_serial old_info;
3447 int retval = 0;
3448
3449 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3450 return -EFAULT;
3451
3452 old_info = *info;
3453
3454 if (!capable(CAP_SYS_ADMIN)) {
3455 if ((new_serial.type != info->type) ||
3456 (new_serial.close_delay != info->close_delay) ||
3457 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3458 (info->flags & ~ASYNC_USR_MASK)))
3459 return -EPERM;
3460 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
3461 (new_serial.flags & ASYNC_USR_MASK));
3462 goto check_and_exit;
3463 }
3464
3465 if (info->count > 1)
3466 return -EBUSY;
3467
3468 /*
3469 * OK, past this point, all the error checking has been done.
3470 * At this point, we start making changes.....
3471 */
3472
3473 info->baud_base = new_serial.baud_base;
3474 info->flags = ((info->flags & ~ASYNC_FLAGS) |
3475 (new_serial.flags & ASYNC_FLAGS));
3476 info->custom_divisor = new_serial.custom_divisor;
3477 info->type = new_serial.type;
3478 info->close_delay = new_serial.close_delay;
3479 info->closing_wait = new_serial.closing_wait;
3480 info->port.tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
3481
3482 check_and_exit:
3483 if (info->flags & ASYNC_INITIALIZED) {
3484 change_speed(info);
3485 } else
3486 retval = startup(info);
3487 return retval;
3488 }
3489
3490 /*
3491 * get_lsr_info - get line status register info
3492 *
3493 * Purpose: Let user call ioctl() to get info when the UART physically
3494 * is emptied. On bus types like RS485, the transmitter must
3495 * release the bus after transmitting. This must be done when
3496 * the transmit shift register is empty, not be done when the
3497 * transmit holding register is empty. This functionality
3498 * allows an RS485 driver to be written in user space.
3499 */
3500 static int
3501 get_lsr_info(struct e100_serial * info, unsigned int *value)
3502 {
3503 unsigned int result = TIOCSER_TEMT;
3504 #ifndef CONFIG_SVINTO_SIM
3505 unsigned long curr_time = jiffies;
3506 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3507 unsigned long elapsed_usec =
3508 (curr_time - info->last_tx_active) * 1000000/HZ +
3509 curr_time_usec - info->last_tx_active_usec;
3510
3511 if (info->xmit.head != info->xmit.tail ||
3512 elapsed_usec < 2*info->char_time_usec) {
3513 result = 0;
3514 }
3515 #endif
3516
3517 if (copy_to_user(value, &result, sizeof(int)))
3518 return -EFAULT;
3519 return 0;
3520 }
3521
3522 #ifdef SERIAL_DEBUG_IO
3523 struct state_str
3524 {
3525 int state;
3526 const char *str;
3527 };
3528
3529 const struct state_str control_state_str[] = {
3530 {TIOCM_DTR, "DTR" },
3531 {TIOCM_RTS, "RTS"},
3532 {TIOCM_ST, "ST?" },
3533 {TIOCM_SR, "SR?" },
3534 {TIOCM_CTS, "CTS" },
3535 {TIOCM_CD, "CD" },
3536 {TIOCM_RI, "RI" },
3537 {TIOCM_DSR, "DSR" },
3538 {0, NULL }
3539 };
3540
3541 char *get_control_state_str(int MLines, char *s)
3542 {
3543 int i = 0;
3544
3545 s[0]='\0';
3546 while (control_state_str[i].str != NULL) {
3547 if (MLines & control_state_str[i].state) {
3548 if (s[0] != '\0') {
3549 strcat(s, ", ");
3550 }
3551 strcat(s, control_state_str[i].str);
3552 }
3553 i++;
3554 }
3555 return s;
3556 }
3557 #endif
3558
3559 static int
3560 rs_break(struct tty_struct *tty, int break_state)
3561 {
3562 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3563 unsigned long flags;
3564
3565 if (!info->ioport)
3566 return -EIO;
3567
3568 local_irq_save(flags);
3569 if (break_state == -1) {
3570 /* Go to manual mode and set the txd pin to 0 */
3571 /* Clear bit 7 (txd) and 6 (tr_enable) */
3572 info->tx_ctrl &= 0x3F;
3573 } else {
3574 /* Set bit 7 (txd) and 6 (tr_enable) */
3575 info->tx_ctrl |= (0x80 | 0x40);
3576 }
3577 info->ioport[REG_TR_CTRL] = info->tx_ctrl;
3578 local_irq_restore(flags);
3579 return 0;
3580 }
3581
3582 static int
3583 rs_tiocmset(struct tty_struct *tty, struct file *file,
3584 unsigned int set, unsigned int clear)
3585 {
3586 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3587 unsigned long flags;
3588
3589 local_irq_save(flags);
3590
3591 if (clear & TIOCM_RTS)
3592 e100_rts(info, 0);
3593 if (clear & TIOCM_DTR)
3594 e100_dtr(info, 0);
3595 /* Handle FEMALE behaviour */
3596 if (clear & TIOCM_RI)
3597 e100_ri_out(info, 0);
3598 if (clear & TIOCM_CD)
3599 e100_cd_out(info, 0);
3600
3601 if (set & TIOCM_RTS)
3602 e100_rts(info, 1);
3603 if (set & TIOCM_DTR)
3604 e100_dtr(info, 1);
3605 /* Handle FEMALE behaviour */
3606 if (set & TIOCM_RI)
3607 e100_ri_out(info, 1);
3608 if (set & TIOCM_CD)
3609 e100_cd_out(info, 1);
3610
3611 local_irq_restore(flags);
3612 return 0;
3613 }
3614
3615 static int
3616 rs_tiocmget(struct tty_struct *tty, struct file *file)
3617 {
3618 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3619 unsigned int result;
3620 unsigned long flags;
3621
3622 local_irq_save(flags);
3623
3624 result =
3625 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
3626 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
3627 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
3628 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
3629 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
3630 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
3631
3632 local_irq_restore(flags);
3633
3634 #ifdef SERIAL_DEBUG_IO
3635 printk(KERN_DEBUG "ser%i: modem state: %i 0x%08X\n",
3636 info->line, result, result);
3637 {
3638 char s[100];
3639
3640 get_control_state_str(result, s);
3641 printk(KERN_DEBUG "state: %s\n", s);
3642 }
3643 #endif
3644 return result;
3645
3646 }
3647
3648
3649 static int
3650 rs_ioctl(struct tty_struct *tty, struct file * file,
3651 unsigned int cmd, unsigned long arg)
3652 {
3653 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3654
3655 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
3656 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
3657 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
3658 if (tty->flags & (1 << TTY_IO_ERROR))
3659 return -EIO;
3660 }
3661
3662 switch (cmd) {
3663 case TIOCGSERIAL:
3664 return get_serial_info(info,
3665 (struct serial_struct *) arg);
3666 case TIOCSSERIAL:
3667 return set_serial_info(info,
3668 (struct serial_struct *) arg);
3669 case TIOCSERGETLSR: /* Get line status register */
3670 return get_lsr_info(info, (unsigned int *) arg);
3671
3672 case TIOCSERGSTRUCT:
3673 if (copy_to_user((struct e100_serial *) arg,
3674 info, sizeof(struct e100_serial)))
3675 return -EFAULT;
3676 return 0;
3677
3678 #if defined(CONFIG_ETRAX_RS485)
3679 case TIOCSERSETRS485:
3680 {
3681 struct rs485_control rs485ctrl;
3682 if (copy_from_user(&rs485ctrl, (struct rs485_control *)arg,
3683 sizeof(rs485ctrl)))
3684 return -EFAULT;
3685
3686 return e100_enable_rs485(tty, &rs485ctrl);
3687 }
3688
3689 case TIOCSERWRRS485:
3690 {
3691 struct rs485_write rs485wr;
3692 if (copy_from_user(&rs485wr, (struct rs485_write *)arg,
3693 sizeof(rs485wr)))
3694 return -EFAULT;
3695
3696 return e100_write_rs485(tty, rs485wr.outc, rs485wr.outc_size);
3697 }
3698 #endif
3699
3700 default:
3701 return -ENOIOCTLCMD;
3702 }
3703 return 0;
3704 }
3705
3706 static void
3707 rs_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
3708 {
3709 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3710
3711 change_speed(info);
3712
3713 /* Handle turning off CRTSCTS */
3714 if ((old_termios->c_cflag & CRTSCTS) &&
3715 !(tty->termios->c_cflag & CRTSCTS)) {
3716 tty->hw_stopped = 0;
3717 rs_start(tty);
3718 }
3719
3720 }
3721
3722 /*
3723 * ------------------------------------------------------------
3724 * rs_close()
3725 *
3726 * This routine is called when the serial port gets closed. First, we
3727 * wait for the last remaining data to be sent. Then, we unlink its
3728 * S structure from the interrupt chain if necessary, and we free
3729 * that IRQ if nothing is left in the chain.
3730 * ------------------------------------------------------------
3731 */
3732 static void
3733 rs_close(struct tty_struct *tty, struct file * filp)
3734 {
3735 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3736 unsigned long flags;
3737
3738 if (!info)
3739 return;
3740
3741 /* interrupts are disabled for this entire function */
3742
3743 local_irq_save(flags);
3744
3745 if (tty_hung_up_p(filp)) {
3746 local_irq_restore(flags);
3747 return;
3748 }
3749
3750 #ifdef SERIAL_DEBUG_OPEN
3751 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
3752 info->line, info->count);
3753 #endif
3754 if ((tty->count == 1) && (info->count != 1)) {
3755 /*
3756 * Uh, oh. tty->count is 1, which means that the tty
3757 * structure will be freed. Info->count should always
3758 * be one in these conditions. If it's greater than
3759 * one, we've got real problems, since it means the
3760 * serial port won't be shutdown.
3761 */
3762 printk(KERN_CRIT
3763 "rs_close: bad serial port count; tty->count is 1, "
3764 "info->count is %d\n", info->count);
3765 info->count = 1;
3766 }
3767 if (--info->count < 0) {
3768 printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n",
3769 info->line, info->count);
3770 info->count = 0;
3771 }
3772 if (info->count) {
3773 local_irq_restore(flags);
3774 return;
3775 }
3776 info->flags |= ASYNC_CLOSING;
3777 /*
3778 * Save the termios structure, since this port may have
3779 * separate termios for callout and dialin.
3780 */
3781 if (info->flags & ASYNC_NORMAL_ACTIVE)
3782 info->normal_termios = *tty->termios;
3783 /*
3784 * Now we wait for the transmit buffer to clear; and we notify
3785 * the line discipline to only process XON/XOFF characters.
3786 */
3787 tty->closing = 1;
3788 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
3789 tty_wait_until_sent(tty, info->closing_wait);
3790 /*
3791 * At this point we stop accepting input. To do this, we
3792 * disable the serial receiver and the DMA receive interrupt.
3793 */
3794 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3795 e100_disable_serial_data_irq(info);
3796 #endif
3797
3798 #ifndef CONFIG_SVINTO_SIM
3799 e100_disable_rx(info);
3800 e100_disable_rx_irq(info);
3801
3802 if (info->flags & ASYNC_INITIALIZED) {
3803 /*
3804 * Before we drop DTR, make sure the UART transmitter
3805 * has completely drained; this is especially
3806 * important as we have a transmit FIFO!
3807 */
3808 rs_wait_until_sent(tty, HZ);
3809 }
3810 #endif
3811
3812 shutdown(info);
3813 rs_flush_buffer(tty);
3814 tty_ldisc_flush(tty);
3815 tty->closing = 0;
3816 info->event = 0;
3817 info->port.tty = NULL;
3818 if (info->blocked_open) {
3819 if (info->close_delay)
3820 schedule_timeout_interruptible(info->close_delay);
3821 wake_up_interruptible(&info->open_wait);
3822 }
3823 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
3824 wake_up_interruptible(&info->close_wait);
3825 local_irq_restore(flags);
3826
3827 /* port closed */
3828
3829 #if defined(CONFIG_ETRAX_RS485)
3830 if (info->rs485.enabled) {
3831 info->rs485.enabled = 0;
3832 #if defined(CONFIG_ETRAX_RS485_ON_PA)
3833 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
3834 #endif
3835 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
3836 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3837 rs485_port_g_bit, 0);
3838 #endif
3839 #if defined(CONFIG_ETRAX_RS485_LTC1387)
3840 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3841 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
3842 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3843 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
3844 #endif
3845 }
3846 #endif
3847
3848 /*
3849 * Release any allocated DMA irq's.
3850 */
3851 if (info->dma_in_enabled) {
3852 free_irq(info->dma_in_irq_nbr, info);
3853 cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
3854 info->uses_dma_in = 0;
3855 #ifdef SERIAL_DEBUG_OPEN
3856 printk(KERN_DEBUG "DMA irq '%s' freed\n",
3857 info->dma_in_irq_description);
3858 #endif
3859 }
3860 if (info->dma_out_enabled) {
3861 free_irq(info->dma_out_irq_nbr, info);
3862 cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
3863 info->uses_dma_out = 0;
3864 #ifdef SERIAL_DEBUG_OPEN
3865 printk(KERN_DEBUG "DMA irq '%s' freed\n",
3866 info->dma_out_irq_description);
3867 #endif
3868 }
3869 }
3870
3871 /*
3872 * rs_wait_until_sent() --- wait until the transmitter is empty
3873 */
3874 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
3875 {
3876 unsigned long orig_jiffies;
3877 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3878 unsigned long curr_time = jiffies;
3879 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3880 long elapsed_usec =
3881 (curr_time - info->last_tx_active) * (1000000/HZ) +
3882 curr_time_usec - info->last_tx_active_usec;
3883
3884 /*
3885 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
3886 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
3887 */
3888 lock_kernel();
3889 orig_jiffies = jiffies;
3890 while (info->xmit.head != info->xmit.tail || /* More in send queue */
3891 (*info->ostatusadr & 0x007f) || /* more in FIFO */
3892 (elapsed_usec < 2*info->char_time_usec)) {
3893 schedule_timeout_interruptible(1);
3894 if (signal_pending(current))
3895 break;
3896 if (timeout && time_after(jiffies, orig_jiffies + timeout))
3897 break;
3898 curr_time = jiffies;
3899 curr_time_usec = GET_JIFFIES_USEC();
3900 elapsed_usec =
3901 (curr_time - info->last_tx_active) * (1000000/HZ) +
3902 curr_time_usec - info->last_tx_active_usec;
3903 }
3904 set_current_state(TASK_RUNNING);
3905 unlock_kernel();
3906 }
3907
3908 /*
3909 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
3910 */
3911 void
3912 rs_hangup(struct tty_struct *tty)
3913 {
3914 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3915
3916 rs_flush_buffer(tty);
3917 shutdown(info);
3918 info->event = 0;
3919 info->count = 0;
3920 info->flags &= ~ASYNC_NORMAL_ACTIVE;
3921 info->port.tty = NULL;
3922 wake_up_interruptible(&info->open_wait);
3923 }
3924
3925 /*
3926 * ------------------------------------------------------------
3927 * rs_open() and friends
3928 * ------------------------------------------------------------
3929 */
3930 static int
3931 block_til_ready(struct tty_struct *tty, struct file * filp,
3932 struct e100_serial *info)
3933 {
3934 DECLARE_WAITQUEUE(wait, current);
3935 unsigned long flags;
3936 int retval;
3937 int do_clocal = 0, extra_count = 0;
3938
3939 /*
3940 * If the device is in the middle of being closed, then block
3941 * until it's done, and then try again.
3942 */
3943 if (tty_hung_up_p(filp) ||
3944 (info->flags & ASYNC_CLOSING)) {
3945 wait_event_interruptible(info->close_wait,
3946 !(info->flags & ASYNC_CLOSING));
3947 #ifdef SERIAL_DO_RESTART
3948 if (info->flags & ASYNC_HUP_NOTIFY)
3949 return -EAGAIN;
3950 else
3951 return -ERESTARTSYS;
3952 #else
3953 return -EAGAIN;
3954 #endif
3955 }
3956
3957 /*
3958 * If non-blocking mode is set, or the port is not enabled,
3959 * then make the check up front and then exit.
3960 */
3961 if ((filp->f_flags & O_NONBLOCK) ||
3962 (tty->flags & (1 << TTY_IO_ERROR))) {
3963 info->flags |= ASYNC_NORMAL_ACTIVE;
3964 return 0;
3965 }
3966
3967 if (tty->termios->c_cflag & CLOCAL) {
3968 do_clocal = 1;
3969 }
3970
3971 /*
3972 * Block waiting for the carrier detect and the line to become
3973 * free (i.e., not in use by the callout). While we are in
3974 * this loop, info->count is dropped by one, so that
3975 * rs_close() knows when to free things. We restore it upon
3976 * exit, either normal or abnormal.
3977 */
3978 retval = 0;
3979 add_wait_queue(&info->open_wait, &wait);
3980 #ifdef SERIAL_DEBUG_OPEN
3981 printk("block_til_ready before block: ttyS%d, count = %d\n",
3982 info->line, info->count);
3983 #endif
3984 local_irq_save(flags);
3985 if (!tty_hung_up_p(filp)) {
3986 extra_count++;
3987 info->count--;
3988 }
3989 local_irq_restore(flags);
3990 info->blocked_open++;
3991 while (1) {
3992 local_irq_save(flags);
3993 /* assert RTS and DTR */
3994 e100_rts(info, 1);
3995 e100_dtr(info, 1);
3996 local_irq_restore(flags);
3997 set_current_state(TASK_INTERRUPTIBLE);
3998 if (tty_hung_up_p(filp) ||
3999 !(info->flags & ASYNC_INITIALIZED)) {
4000 #ifdef SERIAL_DO_RESTART
4001 if (info->flags & ASYNC_HUP_NOTIFY)
4002 retval = -EAGAIN;
4003 else
4004 retval = -ERESTARTSYS;
4005 #else
4006 retval = -EAGAIN;
4007 #endif
4008 break;
4009 }
4010 if (!(info->flags & ASYNC_CLOSING) && do_clocal)
4011 /* && (do_clocal || DCD_IS_ASSERTED) */
4012 break;
4013 if (signal_pending(current)) {
4014 retval = -ERESTARTSYS;
4015 break;
4016 }
4017 #ifdef SERIAL_DEBUG_OPEN
4018 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4019 info->line, info->count);
4020 #endif
4021 schedule();
4022 }
4023 set_current_state(TASK_RUNNING);
4024 remove_wait_queue(&info->open_wait, &wait);
4025 if (extra_count)
4026 info->count++;
4027 info->blocked_open--;
4028 #ifdef SERIAL_DEBUG_OPEN
4029 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4030 info->line, info->count);
4031 #endif
4032 if (retval)
4033 return retval;
4034 info->flags |= ASYNC_NORMAL_ACTIVE;
4035 return 0;
4036 }
4037
4038 static void
4039 deinit_port(struct e100_serial *info)
4040 {
4041 if (info->dma_out_enabled) {
4042 cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
4043 free_irq(info->dma_out_irq_nbr, info);
4044 }
4045 if (info->dma_in_enabled) {
4046 cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
4047 free_irq(info->dma_in_irq_nbr, info);
4048 }
4049 }
4050
4051 /*
4052 * This routine is called whenever a serial port is opened.
4053 * It performs the serial-specific initialization for the tty structure.
4054 */
4055 static int
4056 rs_open(struct tty_struct *tty, struct file * filp)
4057 {
4058 struct e100_serial *info;
4059 int retval, line;
4060 unsigned long page;
4061 int allocated_resources = 0;
4062
4063 /* find which port we want to open */
4064 line = tty->index;
4065
4066 if (line < 0 || line >= NR_PORTS)
4067 return -ENODEV;
4068
4069 /* find the corresponding e100_serial struct in the table */
4070 info = rs_table + line;
4071
4072 /* don't allow the opening of ports that are not enabled in the HW config */
4073 if (!info->enabled)
4074 return -ENODEV;
4075
4076 #ifdef SERIAL_DEBUG_OPEN
4077 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
4078 info->count);
4079 #endif
4080
4081 info->count++;
4082 tty->driver_data = info;
4083 info->port.tty = tty;
4084
4085 info->port.tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4086
4087 if (!tmp_buf) {
4088 page = get_zeroed_page(GFP_KERNEL);
4089 if (!page) {
4090 return -ENOMEM;
4091 }
4092 if (tmp_buf)
4093 free_page(page);
4094 else
4095 tmp_buf = (unsigned char *) page;
4096 }
4097
4098 /*
4099 * If the port is in the middle of closing, bail out now
4100 */
4101 if (tty_hung_up_p(filp) ||
4102 (info->flags & ASYNC_CLOSING)) {
4103 wait_event_interruptible(info->close_wait,
4104 !(info->flags & ASYNC_CLOSING));
4105 #ifdef SERIAL_DO_RESTART
4106 return ((info->flags & ASYNC_HUP_NOTIFY) ?
4107 -EAGAIN : -ERESTARTSYS);
4108 #else
4109 return -EAGAIN;
4110 #endif
4111 }
4112
4113 /*
4114 * If DMA is enabled try to allocate the irq's.
4115 */
4116 if (info->count == 1) {
4117 allocated_resources = 1;
4118 if (info->dma_in_enabled) {
4119 if (request_irq(info->dma_in_irq_nbr,
4120 rec_interrupt,
4121 info->dma_in_irq_flags,
4122 info->dma_in_irq_description,
4123 info)) {
4124 printk(KERN_WARNING "DMA irq '%s' busy; "
4125 "falling back to non-DMA mode\n",
4126 info->dma_in_irq_description);
4127 /* Make sure we never try to use DMA in */
4128 /* for the port again. */
4129 info->dma_in_enabled = 0;
4130 } else if (cris_request_dma(info->dma_in_nbr,
4131 info->dma_in_irq_description,
4132 DMA_VERBOSE_ON_ERROR,
4133 info->dma_owner)) {
4134 free_irq(info->dma_in_irq_nbr, info);
4135 printk(KERN_WARNING "DMA '%s' busy; "
4136 "falling back to non-DMA mode\n",
4137 info->dma_in_irq_description);
4138 /* Make sure we never try to use DMA in */
4139 /* for the port again. */
4140 info->dma_in_enabled = 0;
4141 }
4142 #ifdef SERIAL_DEBUG_OPEN
4143 else
4144 printk(KERN_DEBUG "DMA irq '%s' allocated\n",
4145 info->dma_in_irq_description);
4146 #endif
4147 }
4148 if (info->dma_out_enabled) {
4149 if (request_irq(info->dma_out_irq_nbr,
4150 tr_interrupt,
4151 info->dma_out_irq_flags,
4152 info->dma_out_irq_description,
4153 info)) {
4154 printk(KERN_WARNING "DMA irq '%s' busy; "
4155 "falling back to non-DMA mode\n",
4156 info->dma_out_irq_description);
4157 /* Make sure we never try to use DMA out */
4158 /* for the port again. */
4159 info->dma_out_enabled = 0;
4160 } else if (cris_request_dma(info->dma_out_nbr,
4161 info->dma_out_irq_description,
4162 DMA_VERBOSE_ON_ERROR,
4163 info->dma_owner)) {
4164 free_irq(info->dma_out_irq_nbr, info);
4165 printk(KERN_WARNING "DMA '%s' busy; "
4166 "falling back to non-DMA mode\n",
4167 info->dma_out_irq_description);
4168 /* Make sure we never try to use DMA out */
4169 /* for the port again. */
4170 info->dma_out_enabled = 0;
4171 }
4172 #ifdef SERIAL_DEBUG_OPEN
4173 else
4174 printk(KERN_DEBUG "DMA irq '%s' allocated\n",
4175 info->dma_out_irq_description);
4176 #endif
4177 }
4178 }
4179
4180 /*
4181 * Start up the serial port
4182 */
4183
4184 retval = startup(info);
4185 if (retval) {
4186 if (allocated_resources)
4187 deinit_port(info);
4188
4189 /* FIXME Decrease count info->count here too? */
4190 return retval;
4191 }
4192
4193
4194 retval = block_til_ready(tty, filp, info);
4195 if (retval) {
4196 #ifdef SERIAL_DEBUG_OPEN
4197 printk("rs_open returning after block_til_ready with %d\n",
4198 retval);
4199 #endif
4200 if (allocated_resources)
4201 deinit_port(info);
4202
4203 return retval;
4204 }
4205
4206 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
4207 *tty->termios = info->normal_termios;
4208 change_speed(info);
4209 }
4210
4211 #ifdef SERIAL_DEBUG_OPEN
4212 printk("rs_open ttyS%d successful...\n", info->line);
4213 #endif
4214 DLOG_INT_TRIG( log_int_pos = 0);
4215
4216 DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
4217 info->icount.rx = 0;
4218 } );
4219
4220 return 0;
4221 }
4222
4223 /*
4224 * /proc fs routines....
4225 */
4226
4227 static int line_info(char *buf, struct e100_serial *info)
4228 {
4229 char stat_buf[30];
4230 int ret;
4231 unsigned long tmp;
4232
4233 ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d",
4234 info->line, (unsigned long)info->ioport, info->irq);
4235
4236 if (!info->ioport || (info->type == PORT_UNKNOWN)) {
4237 ret += sprintf(buf+ret, "\n");
4238 return ret;
4239 }
4240
4241 stat_buf[0] = 0;
4242 stat_buf[1] = 0;
4243 if (!E100_RTS_GET(info))
4244 strcat(stat_buf, "|RTS");
4245 if (!E100_CTS_GET(info))
4246 strcat(stat_buf, "|CTS");
4247 if (!E100_DTR_GET(info))
4248 strcat(stat_buf, "|DTR");
4249 if (!E100_DSR_GET(info))
4250 strcat(stat_buf, "|DSR");
4251 if (!E100_CD_GET(info))
4252 strcat(stat_buf, "|CD");
4253 if (!E100_RI_GET(info))
4254 strcat(stat_buf, "|RI");
4255
4256 ret += sprintf(buf+ret, " baud:%d", info->baud);
4257
4258 ret += sprintf(buf+ret, " tx:%lu rx:%lu",
4259 (unsigned long)info->icount.tx,
4260 (unsigned long)info->icount.rx);
4261 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4262 if (tmp) {
4263 ret += sprintf(buf+ret, " tx_pend:%lu/%lu",
4264 (unsigned long)tmp,
4265 (unsigned long)SERIAL_XMIT_SIZE);
4266 }
4267
4268 ret += sprintf(buf+ret, " rx_pend:%lu/%lu",
4269 (unsigned long)info->recv_cnt,
4270 (unsigned long)info->max_recv_cnt);
4271
4272 #if 1
4273 if (info->port.tty) {
4274
4275 if (info->port.tty->stopped)
4276 ret += sprintf(buf+ret, " stopped:%i",
4277 (int)info->port.tty->stopped);
4278 if (info->port.tty->hw_stopped)
4279 ret += sprintf(buf+ret, " hw_stopped:%i",
4280 (int)info->port.tty->hw_stopped);
4281 }
4282
4283 {
4284 unsigned char rstat = info->ioport[REG_STATUS];
4285 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) )
4286 ret += sprintf(buf+ret, " xoff_detect:1");
4287 }
4288
4289 #endif
4290
4291
4292
4293
4294 if (info->icount.frame)
4295 ret += sprintf(buf+ret, " fe:%lu",
4296 (unsigned long)info->icount.frame);
4297
4298 if (info->icount.parity)
4299 ret += sprintf(buf+ret, " pe:%lu",
4300 (unsigned long)info->icount.parity);
4301
4302 if (info->icount.brk)
4303 ret += sprintf(buf+ret, " brk:%lu",
4304 (unsigned long)info->icount.brk);
4305
4306 if (info->icount.overrun)
4307 ret += sprintf(buf+ret, " oe:%lu",
4308 (unsigned long)info->icount.overrun);
4309
4310 /*
4311 * Last thing is the RS-232 status lines
4312 */
4313 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
4314 return ret;
4315 }
4316
4317 int rs_read_proc(char *page, char **start, off_t off, int count,
4318 int *eof, void *data)
4319 {
4320 int i, len = 0, l;
4321 off_t begin = 0;
4322
4323 len += sprintf(page, "serinfo:1.0 driver:%s\n",
4324 serial_version);
4325 for (i = 0; i < NR_PORTS && len < 4000; i++) {
4326 if (!rs_table[i].enabled)
4327 continue;
4328 l = line_info(page + len, &rs_table[i]);
4329 len += l;
4330 if (len+begin > off+count)
4331 goto done;
4332 if (len+begin < off) {
4333 begin += len;
4334 len = 0;
4335 }
4336 }
4337 #ifdef DEBUG_LOG_INCLUDED
4338 for (i = 0; i < debug_log_pos; i++) {
4339 len += sprintf(page + len, "%-4i %lu.%lu ", i, debug_log[i].time, timer_data_to_ns(debug_log[i].timer_data));
4340 len += sprintf(page + len, debug_log[i].string, debug_log[i].value);
4341 if (len+begin > off+count)
4342 goto done;
4343 if (len+begin < off) {
4344 begin += len;
4345 len = 0;
4346 }
4347 }
4348 len += sprintf(page + len, "debug_log %i/%i %li bytes\n",
4349 i, DEBUG_LOG_SIZE, begin+len);
4350 debug_log_pos = 0;
4351 #endif
4352
4353 *eof = 1;
4354 done:
4355 if (off >= len+begin)
4356 return 0;
4357 *start = page + (off-begin);
4358 return ((count < begin+len-off) ? count : begin+len-off);
4359 }
4360
4361 /* Finally, routines used to initialize the serial driver. */
4362
4363 static void
4364 show_serial_version(void)
4365 {
4366 printk(KERN_INFO
4367 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
4368 &serial_version[11]); /* "$Revision: x.yy" */
4369 }
4370
4371 /* rs_init inits the driver at boot (using the module_init chain) */
4372
4373 static const struct tty_operations rs_ops = {
4374 .open = rs_open,
4375 .close = rs_close,
4376 .write = rs_write,
4377 .flush_chars = rs_flush_chars,
4378 .write_room = rs_write_room,
4379 .chars_in_buffer = rs_chars_in_buffer,
4380 .flush_buffer = rs_flush_buffer,
4381 .ioctl = rs_ioctl,
4382 .throttle = rs_throttle,
4383 .unthrottle = rs_unthrottle,
4384 .set_termios = rs_set_termios,
4385 .stop = rs_stop,
4386 .start = rs_start,
4387 .hangup = rs_hangup,
4388 .break_ctl = rs_break,
4389 .send_xchar = rs_send_xchar,
4390 .wait_until_sent = rs_wait_until_sent,
4391 .read_proc = rs_read_proc,
4392 .tiocmget = rs_tiocmget,
4393 .tiocmset = rs_tiocmset
4394 };
4395
4396 static int __init
4397 rs_init(void)
4398 {
4399 int i;
4400 struct e100_serial *info;
4401 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4402
4403 if (!driver)
4404 return -ENOMEM;
4405
4406 show_serial_version();
4407
4408 /* Setup the timed flush handler system */
4409
4410 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4411 setup_timer(&flush_timer, timed_flush_handler, 0);
4412 mod_timer(&flush_timer, jiffies + 5);
4413 #endif
4414
4415 #if defined(CONFIG_ETRAX_RS485)
4416 #if defined(CONFIG_ETRAX_RS485_ON_PA)
4417 if (cris_io_interface_allocate_pins(if_ser0, 'a', rs485_pa_bit,
4418 rs485_pa_bit)) {
4419 printk(KERN_CRIT "ETRAX100LX serial: Could not allocate "
4420 "RS485 pin\n");
4421 put_tty_driver(driver);
4422 return -EBUSY;
4423 }
4424 #endif
4425 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4426 if (cris_io_interface_allocate_pins(if_ser0, 'g', rs485_pa_bit,
4427 rs485_port_g_bit)) {
4428 printk(KERN_CRIT "ETRAX100LX serial: Could not allocate "
4429 "RS485 pin\n");
4430 put_tty_driver(driver);
4431 return -EBUSY;
4432 }
4433 #endif
4434 #endif
4435
4436 /* Initialize the tty_driver structure */
4437
4438 driver->driver_name = "serial";
4439 driver->name = "ttyS";
4440 driver->major = TTY_MAJOR;
4441 driver->minor_start = 64;
4442 driver->type = TTY_DRIVER_TYPE_SERIAL;
4443 driver->subtype = SERIAL_TYPE_NORMAL;
4444 driver->init_termios = tty_std_termios;
4445 driver->init_termios.c_cflag =
4446 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
4447 driver->init_termios.c_ispeed = 115200;
4448 driver->init_termios.c_ospeed = 115200;
4449 driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
4450
4451 tty_set_operations(driver, &rs_ops);
4452 serial_driver = driver;
4453 if (tty_register_driver(driver))
4454 panic("Couldn't register serial driver\n");
4455 /* do some initializing for the separate ports */
4456
4457 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4458 if (info->enabled) {
4459 if (cris_request_io_interface(info->io_if,
4460 info->io_if_description)) {
4461 printk(KERN_CRIT "ETRAX100LX async serial: "
4462 "Could not allocate IO pins for "
4463 "%s, port %d\n",
4464 info->io_if_description, i);
4465 info->enabled = 0;
4466 }
4467 }
4468 info->uses_dma_in = 0;
4469 info->uses_dma_out = 0;
4470 info->line = i;
4471 info->port.tty = NULL;
4472 info->type = PORT_ETRAX;
4473 info->tr_running = 0;
4474 info->forced_eop = 0;
4475 info->baud_base = DEF_BAUD_BASE;
4476 info->custom_divisor = 0;
4477 info->flags = 0;
4478 info->close_delay = 5*HZ/10;
4479 info->closing_wait = 30*HZ;
4480 info->x_char = 0;
4481 info->event = 0;
4482 info->count = 0;
4483 info->blocked_open = 0;
4484 info->normal_termios = driver->init_termios;
4485 init_waitqueue_head(&info->open_wait);
4486 init_waitqueue_head(&info->close_wait);
4487 info->xmit.buf = NULL;
4488 info->xmit.tail = info->xmit.head = 0;
4489 info->first_recv_buffer = info->last_recv_buffer = NULL;
4490 info->recv_cnt = info->max_recv_cnt = 0;
4491 info->last_tx_active_usec = 0;
4492 info->last_tx_active = 0;
4493
4494 #if defined(CONFIG_ETRAX_RS485)
4495 /* Set sane defaults */
4496 info->rs485.rts_on_send = 0;
4497 info->rs485.rts_after_sent = 1;
4498 info->rs485.delay_rts_before_send = 0;
4499 info->rs485.enabled = 0;
4500 #endif
4501 INIT_WORK(&info->work, do_softint);
4502
4503 if (info->enabled) {
4504 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n",
4505 serial_driver->name, info->line, (unsigned int)info->ioport);
4506 }
4507 }
4508 #ifdef CONFIG_ETRAX_FAST_TIMER
4509 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4510 memset(fast_timers, 0, sizeof(fast_timers));
4511 #endif
4512 #ifdef CONFIG_ETRAX_RS485
4513 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4514 #endif
4515 fast_timer_init();
4516 #endif
4517
4518 #ifndef CONFIG_SVINTO_SIM
4519 #ifndef CONFIG_ETRAX_KGDB
4520 /* Not needed in simulator. May only complicate stuff. */
4521 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4522
4523 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt,
4524 IRQF_SHARED | IRQF_DISABLED, "serial ", driver))
4525 panic("%s: Failed to request irq8", __func__);
4526
4527 #endif
4528 #endif /* CONFIG_SVINTO_SIM */
4529
4530 return 0;
4531 }
4532
4533 /* this makes sure that rs_init is called during kernel boot */
4534
4535 module_init(rs_init);
Nao low-level kernelspace/userspace library that runs on our robots, Nao-Team HTWK