added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / drivers / net / wireless / rt2x00 / rt2x00queue.h
blob28293715340849363aa98eeb480f18f593fae7ec
1 /*
2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 Module: rt2x00
23 Abstract: rt2x00 queue datastructures and routines
26 #ifndef RT2X00QUEUE_H
27 #define RT2X00QUEUE_H
29 #include <linux/prefetch.h>
31 /**
32 * DOC: Entrie frame size
34 * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
35 * for USB devices this restriction does not apply, but the value of
36 * 2432 makes sense since it is big enough to contain the maximum fragment
37 * size according to the ieee802.11 specs.
39 #define DATA_FRAME_SIZE 2432
40 #define MGMT_FRAME_SIZE 256
42 /**
43 * DOC: Number of entries per queue
45 * Under normal load without fragmentation 12 entries are sufficient
46 * without the queue being filled up to the maximum. When using fragmentation
47 * and the queue threshold code we need to add some additional margins to
48 * make sure the queue will never (or only under extreme load) fill up
49 * completely.
50 * Since we don't use preallocated DMA having a large number of queue entries
51 * will have only minimal impact on the memory requirements for the queue.
53 #define RX_ENTRIES 24
54 #define TX_ENTRIES 24
55 #define BEACON_ENTRIES 1
56 #define ATIM_ENTRIES 8
58 /**
59 * enum data_queue_qid: Queue identification
61 * @QID_AC_BE: AC BE queue
62 * @QID_AC_BK: AC BK queue
63 * @QID_AC_VI: AC VI queue
64 * @QID_AC_VO: AC VO queue
65 * @QID_HCCA: HCCA queue
66 * @QID_MGMT: MGMT queue (prio queue)
67 * @QID_RX: RX queue
68 * @QID_OTHER: None of the above (don't use, only present for completeness)
69 * @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
70 * @QID_ATIM: Atim queue (value unspeficied, don't send it to device)
72 enum data_queue_qid {
73 QID_AC_BE = 0,
74 QID_AC_BK = 1,
75 QID_AC_VI = 2,
76 QID_AC_VO = 3,
77 QID_HCCA = 4,
78 QID_MGMT = 13,
79 QID_RX = 14,
80 QID_OTHER = 15,
81 QID_BEACON,
82 QID_ATIM,
85 /**
86 * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
88 * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
89 * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
90 * @FRAME_DESC_IV_STRIPPED: Frame contained a IV/EIV provided by
91 * mac80211 but was stripped for processing by the driver.
93 enum skb_frame_desc_flags {
94 SKBDESC_DMA_MAPPED_RX = 1 << 0,
95 SKBDESC_DMA_MAPPED_TX = 1 << 1,
96 FRAME_DESC_IV_STRIPPED = 1 << 2,
99 /**
100 * struct skb_frame_desc: Descriptor information for the skb buffer
102 * This structure is placed over the driver_data array, this means that
103 * this structure should not exceed the size of that array (40 bytes).
105 * @flags: Frame flags, see &enum skb_frame_desc_flags.
106 * @desc_len: Length of the frame descriptor.
107 * @tx_rate_idx: the index of the TX rate, used for TX status reporting
108 * @tx_rate_flags: the TX rate flags, used for TX status reporting
109 * @desc: Pointer to descriptor part of the frame.
110 * Note that this pointer could point to something outside
111 * of the scope of the skb->data pointer.
112 * @iv: IV/EIV data used during encryption/decryption.
113 * @skb_dma: (PCI-only) the DMA address associated with the sk buffer.
114 * @entry: The entry to which this sk buffer belongs.
116 struct skb_frame_desc {
117 u8 flags;
119 u8 desc_len;
120 u8 tx_rate_idx;
121 u8 tx_rate_flags;
123 void *desc;
125 __le32 iv[2];
127 dma_addr_t skb_dma;
129 struct queue_entry *entry;
133 * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff.
134 * @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc
136 static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb)
138 BUILD_BUG_ON(sizeof(struct skb_frame_desc) >
139 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
140 return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data;
144 * enum rxdone_entry_desc_flags: Flags for &struct rxdone_entry_desc
146 * @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value.
147 * @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value.
148 * @RXDONE_MY_BSS: Does this frame originate from device's BSS.
149 * @RXDONE_CRYPTO_IV: Driver provided IV/EIV data.
150 * @RXDONE_CRYPTO_ICV: Driver provided ICV data.
152 enum rxdone_entry_desc_flags {
153 RXDONE_SIGNAL_PLCP = 1 << 0,
154 RXDONE_SIGNAL_BITRATE = 1 << 1,
155 RXDONE_MY_BSS = 1 << 2,
156 RXDONE_CRYPTO_IV = 1 << 3,
157 RXDONE_CRYPTO_ICV = 1 << 4,
161 * struct rxdone_entry_desc: RX Entry descriptor
163 * Summary of information that has been read from the RX frame descriptor.
165 * @timestamp: RX Timestamp
166 * @signal: Signal of the received frame.
167 * @rssi: RSSI of the received frame.
168 * @size: Data size of the received frame.
169 * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags).
170 * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
171 * @cipher: Cipher type used during decryption.
172 * @cipher_status: Decryption status.
173 * @iv: IV/EIV data used during decryption.
174 * @icv: ICV data used during decryption.
176 struct rxdone_entry_desc {
177 u64 timestamp;
178 int signal;
179 int rssi;
180 int size;
181 int flags;
182 int dev_flags;
183 u8 cipher;
184 u8 cipher_status;
186 __le32 iv[2];
187 __le32 icv;
191 * enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc
193 * @TXDONE_UNKNOWN: Hardware could not determine success of transmission.
194 * @TXDONE_SUCCESS: Frame was successfully send
195 * @TXDONE_FAILURE: Frame was not successfully send
196 * @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the
197 * frame transmission failed due to excessive retries.
199 enum txdone_entry_desc_flags {
200 TXDONE_UNKNOWN,
201 TXDONE_SUCCESS,
202 TXDONE_FAILURE,
203 TXDONE_EXCESSIVE_RETRY,
207 * struct txdone_entry_desc: TX done entry descriptor
209 * Summary of information that has been read from the TX frame descriptor
210 * after the device is done with transmission.
212 * @flags: TX done flags (See &enum txdone_entry_desc_flags).
213 * @retry: Retry count.
215 struct txdone_entry_desc {
216 unsigned long flags;
217 int retry;
221 * enum txentry_desc_flags: Status flags for TX entry descriptor
223 * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame.
224 * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame.
225 * @ENTRY_TXD_OFDM_RATE: This frame is send out with an OFDM rate.
226 * @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter.
227 * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame.
228 * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment.
229 * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted.
230 * @ENTRY_TXD_BURST: This frame belongs to the same burst event.
231 * @ENTRY_TXD_ACK: An ACK is required for this frame.
232 * @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used.
233 * @ENTRY_TXD_ENCRYPT: This frame should be encrypted.
234 * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared).
235 * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware.
236 * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware.
238 enum txentry_desc_flags {
239 ENTRY_TXD_RTS_FRAME,
240 ENTRY_TXD_CTS_FRAME,
241 ENTRY_TXD_OFDM_RATE,
242 ENTRY_TXD_GENERATE_SEQ,
243 ENTRY_TXD_FIRST_FRAGMENT,
244 ENTRY_TXD_MORE_FRAG,
245 ENTRY_TXD_REQ_TIMESTAMP,
246 ENTRY_TXD_BURST,
247 ENTRY_TXD_ACK,
248 ENTRY_TXD_RETRY_MODE,
249 ENTRY_TXD_ENCRYPT,
250 ENTRY_TXD_ENCRYPT_PAIRWISE,
251 ENTRY_TXD_ENCRYPT_IV,
252 ENTRY_TXD_ENCRYPT_MMIC,
256 * struct txentry_desc: TX Entry descriptor
258 * Summary of information for the frame descriptor before sending a TX frame.
260 * @flags: Descriptor flags (See &enum queue_entry_flags).
261 * @queue: Queue identification (See &enum data_queue_qid).
262 * @length_high: PLCP length high word.
263 * @length_low: PLCP length low word.
264 * @signal: PLCP signal.
265 * @service: PLCP service.
266 * @retry_limit: Max number of retries.
267 * @aifs: AIFS value.
268 * @ifs: IFS value.
269 * @cw_min: cwmin value.
270 * @cw_max: cwmax value.
271 * @cipher: Cipher type used for encryption.
272 * @key_idx: Key index used for encryption.
273 * @iv_offset: Position where IV should be inserted by hardware.
275 struct txentry_desc {
276 unsigned long flags;
278 enum data_queue_qid queue;
280 u16 length_high;
281 u16 length_low;
282 u16 signal;
283 u16 service;
285 short retry_limit;
286 short aifs;
287 short ifs;
288 short cw_min;
289 short cw_max;
291 enum cipher cipher;
292 u16 key_idx;
293 u16 iv_offset;
297 * enum queue_entry_flags: Status flags for queue entry
299 * @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface.
300 * As long as this bit is set, this entry may only be touched
301 * through the interface structure.
302 * @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data
303 * transfer (either TX or RX depending on the queue). The entry should
304 * only be touched after the device has signaled it is done with it.
305 * @ENTRY_OWNER_DEVICE_CRYPTO: This entry is owned by the device for data
306 * encryption or decryption. The entry should only be touched after
307 * the device has signaled it is done with it.
308 * @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting
309 * for the signal to start sending.
311 enum queue_entry_flags {
312 ENTRY_BCN_ASSIGNED,
313 ENTRY_OWNER_DEVICE_DATA,
314 ENTRY_OWNER_DEVICE_CRYPTO,
315 ENTRY_DATA_PENDING,
319 * struct queue_entry: Entry inside the &struct data_queue
321 * @flags: Entry flags, see &enum queue_entry_flags.
322 * @queue: The data queue (&struct data_queue) to which this entry belongs.
323 * @skb: The buffer which is currently being transmitted (for TX queue),
324 * or used to directly recieve data in (for RX queue).
325 * @entry_idx: The entry index number.
326 * @priv_data: Private data belonging to this queue entry. The pointer
327 * points to data specific to a particular driver and queue type.
329 struct queue_entry {
330 unsigned long flags;
332 struct data_queue *queue;
334 struct sk_buff *skb;
336 unsigned int entry_idx;
338 void *priv_data;
342 * enum queue_index: Queue index type
344 * @Q_INDEX: Index pointer to the current entry in the queue, if this entry is
345 * owned by the hardware then the queue is considered to be full.
346 * @Q_INDEX_DONE: Index pointer to the next entry which will be completed by
347 * the hardware and for which we need to run the txdone handler. If this
348 * entry is not owned by the hardware the queue is considered to be empty.
349 * @Q_INDEX_CRYPTO: Index pointer to the next entry which encryption/decription
350 * will be completed by the hardware next.
351 * @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size
352 * of the index array.
354 enum queue_index {
355 Q_INDEX,
356 Q_INDEX_DONE,
357 Q_INDEX_CRYPTO,
358 Q_INDEX_MAX,
362 * struct data_queue: Data queue
364 * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to.
365 * @entries: Base address of the &struct queue_entry which are
366 * part of this queue.
367 * @qid: The queue identification, see &enum data_queue_qid.
368 * @lock: Spinlock to protect index handling. Whenever @index, @index_done or
369 * @index_crypt needs to be changed this lock should be grabbed to prevent
370 * index corruption due to concurrency.
371 * @count: Number of frames handled in the queue.
372 * @limit: Maximum number of entries in the queue.
373 * @threshold: Minimum number of free entries before queue is kicked by force.
374 * @length: Number of frames in queue.
375 * @index: Index pointers to entry positions in the queue,
376 * use &enum queue_index to get a specific index field.
377 * @txop: maximum burst time.
378 * @aifs: The aifs value for outgoing frames (field ignored in RX queue).
379 * @cw_min: The cw min value for outgoing frames (field ignored in RX queue).
380 * @cw_max: The cw max value for outgoing frames (field ignored in RX queue).
381 * @data_size: Maximum data size for the frames in this queue.
382 * @desc_size: Hardware descriptor size for the data in this queue.
383 * @usb_endpoint: Device endpoint used for communication (USB only)
384 * @usb_maxpacket: Max packet size for given endpoint (USB only)
386 struct data_queue {
387 struct rt2x00_dev *rt2x00dev;
388 struct queue_entry *entries;
390 enum data_queue_qid qid;
392 spinlock_t lock;
393 unsigned int count;
394 unsigned short limit;
395 unsigned short threshold;
396 unsigned short length;
397 unsigned short index[Q_INDEX_MAX];
399 unsigned short txop;
400 unsigned short aifs;
401 unsigned short cw_min;
402 unsigned short cw_max;
404 unsigned short data_size;
405 unsigned short desc_size;
407 unsigned short usb_endpoint;
408 unsigned short usb_maxpacket;
412 * struct data_queue_desc: Data queue description
414 * The information in this structure is used by drivers
415 * to inform rt2x00lib about the creation of the data queue.
417 * @entry_num: Maximum number of entries for a queue.
418 * @data_size: Maximum data size for the frames in this queue.
419 * @desc_size: Hardware descriptor size for the data in this queue.
420 * @priv_size: Size of per-queue_entry private data.
422 struct data_queue_desc {
423 unsigned short entry_num;
424 unsigned short data_size;
425 unsigned short desc_size;
426 unsigned short priv_size;
430 * queue_end - Return pointer to the last queue (HELPER MACRO).
431 * @__dev: Pointer to &struct rt2x00_dev
433 * Using the base rx pointer and the maximum number of available queues,
434 * this macro will return the address of 1 position beyond the end of the
435 * queues array.
437 #define queue_end(__dev) \
438 &(__dev)->rx[(__dev)->data_queues]
441 * tx_queue_end - Return pointer to the last TX queue (HELPER MACRO).
442 * @__dev: Pointer to &struct rt2x00_dev
444 * Using the base tx pointer and the maximum number of available TX
445 * queues, this macro will return the address of 1 position beyond
446 * the end of the TX queue array.
448 #define tx_queue_end(__dev) \
449 &(__dev)->tx[(__dev)->ops->tx_queues]
452 * queue_next - Return pointer to next queue in list (HELPER MACRO).
453 * @__queue: Current queue for which we need the next queue
455 * Using the current queue address we take the address directly
456 * after the queue to take the next queue. Note that this macro
457 * should be used carefully since it does not protect against
458 * moving past the end of the list. (See macros &queue_end and
459 * &tx_queue_end for determining the end of the queue).
461 #define queue_next(__queue) \
462 &(__queue)[1]
465 * queue_loop - Loop through the queues within a specific range (HELPER MACRO).
466 * @__entry: Pointer where the current queue entry will be stored in.
467 * @__start: Start queue pointer.
468 * @__end: End queue pointer.
470 * This macro will loop through all queues between &__start and &__end.
472 #define queue_loop(__entry, __start, __end) \
473 for ((__entry) = (__start); \
474 prefetch(queue_next(__entry)), (__entry) != (__end);\
475 (__entry) = queue_next(__entry))
478 * queue_for_each - Loop through all queues
479 * @__dev: Pointer to &struct rt2x00_dev
480 * @__entry: Pointer where the current queue entry will be stored in.
482 * This macro will loop through all available queues.
484 #define queue_for_each(__dev, __entry) \
485 queue_loop(__entry, (__dev)->rx, queue_end(__dev))
488 * tx_queue_for_each - Loop through the TX queues
489 * @__dev: Pointer to &struct rt2x00_dev
490 * @__entry: Pointer where the current queue entry will be stored in.
492 * This macro will loop through all TX related queues excluding
493 * the Beacon and Atim queues.
495 #define tx_queue_for_each(__dev, __entry) \
496 queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev))
499 * txall_queue_for_each - Loop through all TX related queues
500 * @__dev: Pointer to &struct rt2x00_dev
501 * @__entry: Pointer where the current queue entry will be stored in.
503 * This macro will loop through all TX related queues including
504 * the Beacon and Atim queues.
506 #define txall_queue_for_each(__dev, __entry) \
507 queue_loop(__entry, (__dev)->tx, queue_end(__dev))
510 * rt2x00queue_empty - Check if the queue is empty.
511 * @queue: Queue to check if empty.
513 static inline int rt2x00queue_empty(struct data_queue *queue)
515 return queue->length == 0;
519 * rt2x00queue_full - Check if the queue is full.
520 * @queue: Queue to check if full.
522 static inline int rt2x00queue_full(struct data_queue *queue)
524 return queue->length == queue->limit;
528 * rt2x00queue_free - Check the number of available entries in queue.
529 * @queue: Queue to check.
531 static inline int rt2x00queue_available(struct data_queue *queue)
533 return queue->limit - queue->length;
537 * rt2x00queue_threshold - Check if the queue is below threshold
538 * @queue: Queue to check.
540 static inline int rt2x00queue_threshold(struct data_queue *queue)
542 return rt2x00queue_available(queue) < queue->threshold;
546 * _rt2x00_desc_read - Read a word from the hardware descriptor.
547 * @desc: Base descriptor address
548 * @word: Word index from where the descriptor should be read.
549 * @value: Address where the descriptor value should be written into.
551 static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value)
553 *value = desc[word];
557 * rt2x00_desc_read - Read a word from the hardware descriptor, this
558 * function will take care of the byte ordering.
559 * @desc: Base descriptor address
560 * @word: Word index from where the descriptor should be read.
561 * @value: Address where the descriptor value should be written into.
563 static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value)
565 __le32 tmp;
566 _rt2x00_desc_read(desc, word, &tmp);
567 *value = le32_to_cpu(tmp);
571 * rt2x00_desc_write - write a word to the hardware descriptor, this
572 * function will take care of the byte ordering.
573 * @desc: Base descriptor address
574 * @word: Word index from where the descriptor should be written.
575 * @value: Value that should be written into the descriptor.
577 static inline void _rt2x00_desc_write(__le32 *desc, const u8 word, __le32 value)
579 desc[word] = value;
583 * rt2x00_desc_write - write a word to the hardware descriptor.
584 * @desc: Base descriptor address
585 * @word: Word index from where the descriptor should be written.
586 * @value: Value that should be written into the descriptor.
588 static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value)
590 _rt2x00_desc_write(desc, word, cpu_to_le32(value));
593 #endif /* RT2X00QUEUE_H */