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added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / drivers / net / fs_enet / mac-fec.c
blob14e575313c89c85c9573a85359368e0e320725a5
1 /*
2 * Freescale Ethernet controllers
3 *
4 * Copyright (c) 2005 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
9 *
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
13 */
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/string.h>
19 #include <linux/ptrace.h>
20 #include <linux/errno.h>
21 #include <linux/ioport.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <linux/skbuff.h>
29 #include <linux/spinlock.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/bitops.h>
33 #include <linux/fs.h>
34 #include <linux/platform_device.h>
35 #include <linux/of_device.h>
36
37 #include <asm/irq.h>
38 #include <asm/uaccess.h>
39
40 #ifdef CONFIG_8xx
41 #include <asm/8xx_immap.h>
42 #include <asm/pgtable.h>
43 #include <asm/mpc8xx.h>
44 #include <asm/cpm1.h>
45 #endif
46
47 #include "fs_enet.h"
48 #include "fec.h"
49
50 /*************************************************/
51
52 #if defined(CONFIG_CPM1)
53 /* for a CPM1 __raw_xxx's are sufficient */
54 #define __fs_out32(addr, x) __raw_writel(x, addr)
55 #define __fs_out16(addr, x) __raw_writew(x, addr)
56 #define __fs_in32(addr) __raw_readl(addr)
57 #define __fs_in16(addr) __raw_readw(addr)
58 #else
59 /* for others play it safe */
60 #define __fs_out32(addr, x) out_be32(addr, x)
61 #define __fs_out16(addr, x) out_be16(addr, x)
62 #define __fs_in32(addr) in_be32(addr)
63 #define __fs_in16(addr) in_be16(addr)
64 #endif
65
66 /* write */
67 #define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v))
68
69 /* read */
70 #define FR(_fecp, _reg) __fs_in32(&(_fecp)->fec_ ## _reg)
71
72 /* set bits */
73 #define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v))
74
75 /* clear bits */
76 #define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v))
77
78 /*
79 * Delay to wait for FEC reset command to complete (in us)
80 */
81 #define FEC_RESET_DELAY 50
82
83 static int whack_reset(fec_t __iomem *fecp)
84 {
85 int i;
86
87 FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
88 for (i = 0; i < FEC_RESET_DELAY; i++) {
89 if ((FR(fecp, ecntrl) & FEC_ECNTRL_RESET) == 0)
90 return 0; /* OK */
91 udelay(1);
92 }
93
94 return -1;
95 }
96
97 static int do_pd_setup(struct fs_enet_private *fep)
98 {
99 struct of_device *ofdev = to_of_device(fep->dev);
100
101 fep->interrupt = of_irq_to_resource(ofdev->node, 0, NULL);
102 if (fep->interrupt == NO_IRQ)
103 return -EINVAL;
104
105 fep->fec.fecp = of_iomap(ofdev->node, 0);
106 if (!fep->fcc.fccp)
107 return -EINVAL;
108
109 return 0;
110 }
111
112 #define FEC_NAPI_RX_EVENT_MSK (FEC_ENET_RXF | FEC_ENET_RXB)
113 #define FEC_RX_EVENT (FEC_ENET_RXF)
114 #define FEC_TX_EVENT (FEC_ENET_TXF)
115 #define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR | FEC_ENET_BABR | \
116 FEC_ENET_BABT | FEC_ENET_EBERR)
117
118 static int setup_data(struct net_device *dev)
119 {
120 struct fs_enet_private *fep = netdev_priv(dev);
121
122 if (do_pd_setup(fep) != 0)
123 return -EINVAL;
124
125 fep->fec.hthi = 0;
126 fep->fec.htlo = 0;
127
128 fep->ev_napi_rx = FEC_NAPI_RX_EVENT_MSK;
129 fep->ev_rx = FEC_RX_EVENT;
130 fep->ev_tx = FEC_TX_EVENT;
131 fep->ev_err = FEC_ERR_EVENT_MSK;
132
133 return 0;
134 }
135
136 static int allocate_bd(struct net_device *dev)
137 {
138 struct fs_enet_private *fep = netdev_priv(dev);
139 const struct fs_platform_info *fpi = fep->fpi;
140
141 fep->ring_base = (void __force __iomem *)dma_alloc_coherent(fep->dev,
142 (fpi->tx_ring + fpi->rx_ring) *
143 sizeof(cbd_t), &fep->ring_mem_addr,
144 GFP_KERNEL);
145 if (fep->ring_base == NULL)
146 return -ENOMEM;
147
148 return 0;
149 }
150
151 static void free_bd(struct net_device *dev)
152 {
153 struct fs_enet_private *fep = netdev_priv(dev);
154 const struct fs_platform_info *fpi = fep->fpi;
155
156 if(fep->ring_base)
157 dma_free_coherent(fep->dev, (fpi->tx_ring + fpi->rx_ring)
158 * sizeof(cbd_t),
159 (void __force *)fep->ring_base,
160 fep->ring_mem_addr);
161 }
162
163 static void cleanup_data(struct net_device *dev)
164 {
165 /* nothing */
166 }
167
168 static void set_promiscuous_mode(struct net_device *dev)
169 {
170 struct fs_enet_private *fep = netdev_priv(dev);
171 fec_t __iomem *fecp = fep->fec.fecp;
172
173 FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
174 }
175
176 static void set_multicast_start(struct net_device *dev)
177 {
178 struct fs_enet_private *fep = netdev_priv(dev);
179
180 fep->fec.hthi = 0;
181 fep->fec.htlo = 0;
182 }
183
184 static void set_multicast_one(struct net_device *dev, const u8 *mac)
185 {
186 struct fs_enet_private *fep = netdev_priv(dev);
187 int temp, hash_index, i, j;
188 u32 crc, csrVal;
189 u8 byte, msb;
190
191 crc = 0xffffffff;
192 for (i = 0; i < 6; i++) {
193 byte = mac[i];
194 for (j = 0; j < 8; j++) {
195 msb = crc >> 31;
196 crc <<= 1;
197 if (msb ^ (byte & 0x1))
198 crc ^= FEC_CRC_POLY;
199 byte >>= 1;
200 }
201 }
202
203 temp = (crc & 0x3f) >> 1;
204 hash_index = ((temp & 0x01) << 4) |
205 ((temp & 0x02) << 2) |
206 ((temp & 0x04)) |
207 ((temp & 0x08) >> 2) |
208 ((temp & 0x10) >> 4);
209 csrVal = 1 << hash_index;
210 if (crc & 1)
211 fep->fec.hthi |= csrVal;
212 else
213 fep->fec.htlo |= csrVal;
214 }
215
216 static void set_multicast_finish(struct net_device *dev)
217 {
218 struct fs_enet_private *fep = netdev_priv(dev);
219 fec_t __iomem *fecp = fep->fec.fecp;
220
221 /* if all multi or too many multicasts; just enable all */
222 if ((dev->flags & IFF_ALLMULTI) != 0 ||
223 dev->mc_count > FEC_MAX_MULTICAST_ADDRS) {
224 fep->fec.hthi = 0xffffffffU;
225 fep->fec.htlo = 0xffffffffU;
226 }
227
228 FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
229 FW(fecp, hash_table_high, fep->fec.hthi);
230 FW(fecp, hash_table_low, fep->fec.htlo);
231 }
232
233 static void set_multicast_list(struct net_device *dev)
234 {
235 struct dev_mc_list *pmc;
236
237 if ((dev->flags & IFF_PROMISC) == 0) {
238 set_multicast_start(dev);
239 for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
240 set_multicast_one(dev, pmc->dmi_addr);
241 set_multicast_finish(dev);
242 } else
243 set_promiscuous_mode(dev);
244 }
245
246 static void restart(struct net_device *dev)
247 {
248 #ifdef CONFIG_DUET
249 immap_t *immap = fs_enet_immap;
250 u32 cptr;
251 #endif
252 struct fs_enet_private *fep = netdev_priv(dev);
253 fec_t __iomem *fecp = fep->fec.fecp;
254 const struct fs_platform_info *fpi = fep->fpi;
255 dma_addr_t rx_bd_base_phys, tx_bd_base_phys;
256 int r;
257 u32 addrhi, addrlo;
258
259 struct mii_bus* mii = fep->phydev->bus;
260 struct fec_info* fec_inf = mii->priv;
261
262 r = whack_reset(fep->fec.fecp);
263 if (r != 0)
264 printk(KERN_ERR DRV_MODULE_NAME
265 ": %s FEC Reset FAILED!\n", dev->name);
266 /*
267 * Set station address.
268 */
269 addrhi = ((u32) dev->dev_addr[0] << 24) |
270 ((u32) dev->dev_addr[1] << 16) |
271 ((u32) dev->dev_addr[2] << 8) |
272 (u32) dev->dev_addr[3];
273 addrlo = ((u32) dev->dev_addr[4] << 24) |
274 ((u32) dev->dev_addr[5] << 16);
275 FW(fecp, addr_low, addrhi);
276 FW(fecp, addr_high, addrlo);
277
278 /*
279 * Reset all multicast.
280 */
281 FW(fecp, hash_table_high, fep->fec.hthi);
282 FW(fecp, hash_table_low, fep->fec.htlo);
283
284 /*
285 * Set maximum receive buffer size.
286 */
287 FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
288 FW(fecp, r_hash, PKT_MAXBUF_SIZE);
289
290 /* get physical address */
291 rx_bd_base_phys = fep->ring_mem_addr;
292 tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring;
293
294 /*
295 * Set receive and transmit descriptor base.
296 */
297 FW(fecp, r_des_start, rx_bd_base_phys);
298 FW(fecp, x_des_start, tx_bd_base_phys);
299
300 fs_init_bds(dev);
301
302 /*
303 * Enable big endian and don't care about SDMA FC.
304 */
305 FW(fecp, fun_code, 0x78000000);
306
307 /*
308 * Set MII speed.
309 */
310 FW(fecp, mii_speed, fec_inf->mii_speed);
311
312 /*
313 * Clear any outstanding interrupt.
314 */
315 FW(fecp, ievent, 0xffc0);
316 FW(fecp, ivec, (virq_to_hw(fep->interrupt) / 2) << 29);
317
318 /*
319 * adjust to speed (only for DUET & RMII)
320 */
321 #ifdef CONFIG_DUET
322 if (fpi->use_rmii) {
323 cptr = in_be32(&immap->im_cpm.cp_cptr);
324 switch (fs_get_fec_index(fpi->fs_no)) {
325 case 0:
326 cptr |= 0x100;
327 if (fep->speed == 10)
328 cptr |= 0x0000010;
329 else if (fep->speed == 100)
330 cptr &= ~0x0000010;
331 break;
332 case 1:
333 cptr |= 0x80;
334 if (fep->speed == 10)
335 cptr |= 0x0000008;
336 else if (fep->speed == 100)
337 cptr &= ~0x0000008;
338 break;
339 default:
340 BUG(); /* should never happen */
341 break;
342 }
343 out_be32(&immap->im_cpm.cp_cptr, cptr);
344 }
345 #endif
346
347
348 FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
349 /*
350 * adjust to duplex mode
351 */
352 if (fep->phydev->duplex) {
353 FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
354 FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */
355 } else {
356 FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
357 FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */
358 }
359
360 /*
361 * Enable interrupts we wish to service.
362 */
363 FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
364 FEC_ENET_RXF | FEC_ENET_RXB);
365
366 /*
367 * And last, enable the transmit and receive processing.
368 */
369 FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
370 FW(fecp, r_des_active, 0x01000000);
371 }
372
373 static void stop(struct net_device *dev)
374 {
375 struct fs_enet_private *fep = netdev_priv(dev);
376 const struct fs_platform_info *fpi = fep->fpi;
377 fec_t __iomem *fecp = fep->fec.fecp;
378
379 struct fec_info* feci= fep->phydev->bus->priv;
380
381 int i;
382
383 if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
384 return; /* already down */
385
386 FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */
387 for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
388 i < FEC_RESET_DELAY; i++)
389 udelay(1);
390
391 if (i == FEC_RESET_DELAY)
392 printk(KERN_WARNING DRV_MODULE_NAME
393 ": %s FEC timeout on graceful transmit stop\n",
394 dev->name);
395 /*
396 * Disable FEC. Let only MII interrupts.
397 */
398 FW(fecp, imask, 0);
399 FC(fecp, ecntrl, FEC_ECNTRL_ETHER_EN);
400
401 fs_cleanup_bds(dev);
402
403 /* shut down FEC1? that's where the mii bus is */
404 if (fpi->has_phy) {
405 FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
406 FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
407 FW(fecp, ievent, FEC_ENET_MII);
408 FW(fecp, mii_speed, feci->mii_speed);
409 }
410 }
411
412 static void napi_clear_rx_event(struct net_device *dev)
413 {
414 struct fs_enet_private *fep = netdev_priv(dev);
415 fec_t __iomem *fecp = fep->fec.fecp;
416
417 FW(fecp, ievent, FEC_NAPI_RX_EVENT_MSK);
418 }
419
420 static void napi_enable_rx(struct net_device *dev)
421 {
422 struct fs_enet_private *fep = netdev_priv(dev);
423 fec_t __iomem *fecp = fep->fec.fecp;
424
425 FS(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
426 }
427
428 static void napi_disable_rx(struct net_device *dev)
429 {
430 struct fs_enet_private *fep = netdev_priv(dev);
431 fec_t __iomem *fecp = fep->fec.fecp;
432
433 FC(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
434 }
435
436 static void rx_bd_done(struct net_device *dev)
437 {
438 struct fs_enet_private *fep = netdev_priv(dev);
439 fec_t __iomem *fecp = fep->fec.fecp;
440
441 FW(fecp, r_des_active, 0x01000000);
442 }
443
444 static void tx_kickstart(struct net_device *dev)
445 {
446 struct fs_enet_private *fep = netdev_priv(dev);
447 fec_t __iomem *fecp = fep->fec.fecp;
448
449 FW(fecp, x_des_active, 0x01000000);
450 }
451
452 static u32 get_int_events(struct net_device *dev)
453 {
454 struct fs_enet_private *fep = netdev_priv(dev);
455 fec_t __iomem *fecp = fep->fec.fecp;
456
457 return FR(fecp, ievent) & FR(fecp, imask);
458 }
459
460 static void clear_int_events(struct net_device *dev, u32 int_events)
461 {
462 struct fs_enet_private *fep = netdev_priv(dev);
463 fec_t __iomem *fecp = fep->fec.fecp;
464
465 FW(fecp, ievent, int_events);
466 }
467
468 static void ev_error(struct net_device *dev, u32 int_events)
469 {
470 printk(KERN_WARNING DRV_MODULE_NAME
471 ": %s FEC ERROR(s) 0x%x\n", dev->name, int_events);
472 }
473
474 static int get_regs(struct net_device *dev, void *p, int *sizep)
475 {
476 struct fs_enet_private *fep = netdev_priv(dev);
477
478 if (*sizep < sizeof(fec_t))
479 return -EINVAL;
480
481 memcpy_fromio(p, fep->fec.fecp, sizeof(fec_t));
482
483 return 0;
484 }
485
486 static int get_regs_len(struct net_device *dev)
487 {
488 return sizeof(fec_t);
489 }
490
491 static void tx_restart(struct net_device *dev)
492 {
493 /* nothing */
494 }
495
496 /*************************************************************************/
497
498 const struct fs_ops fs_fec_ops = {
499 .setup_data = setup_data,
500 .cleanup_data = cleanup_data,
501 .set_multicast_list = set_multicast_list,
502 .restart = restart,
503 .stop = stop,
504 .napi_clear_rx_event = napi_clear_rx_event,
505 .napi_enable_rx = napi_enable_rx,
506 .napi_disable_rx = napi_disable_rx,
507 .rx_bd_done = rx_bd_done,
508 .tx_kickstart = tx_kickstart,
509 .get_int_events = get_int_events,
510 .clear_int_events = clear_int_events,
511 .ev_error = ev_error,
512 .get_regs = get_regs,
513 .get_regs_len = get_regs_len,
514 .tx_restart = tx_restart,
515 .allocate_bd = allocate_bd,
516 .free_bd = free_bd,
517 };
518
Nao low-level kernelspace/userspace library that runs on our robots, Nao-Team HTWK