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added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / drivers / media / video / em28xx / em28xx-core.c
blob94fb1b639a2e4c52762544a0cefb34b9486909b4
1 /*
2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
3
4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
5 Markus Rechberger <mrechberger@gmail.com>
6 Mauro Carvalho Chehab <mchehab@infradead.org>
7 Sascha Sommer <saschasommer@freenet.de>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/module.h>
27 #include <linux/usb.h>
28 #include <linux/vmalloc.h>
29 #include <media/v4l2-common.h>
30
31 #include "em28xx.h"
32
33 /* #define ENABLE_DEBUG_ISOC_FRAMES */
34
35 static unsigned int core_debug;
36 module_param(core_debug,int,0644);
37 MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
38
39 #define em28xx_coredbg(fmt, arg...) do {\
40 if (core_debug) \
41 printk(KERN_INFO "%s %s :"fmt, \
42 dev->name, __func__ , ##arg); } while (0)
43
44 static unsigned int reg_debug;
45 module_param(reg_debug,int,0644);
46 MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]");
47
48 #define em28xx_regdbg(fmt, arg...) do {\
49 if (reg_debug) \
50 printk(KERN_INFO "%s %s :"fmt, \
51 dev->name, __func__ , ##arg); } while (0)
52
53 static int alt = EM28XX_PINOUT;
54 module_param(alt, int, 0644);
55 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
56
57 /* FIXME */
58 #define em28xx_isocdbg(fmt, arg...) do {\
59 if (core_debug) \
60 printk(KERN_INFO "%s %s :"fmt, \
61 dev->name, __func__ , ##arg); } while (0)
62
63 /*
64 * em28xx_read_reg_req()
65 * reads data from the usb device specifying bRequest
66 */
67 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
68 char *buf, int len)
69 {
70 int ret;
71 int pipe = usb_rcvctrlpipe(dev->udev, 0);
72
73 if (dev->state & DEV_DISCONNECTED)
74 return -ENODEV;
75
76 if (len > URB_MAX_CTRL_SIZE)
77 return -EINVAL;
78
79 if (reg_debug) {
80 printk( KERN_DEBUG "(pipe 0x%08x): "
81 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
82 pipe,
83 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
84 req, 0, 0,
85 reg & 0xff, reg >> 8,
86 len & 0xff, len >> 8);
87 }
88
89 mutex_lock(&dev->ctrl_urb_lock);
90 ret = usb_control_msg(dev->udev, pipe, req,
91 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
92 0x0000, reg, dev->urb_buf, len, HZ);
93 if (ret < 0) {
94 if (reg_debug)
95 printk(" failed!\n");
96 mutex_unlock(&dev->ctrl_urb_lock);
97 return ret;
98 }
99
100 if (len)
101 memcpy(buf, dev->urb_buf, len);
102
103 mutex_unlock(&dev->ctrl_urb_lock);
104
105 if (reg_debug) {
106 int byte;
107
108 printk("<<<");
109 for (byte = 0; byte < len; byte++)
110 printk(" %02x", (unsigned char)buf[byte]);
111 printk("\n");
112 }
113
114 return ret;
115 }
116
117 /*
118 * em28xx_read_reg_req()
119 * reads data from the usb device specifying bRequest
120 */
121 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
122 {
123 int ret;
124 u8 val;
125
126 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
127 if (ret < 0)
128 return ret;
129
130 return val;
131 }
132
133 int em28xx_read_reg(struct em28xx *dev, u16 reg)
134 {
135 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
136 }
137
138 /*
139 * em28xx_write_regs_req()
140 * sends data to the usb device, specifying bRequest
141 */
142 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
143 int len)
144 {
145 int ret;
146 int pipe = usb_sndctrlpipe(dev->udev, 0);
147
148 if (dev->state & DEV_DISCONNECTED)
149 return -ENODEV;
150
151 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
152 return -EINVAL;
153
154 if (reg_debug) {
155 int byte;
156
157 printk( KERN_DEBUG "(pipe 0x%08x): "
158 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
159 pipe,
160 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
161 req, 0, 0,
162 reg & 0xff, reg >> 8,
163 len & 0xff, len >> 8);
164
165 for (byte = 0; byte < len; byte++)
166 printk(" %02x", (unsigned char)buf[byte]);
167 printk("\n");
168 }
169
170 mutex_lock(&dev->ctrl_urb_lock);
171 memcpy(dev->urb_buf, buf, len);
172 ret = usb_control_msg(dev->udev, pipe, req,
173 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
174 0x0000, reg, dev->urb_buf, len, HZ);
175 mutex_unlock(&dev->ctrl_urb_lock);
176
177 if (dev->wait_after_write)
178 msleep(dev->wait_after_write);
179
180 return ret;
181 }
182
183 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
184 {
185 int rc;
186
187 rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
188
189 /* Stores GPO/GPIO values at the cache, if changed
190 Only write values should be stored, since input on a GPIO
191 register will return the input bits.
192 Not sure what happens on reading GPO register.
193 */
194 if (rc >= 0) {
195 if (reg == dev->reg_gpo_num)
196 dev->reg_gpo = buf[0];
197 else if (reg == dev->reg_gpio_num)
198 dev->reg_gpio = buf[0];
199 }
200
201 return rc;
202 }
203
204 /* Write a single register */
205 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
206 {
207 return em28xx_write_regs(dev, reg, &val, 1);
208 }
209
210 /*
211 * em28xx_write_reg_bits()
212 * sets only some bits (specified by bitmask) of a register, by first reading
213 * the actual value
214 */
215 static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
216 u8 bitmask)
217 {
218 int oldval;
219 u8 newval;
220
221 /* Uses cache for gpo/gpio registers */
222 if (reg == dev->reg_gpo_num)
223 oldval = dev->reg_gpo;
224 else if (reg == dev->reg_gpio_num)
225 oldval = dev->reg_gpio;
226 else
227 oldval = em28xx_read_reg(dev, reg);
228
229 if (oldval < 0)
230 return oldval;
231
232 newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
233
234 return em28xx_write_regs(dev, reg, &newval, 1);
235 }
236
237 /*
238 * em28xx_is_ac97_ready()
239 * Checks if ac97 is ready
240 */
241 static int em28xx_is_ac97_ready(struct em28xx *dev)
242 {
243 int ret, i;
244
245 /* Wait up to 50 ms for AC97 command to complete */
246 for (i = 0; i < 10; i++, msleep(5)) {
247 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
248 if (ret < 0)
249 return ret;
250
251 if (!(ret & 0x01))
252 return 0;
253 }
254
255 em28xx_warn("AC97 command still being executed: not handled properly!\n");
256 return -EBUSY;
257 }
258
259 /*
260 * em28xx_read_ac97()
261 * write a 16 bit value to the specified AC97 address (LSB first!)
262 */
263 int em28xx_read_ac97(struct em28xx *dev, u8 reg)
264 {
265 int ret;
266 u8 addr = (reg & 0x7f) | 0x80;
267 u16 val;
268
269 ret = em28xx_is_ac97_ready(dev);
270 if (ret < 0)
271 return ret;
272
273 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
274 if (ret < 0)
275 return ret;
276
277 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
278 (u8 *)&val, sizeof(val));
279
280 if (ret < 0)
281 return ret;
282 return le16_to_cpu(val);
283 }
284
285 /*
286 * em28xx_write_ac97()
287 * write a 16 bit value to the specified AC97 address (LSB first!)
288 */
289 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
290 {
291 int ret;
292 u8 addr = reg & 0x7f;
293 __le16 value;
294
295 value = cpu_to_le16(val);
296
297 ret = em28xx_is_ac97_ready(dev);
298 if (ret < 0)
299 return ret;
300
301 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
302 if (ret < 0)
303 return ret;
304
305 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
306 if (ret < 0)
307 return ret;
308
309 return 0;
310 }
311
312 struct em28xx_vol_table {
313 enum em28xx_amux mux;
314 u8 reg;
315 };
316
317 static struct em28xx_vol_table inputs[] = {
318 { EM28XX_AMUX_VIDEO, AC97_VIDEO_VOL },
319 { EM28XX_AMUX_LINE_IN, AC97_LINEIN_VOL },
320 { EM28XX_AMUX_PHONE, AC97_PHONE_VOL },
321 { EM28XX_AMUX_MIC, AC97_MIC_VOL },
322 { EM28XX_AMUX_CD, AC97_CD_VOL },
323 { EM28XX_AMUX_AUX, AC97_AUX_VOL },
324 { EM28XX_AMUX_PCM_OUT, AC97_PCM_OUT_VOL },
325 };
326
327 static int set_ac97_input(struct em28xx *dev)
328 {
329 int ret, i;
330 enum em28xx_amux amux = dev->ctl_ainput;
331
332 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
333 em28xx should point to LINE IN, while AC97 should use VIDEO
334 */
335 if (amux == EM28XX_AMUX_VIDEO2)
336 amux = EM28XX_AMUX_VIDEO;
337
338 /* Mute all entres but the one that were selected */
339 for (i = 0; i < ARRAY_SIZE(inputs); i++) {
340 if (amux == inputs[i].mux)
341 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
342 else
343 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
344
345 if (ret < 0)
346 em28xx_warn("couldn't setup AC97 register %d\n",
347 inputs[i].reg);
348 }
349 return 0;
350 }
351
352 static int em28xx_set_audio_source(struct em28xx *dev)
353 {
354 int ret;
355 u8 input;
356
357 if (dev->board.is_em2800) {
358 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
359 input = EM2800_AUDIO_SRC_TUNER;
360 else
361 input = EM2800_AUDIO_SRC_LINE;
362
363 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
364 if (ret < 0)
365 return ret;
366 }
367
368 if (dev->board.has_msp34xx)
369 input = EM28XX_AUDIO_SRC_TUNER;
370 else {
371 switch (dev->ctl_ainput) {
372 case EM28XX_AMUX_VIDEO:
373 input = EM28XX_AUDIO_SRC_TUNER;
374 break;
375 default:
376 input = EM28XX_AUDIO_SRC_LINE;
377 break;
378 }
379 }
380
381 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
382 if (ret < 0)
383 return ret;
384 msleep(5);
385
386 switch (dev->audio_mode.ac97) {
387 case EM28XX_NO_AC97:
388 break;
389 default:
390 ret = set_ac97_input(dev);
391 }
392
393 return ret;
394 }
395
396 static const struct em28xx_vol_table outputs[] = {
397 { EM28XX_AOUT_MASTER, AC97_MASTER_VOL },
398 { EM28XX_AOUT_LINE, AC97_LINE_LEVEL_VOL },
399 { EM28XX_AOUT_MONO, AC97_MASTER_MONO_VOL },
400 { EM28XX_AOUT_LFE, AC97_LFE_MASTER_VOL },
401 { EM28XX_AOUT_SURR, AC97_SURR_MASTER_VOL },
402 };
403
404 int em28xx_audio_analog_set(struct em28xx *dev)
405 {
406 int ret, i;
407 u8 xclk;
408
409 if (!dev->audio_mode.has_audio)
410 return 0;
411
412 /* It is assumed that all devices use master volume for output.
413 It would be possible to use also line output.
414 */
415 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
416 /* Mute all outputs */
417 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
418 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
419 if (ret < 0)
420 em28xx_warn("couldn't setup AC97 register %d\n",
421 outputs[i].reg);
422 }
423 }
424
425 xclk = dev->board.xclk & 0x7f;
426 if (!dev->mute)
427 xclk |= 0x80;
428
429 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
430 if (ret < 0)
431 return ret;
432 msleep(10);
433
434 /* Selects the proper audio input */
435 ret = em28xx_set_audio_source(dev);
436
437 /* Sets volume */
438 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
439 int vol;
440
441 em28xx_write_ac97(dev, AC97_POWER_DOWN_CTRL, 0x4200);
442 em28xx_write_ac97(dev, AC97_EXT_AUD_CTRL, 0x0031);
443 em28xx_write_ac97(dev, AC97_PCM_IN_SRATE, 0xbb80);
444
445 /* LSB: left channel - both channels with the same level */
446 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
447
448 /* Mute device, if needed */
449 if (dev->mute)
450 vol |= 0x8000;
451
452 /* Sets volume */
453 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
454 if (dev->ctl_aoutput & outputs[i].mux)
455 ret = em28xx_write_ac97(dev, outputs[i].reg,
456 vol);
457 if (ret < 0)
458 em28xx_warn("couldn't setup AC97 register %d\n",
459 outputs[i].reg);
460 }
461
462 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
463 int sel = ac97_return_record_select(dev->ctl_aoutput);
464
465 /* Use the same input for both left and right channels */
466 sel |= (sel << 8);
467
468 em28xx_write_ac97(dev, AC97_RECORD_SELECT, sel);
469 }
470 }
471
472 return ret;
473 }
474 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
475
476 int em28xx_audio_setup(struct em28xx *dev)
477 {
478 int vid1, vid2, feat, cfg;
479 u32 vid;
480
481 if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874) {
482 /* Digital only device - don't load any alsa module */
483 dev->audio_mode.has_audio = 0;
484 dev->has_audio_class = 0;
485 dev->has_alsa_audio = 0;
486 return 0;
487 }
488
489 /* If device doesn't support Usb Audio Class, use vendor class */
490 if (!dev->has_audio_class)
491 dev->has_alsa_audio = 1;
492
493 dev->audio_mode.has_audio = 1;
494
495 /* See how this device is configured */
496 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
497 if (cfg < 0)
498 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
499 else
500 em28xx_info("Config register raw data: 0x%02x\n", cfg);
501
502 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
503 EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
504 em28xx_info("I2S Audio (3 sample rates)\n");
505 dev->audio_mode.i2s_3rates = 1;
506 }
507 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
508 EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
509 em28xx_info("I2S Audio (5 sample rates)\n");
510 dev->audio_mode.i2s_5rates = 1;
511 }
512
513 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
514 /* Skip the code that does AC97 vendor detection */
515 dev->audio_mode.ac97 = EM28XX_NO_AC97;
516 goto init_audio;
517 }
518
519 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
520
521 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
522 if (vid1 < 0) {
523 /* Device likely doesn't support AC97 */
524 em28xx_warn("AC97 chip type couldn't be determined\n");
525 goto init_audio;
526 }
527
528 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
529 if (vid2 < 0)
530 goto init_audio;
531
532 vid = vid1 << 16 | vid2;
533
534 dev->audio_mode.ac97_vendor_id = vid;
535 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
536
537 feat = em28xx_read_ac97(dev, AC97_RESET);
538 if (feat < 0)
539 goto init_audio;
540
541 dev->audio_mode.ac97_feat = feat;
542 em28xx_warn("AC97 features = 0x%04x\n", feat);
543
544 /* Try to identify what audio processor we have */
545 if ((vid == 0xffffffff) && (feat == 0x6a90))
546 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
547 else if ((vid >> 8) == 0x838476)
548 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
549
550 init_audio:
551 /* Reports detected AC97 processor */
552 switch (dev->audio_mode.ac97) {
553 case EM28XX_NO_AC97:
554 em28xx_info("No AC97 audio processor\n");
555 break;
556 case EM28XX_AC97_EM202:
557 em28xx_info("Empia 202 AC97 audio processor detected\n");
558 break;
559 case EM28XX_AC97_SIGMATEL:
560 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
561 dev->audio_mode.ac97_vendor_id & 0xff);
562 break;
563 case EM28XX_AC97_OTHER:
564 em28xx_warn("Unknown AC97 audio processor detected!\n");
565 break;
566 default:
567 break;
568 }
569
570 return em28xx_audio_analog_set(dev);
571 }
572 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
573
574 int em28xx_colorlevels_set_default(struct em28xx *dev)
575 {
576 em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10); /* contrast */
577 em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00); /* brightness */
578 em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10); /* saturation */
579 em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
580 em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
581 em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);
582
583 em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
584 em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
585 em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
586 em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
587 em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
588 em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
589 return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
590 }
591
592 int em28xx_capture_start(struct em28xx *dev, int start)
593 {
594 int rc;
595
596 if (dev->chip_id == CHIP_ID_EM2874) {
597 /* The Transport Stream Enable Register moved in em2874 */
598 if (!start) {
599 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
600 0x00,
601 EM2874_TS1_CAPTURE_ENABLE);
602 return rc;
603 }
604
605 /* Enable Transport Stream */
606 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
607 EM2874_TS1_CAPTURE_ENABLE,
608 EM2874_TS1_CAPTURE_ENABLE);
609 return rc;
610 }
611
612
613 /* FIXME: which is the best order? */
614 /* video registers are sampled by VREF */
615 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
616 start ? 0x10 : 0x00, 0x10);
617 if (rc < 0)
618 return rc;
619
620 if (!start) {
621 /* disable video capture */
622 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
623 return rc;
624 }
625
626 /* enable video capture */
627 rc = em28xx_write_reg(dev, 0x48, 0x00);
628
629 if (dev->mode == EM28XX_ANALOG_MODE)
630 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
631 else
632 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
633
634 msleep(6);
635
636 return rc;
637 }
638
639 int em28xx_set_outfmt(struct em28xx *dev)
640 {
641 int ret;
642
643 ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT,
644 dev->format->reg | 0x20, 0x3f);
645 if (ret < 0)
646 return ret;
647
648 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, 0x10);
649 if (ret < 0)
650 return ret;
651
652 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, 0x11);
653 }
654
655 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
656 u8 ymin, u8 ymax)
657 {
658 em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
659 xmin, ymin, xmax, ymax);
660
661 em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
662 em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
663 em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
664 return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
665 }
666
667 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
668 u16 width, u16 height)
669 {
670 u8 cwidth = width;
671 u8 cheight = height;
672 u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
673
674 em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
675 (width | (overflow & 2) << 7),
676 (height | (overflow & 1) << 8));
677
678 em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
679 em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
680 em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
681 em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
682 return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
683 }
684
685 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
686 {
687 u8 mode;
688 /* the em2800 scaler only supports scaling down to 50% */
689 if (dev->board.is_em2800)
690 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
691 else {
692 u8 buf[2];
693 buf[0] = h;
694 buf[1] = h >> 8;
695 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
696 buf[0] = v;
697 buf[1] = v >> 8;
698 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
699 /* it seems that both H and V scalers must be active
700 to work correctly */
701 mode = (h || v)? 0x30: 0x00;
702 }
703 return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
704 }
705
706 /* FIXME: this only function read values from dev */
707 int em28xx_resolution_set(struct em28xx *dev)
708 {
709 int width, height;
710 width = norm_maxw(dev);
711 height = norm_maxh(dev) >> 1;
712
713 em28xx_set_outfmt(dev);
714 em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
715 em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
716 return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
717 }
718
719 int em28xx_set_alternate(struct em28xx *dev)
720 {
721 int errCode, prev_alt = dev->alt;
722 int i;
723 unsigned int min_pkt_size = dev->width * 2 + 4;
724
725 /* When image size is bigger than a certain value,
726 the frame size should be increased, otherwise, only
727 green screen will be received.
728 */
729 if (dev->width * 2 * dev->height > 720 * 240 * 2)
730 min_pkt_size *= 2;
731
732 for (i = 0; i < dev->num_alt; i++) {
733 /* stop when the selected alt setting offers enough bandwidth */
734 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
735 dev->alt = i;
736 break;
737 /* otherwise make sure that we end up with the maximum bandwidth
738 because the min_pkt_size equation might be wrong...
739 */
740 } else if (dev->alt_max_pkt_size[i] >
741 dev->alt_max_pkt_size[dev->alt])
742 dev->alt = i;
743 }
744
745 if (dev->alt != prev_alt) {
746 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
747 min_pkt_size, dev->alt);
748 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
749 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
750 dev->alt, dev->max_pkt_size);
751 errCode = usb_set_interface(dev->udev, 0, dev->alt);
752 if (errCode < 0) {
753 em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
754 dev->alt, errCode);
755 return errCode;
756 }
757 }
758 return 0;
759 }
760
761 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
762 {
763 int rc = 0;
764
765 if (!gpio)
766 return rc;
767
768 if (dev->mode != EM28XX_SUSPEND) {
769 em28xx_write_reg(dev, 0x48, 0x00);
770 if (dev->mode == EM28XX_ANALOG_MODE)
771 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
772 else
773 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
774 msleep(6);
775 }
776
777 /* Send GPIO reset sequences specified at board entry */
778 while (gpio->sleep >= 0) {
779 if (gpio->reg >= 0) {
780 rc = em28xx_write_reg_bits(dev,
781 gpio->reg,
782 gpio->val,
783 gpio->mask);
784 if (rc < 0)
785 return rc;
786 }
787 if (gpio->sleep > 0)
788 msleep(gpio->sleep);
789
790 gpio++;
791 }
792 return rc;
793 }
794
795 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
796 {
797 if (dev->mode == set_mode)
798 return 0;
799
800 if (set_mode == EM28XX_SUSPEND) {
801 dev->mode = set_mode;
802
803 /* FIXME: add suspend support for ac97 */
804
805 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
806 }
807
808 dev->mode = set_mode;
809
810 if (dev->mode == EM28XX_DIGITAL_MODE)
811 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
812 else
813 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
814 }
815 EXPORT_SYMBOL_GPL(em28xx_set_mode);
816
817 /* ------------------------------------------------------------------
818 URB control
819 ------------------------------------------------------------------*/
820
821 /*
822 * IRQ callback, called by URB callback
823 */
824 static void em28xx_irq_callback(struct urb *urb)
825 {
826 struct em28xx_dmaqueue *dma_q = urb->context;
827 struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
828 int rc, i;
829
830 /* Copy data from URB */
831 spin_lock(&dev->slock);
832 rc = dev->isoc_ctl.isoc_copy(dev, urb);
833 spin_unlock(&dev->slock);
834
835 /* Reset urb buffers */
836 for (i = 0; i < urb->number_of_packets; i++) {
837 urb->iso_frame_desc[i].status = 0;
838 urb->iso_frame_desc[i].actual_length = 0;
839 }
840 urb->status = 0;
841
842 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
843 if (urb->status) {
844 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
845 urb->status);
846 }
847 }
848
849 /*
850 * Stop and Deallocate URBs
851 */
852 void em28xx_uninit_isoc(struct em28xx *dev)
853 {
854 struct urb *urb;
855 int i;
856
857 em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
858
859 dev->isoc_ctl.nfields = -1;
860 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
861 urb = dev->isoc_ctl.urb[i];
862 if (urb) {
863 if (!irqs_disabled())
864 usb_kill_urb(urb);
865 else
866 usb_unlink_urb(urb);
867
868 if (dev->isoc_ctl.transfer_buffer[i]) {
869 usb_buffer_free(dev->udev,
870 urb->transfer_buffer_length,
871 dev->isoc_ctl.transfer_buffer[i],
872 urb->transfer_dma);
873 }
874 usb_free_urb(urb);
875 dev->isoc_ctl.urb[i] = NULL;
876 }
877 dev->isoc_ctl.transfer_buffer[i] = NULL;
878 }
879
880 kfree(dev->isoc_ctl.urb);
881 kfree(dev->isoc_ctl.transfer_buffer);
882
883 dev->isoc_ctl.urb = NULL;
884 dev->isoc_ctl.transfer_buffer = NULL;
885 dev->isoc_ctl.num_bufs = 0;
886
887 em28xx_capture_start(dev, 0);
888 }
889 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
890
891 /*
892 * Allocate URBs and start IRQ
893 */
894 int em28xx_init_isoc(struct em28xx *dev, int max_packets,
895 int num_bufs, int max_pkt_size,
896 int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
897 {
898 struct em28xx_dmaqueue *dma_q = &dev->vidq;
899 int i;
900 int sb_size, pipe;
901 struct urb *urb;
902 int j, k;
903 int rc;
904
905 em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
906
907 /* De-allocates all pending stuff */
908 em28xx_uninit_isoc(dev);
909
910 dev->isoc_ctl.isoc_copy = isoc_copy;
911 dev->isoc_ctl.num_bufs = num_bufs;
912
913 dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
914 if (!dev->isoc_ctl.urb) {
915 em28xx_errdev("cannot alloc memory for usb buffers\n");
916 return -ENOMEM;
917 }
918
919 dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
920 GFP_KERNEL);
921 if (!dev->isoc_ctl.transfer_buffer) {
922 em28xx_errdev("cannot allocate memory for usbtransfer\n");
923 kfree(dev->isoc_ctl.urb);
924 return -ENOMEM;
925 }
926
927 dev->isoc_ctl.max_pkt_size = max_pkt_size;
928 dev->isoc_ctl.buf = NULL;
929
930 sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
931
932 /* allocate urbs and transfer buffers */
933 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
934 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
935 if (!urb) {
936 em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
937 em28xx_uninit_isoc(dev);
938 return -ENOMEM;
939 }
940 dev->isoc_ctl.urb[i] = urb;
941
942 dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
943 sb_size, GFP_KERNEL, &urb->transfer_dma);
944 if (!dev->isoc_ctl.transfer_buffer[i]) {
945 em28xx_err("unable to allocate %i bytes for transfer"
946 " buffer %i%s\n",
947 sb_size, i,
948 in_interrupt()?" while in int":"");
949 em28xx_uninit_isoc(dev);
950 return -ENOMEM;
951 }
952 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
953
954 /* FIXME: this is a hack - should be
955 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
956 should also be using 'desc.bInterval'
957 */
958 pipe = usb_rcvisocpipe(dev->udev,
959 dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
960
961 usb_fill_int_urb(urb, dev->udev, pipe,
962 dev->isoc_ctl.transfer_buffer[i], sb_size,
963 em28xx_irq_callback, dma_q, 1);
964
965 urb->number_of_packets = max_packets;
966 urb->transfer_flags = URB_ISO_ASAP;
967
968 k = 0;
969 for (j = 0; j < max_packets; j++) {
970 urb->iso_frame_desc[j].offset = k;
971 urb->iso_frame_desc[j].length =
972 dev->isoc_ctl.max_pkt_size;
973 k += dev->isoc_ctl.max_pkt_size;
974 }
975 }
976
977 init_waitqueue_head(&dma_q->wq);
978
979 em28xx_capture_start(dev, 1);
980
981 /* submit urbs and enables IRQ */
982 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
983 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
984 if (rc) {
985 em28xx_err("submit of urb %i failed (error=%i)\n", i,
986 rc);
987 em28xx_uninit_isoc(dev);
988 return rc;
989 }
990 }
991
992 return 0;
993 }
994 EXPORT_SYMBOL_GPL(em28xx_init_isoc);
995
996 /*
997 * em28xx_wake_i2c()
998 * configure i2c attached devices
999 */
1000 void em28xx_wake_i2c(struct em28xx *dev)
1001 {
1002 struct v4l2_routing route;
1003 int zero = 0;
1004
1005 route.input = INPUT(dev->ctl_input)->vmux;
1006 route.output = 0;
1007 em28xx_i2c_call_clients(dev, VIDIOC_INT_RESET, &zero);
1008 em28xx_i2c_call_clients(dev, VIDIOC_INT_S_VIDEO_ROUTING, &route);
1009 em28xx_i2c_call_clients(dev, VIDIOC_STREAMON, NULL);
1010 }
1011
1012 /*
1013 * Device control list
1014 */
1015
1016 static LIST_HEAD(em28xx_devlist);
1017 static DEFINE_MUTEX(em28xx_devlist_mutex);
1018
1019 struct em28xx *em28xx_get_device(int minor,
1020 enum v4l2_buf_type *fh_type,
1021 int *has_radio)
1022 {
1023 struct em28xx *h, *dev = NULL;
1024
1025 *fh_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1026 *has_radio = 0;
1027
1028 mutex_lock(&em28xx_devlist_mutex);
1029 list_for_each_entry(h, &em28xx_devlist, devlist) {
1030 if (h->vdev->minor == minor)
1031 dev = h;
1032 if (h->vbi_dev->minor == minor) {
1033 dev = h;
1034 *fh_type = V4L2_BUF_TYPE_VBI_CAPTURE;
1035 }
1036 if (h->radio_dev &&
1037 h->radio_dev->minor == minor) {
1038 dev = h;
1039 *has_radio = 1;
1040 }
1041 }
1042 mutex_unlock(&em28xx_devlist_mutex);
1043
1044 return dev;
1045 }
1046
1047 /*
1048 * em28xx_realease_resources()
1049 * unregisters the v4l2,i2c and usb devices
1050 * called when the device gets disconected or at module unload
1051 */
1052 void em28xx_remove_from_devlist(struct em28xx *dev)
1053 {
1054 mutex_lock(&em28xx_devlist_mutex);
1055 list_del(&dev->devlist);
1056 mutex_unlock(&em28xx_devlist_mutex);
1057 };
1058
1059 void em28xx_add_into_devlist(struct em28xx *dev)
1060 {
1061 mutex_lock(&em28xx_devlist_mutex);
1062 list_add_tail(&dev->devlist, &em28xx_devlist);
1063 mutex_unlock(&em28xx_devlist_mutex);
1064 };
1065
1066 /*
1067 * Extension interface
1068 */
1069
1070 static LIST_HEAD(em28xx_extension_devlist);
1071 static DEFINE_MUTEX(em28xx_extension_devlist_lock);
1072
1073 int em28xx_register_extension(struct em28xx_ops *ops)
1074 {
1075 struct em28xx *dev = NULL;
1076
1077 mutex_lock(&em28xx_devlist_mutex);
1078 mutex_lock(&em28xx_extension_devlist_lock);
1079 list_add_tail(&ops->next, &em28xx_extension_devlist);
1080 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1081 if (dev)
1082 ops->init(dev);
1083 }
1084 printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name);
1085 mutex_unlock(&em28xx_extension_devlist_lock);
1086 mutex_unlock(&em28xx_devlist_mutex);
1087 return 0;
1088 }
1089 EXPORT_SYMBOL(em28xx_register_extension);
1090
1091 void em28xx_unregister_extension(struct em28xx_ops *ops)
1092 {
1093 struct em28xx *dev = NULL;
1094
1095 mutex_lock(&em28xx_devlist_mutex);
1096 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1097 if (dev)
1098 ops->fini(dev);
1099 }
1100
1101 mutex_lock(&em28xx_extension_devlist_lock);
1102 printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
1103 list_del(&ops->next);
1104 mutex_unlock(&em28xx_extension_devlist_lock);
1105 mutex_unlock(&em28xx_devlist_mutex);
1106 }
1107 EXPORT_SYMBOL(em28xx_unregister_extension);
1108
1109 void em28xx_init_extension(struct em28xx *dev)
1110 {
1111 struct em28xx_ops *ops = NULL;
1112
1113 mutex_lock(&em28xx_extension_devlist_lock);
1114 if (!list_empty(&em28xx_extension_devlist)) {
1115 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1116 if (ops->init)
1117 ops->init(dev);
1118 }
1119 }
1120 mutex_unlock(&em28xx_extension_devlist_lock);
1121 }
1122
1123 void em28xx_close_extension(struct em28xx *dev)
1124 {
1125 struct em28xx_ops *ops = NULL;
1126
1127 mutex_lock(&em28xx_extension_devlist_lock);
1128 if (!list_empty(&em28xx_extension_devlist)) {
1129 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1130 if (ops->fini)
1131 ops->fini(dev);
1132 }
1133 }
1134 mutex_unlock(&em28xx_extension_devlist_lock);
1135 }
Nao low-level kernelspace/userspace library that runs on our robots, Nao-Team HTWK