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added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / drivers / media / dvb / frontends / lgdt330x.c
blob056387b41a8fc516e36e8b02d0835562a77eb8ec
1 /*
2 * Support for LGDT3302 and LGDT3303 - VSB/QAM
3 *
4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
22 /*
23 * NOTES ABOUT THIS DRIVER
24 *
25 * This Linux driver supports:
26 * DViCO FusionHDTV 3 Gold-Q
27 * DViCO FusionHDTV 3 Gold-T
28 * DViCO FusionHDTV 5 Gold
29 * DViCO FusionHDTV 5 Lite
30 * DViCO FusionHDTV 5 USB Gold
31 * Air2PC/AirStar 2 ATSC 3rd generation (HD5000)
32 * pcHDTV HD5500
33 *
34 */
35
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <linux/string.h>
41 #include <linux/slab.h>
42 #include <asm/byteorder.h>
43
44 #include "dvb_frontend.h"
45 #include "dvb_math.h"
46 #include "lgdt330x_priv.h"
47 #include "lgdt330x.h"
48
49 /* Use Equalizer Mean Squared Error instead of Phaser Tracker MSE */
50 /* #define USE_EQMSE */
51
52 static int debug;
53 module_param(debug, int, 0644);
54 MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
55 #define dprintk(args...) \
56 do { \
57 if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
58 } while (0)
59
60 struct lgdt330x_state
61 {
62 struct i2c_adapter* i2c;
63
64 /* Configuration settings */
65 const struct lgdt330x_config* config;
66
67 struct dvb_frontend frontend;
68
69 /* Demodulator private data */
70 fe_modulation_t current_modulation;
71 u32 snr; /* Result of last SNR calculation */
72
73 /* Tuner private data */
74 u32 current_frequency;
75 };
76
77 static int i2c_write_demod_bytes (struct lgdt330x_state* state,
78 u8 *buf, /* data bytes to send */
79 int len /* number of bytes to send */ )
80 {
81 struct i2c_msg msg =
82 { .addr = state->config->demod_address,
83 .flags = 0,
84 .buf = buf,
85 .len = 2 };
86 int i;
87 int err;
88
89 for (i=0; i<len-1; i+=2){
90 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
91 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __func__, msg.buf[0], msg.buf[1], err);
92 if (err < 0)
93 return err;
94 else
95 return -EREMOTEIO;
96 }
97 msg.buf += 2;
98 }
99 return 0;
100 }
101
102 /*
103 * This routine writes the register (reg) to the demod bus
104 * then reads the data returned for (len) bytes.
105 */
106
107 static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
108 enum I2C_REG reg, u8* buf, int len)
109 {
110 u8 wr [] = { reg };
111 struct i2c_msg msg [] = {
112 { .addr = state->config->demod_address,
113 .flags = 0, .buf = wr, .len = 1 },
114 { .addr = state->config->demod_address,
115 .flags = I2C_M_RD, .buf = buf, .len = len },
116 };
117 int ret;
118 ret = i2c_transfer(state->i2c, msg, 2);
119 if (ret != 2) {
120 printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __func__, state->config->demod_address, reg, ret);
121 } else {
122 ret = 0;
123 }
124 return ret;
125 }
126
127 /* Software reset */
128 static int lgdt3302_SwReset(struct lgdt330x_state* state)
129 {
130 u8 ret;
131 u8 reset[] = {
132 IRQ_MASK,
133 0x00 /* bit 6 is active low software reset
134 * bits 5-0 are 1 to mask interrupts */
135 };
136
137 ret = i2c_write_demod_bytes(state,
138 reset, sizeof(reset));
139 if (ret == 0) {
140
141 /* force reset high (inactive) and unmask interrupts */
142 reset[1] = 0x7f;
143 ret = i2c_write_demod_bytes(state,
144 reset, sizeof(reset));
145 }
146 return ret;
147 }
148
149 static int lgdt3303_SwReset(struct lgdt330x_state* state)
150 {
151 u8 ret;
152 u8 reset[] = {
153 0x02,
154 0x00 /* bit 0 is active low software reset */
155 };
156
157 ret = i2c_write_demod_bytes(state,
158 reset, sizeof(reset));
159 if (ret == 0) {
160
161 /* force reset high (inactive) */
162 reset[1] = 0x01;
163 ret = i2c_write_demod_bytes(state,
164 reset, sizeof(reset));
165 }
166 return ret;
167 }
168
169 static int lgdt330x_SwReset(struct lgdt330x_state* state)
170 {
171 switch (state->config->demod_chip) {
172 case LGDT3302:
173 return lgdt3302_SwReset(state);
174 case LGDT3303:
175 return lgdt3303_SwReset(state);
176 default:
177 return -ENODEV;
178 }
179 }
180
181 static int lgdt330x_init(struct dvb_frontend* fe)
182 {
183 /* Hardware reset is done using gpio[0] of cx23880x chip.
184 * I'd like to do it here, but don't know how to find chip address.
185 * cx88-cards.c arranges for the reset bit to be inactive (high).
186 * Maybe there needs to be a callable function in cx88-core or
187 * the caller of this function needs to do it. */
188
189 /*
190 * Array of byte pairs <address, value>
191 * to initialize each different chip
192 */
193 static u8 lgdt3302_init_data[] = {
194 /* Use 50MHz parameter values from spec sheet since xtal is 50 */
195 /* Change the value of NCOCTFV[25:0] of carrier
196 recovery center frequency register */
197 VSB_CARRIER_FREQ0, 0x00,
198 VSB_CARRIER_FREQ1, 0x87,
199 VSB_CARRIER_FREQ2, 0x8e,
200 VSB_CARRIER_FREQ3, 0x01,
201 /* Change the TPCLK pin polarity
202 data is valid on falling clock */
203 DEMUX_CONTROL, 0xfb,
204 /* Change the value of IFBW[11:0] of
205 AGC IF/RF loop filter bandwidth register */
206 AGC_RF_BANDWIDTH0, 0x40,
207 AGC_RF_BANDWIDTH1, 0x93,
208 AGC_RF_BANDWIDTH2, 0x00,
209 /* Change the value of bit 6, 'nINAGCBY' and
210 'NSSEL[1:0] of ACG function control register 2 */
211 AGC_FUNC_CTRL2, 0xc6,
212 /* Change the value of bit 6 'RFFIX'
213 of AGC function control register 3 */
214 AGC_FUNC_CTRL3, 0x40,
215 /* Set the value of 'INLVTHD' register 0x2a/0x2c
216 to 0x7fe */
217 AGC_DELAY0, 0x07,
218 AGC_DELAY2, 0xfe,
219 /* Change the value of IAGCBW[15:8]
220 of inner AGC loop filter bandwidth */
221 AGC_LOOP_BANDWIDTH0, 0x08,
222 AGC_LOOP_BANDWIDTH1, 0x9a
223 };
224
225 static u8 lgdt3303_init_data[] = {
226 0x4c, 0x14
227 };
228
229 static u8 flip_1_lgdt3303_init_data[] = {
230 0x4c, 0x14,
231 0x87, 0xf3
232 };
233
234 static u8 flip_2_lgdt3303_init_data[] = {
235 0x4c, 0x14,
236 0x87, 0xda
237 };
238
239 struct lgdt330x_state* state = fe->demodulator_priv;
240 char *chip_name;
241 int err;
242
243 switch (state->config->demod_chip) {
244 case LGDT3302:
245 chip_name = "LGDT3302";
246 err = i2c_write_demod_bytes(state, lgdt3302_init_data,
247 sizeof(lgdt3302_init_data));
248 break;
249 case LGDT3303:
250 chip_name = "LGDT3303";
251 switch (state->config->clock_polarity_flip) {
252 case 2:
253 err = i2c_write_demod_bytes(state,
254 flip_2_lgdt3303_init_data,
255 sizeof(flip_2_lgdt3303_init_data));
256 break;
257 case 1:
258 err = i2c_write_demod_bytes(state,
259 flip_1_lgdt3303_init_data,
260 sizeof(flip_1_lgdt3303_init_data));
261 break;
262 case 0:
263 default:
264 err = i2c_write_demod_bytes(state, lgdt3303_init_data,
265 sizeof(lgdt3303_init_data));
266 }
267 break;
268 default:
269 chip_name = "undefined";
270 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
271 err = -ENODEV;
272 }
273 dprintk("%s entered as %s\n", __func__, chip_name);
274 if (err < 0)
275 return err;
276 return lgdt330x_SwReset(state);
277 }
278
279 static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
280 {
281 *ber = 0; /* Not supplied by the demod chips */
282 return 0;
283 }
284
285 static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
286 {
287 struct lgdt330x_state* state = fe->demodulator_priv;
288 int err;
289 u8 buf[2];
290
291 switch (state->config->demod_chip) {
292 case LGDT3302:
293 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
294 buf, sizeof(buf));
295 break;
296 case LGDT3303:
297 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
298 buf, sizeof(buf));
299 break;
300 default:
301 printk(KERN_WARNING
302 "Only LGDT3302 and LGDT3303 are supported chips.\n");
303 err = -ENODEV;
304 }
305
306 *ucblocks = (buf[0] << 8) | buf[1];
307 return 0;
308 }
309
310 static int lgdt330x_set_parameters(struct dvb_frontend* fe,
311 struct dvb_frontend_parameters *param)
312 {
313 /*
314 * Array of byte pairs <address, value>
315 * to initialize 8VSB for lgdt3303 chip 50 MHz IF
316 */
317 static u8 lgdt3303_8vsb_44_data[] = {
318 0x04, 0x00,
319 0x0d, 0x40,
320 0x0e, 0x87,
321 0x0f, 0x8e,
322 0x10, 0x01,
323 0x47, 0x8b };
324
325 /*
326 * Array of byte pairs <address, value>
327 * to initialize QAM for lgdt3303 chip
328 */
329 static u8 lgdt3303_qam_data[] = {
330 0x04, 0x00,
331 0x0d, 0x00,
332 0x0e, 0x00,
333 0x0f, 0x00,
334 0x10, 0x00,
335 0x51, 0x63,
336 0x47, 0x66,
337 0x48, 0x66,
338 0x4d, 0x1a,
339 0x49, 0x08,
340 0x4a, 0x9b };
341
342 struct lgdt330x_state* state = fe->demodulator_priv;
343
344 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
345
346 int err;
347 /* Change only if we are actually changing the modulation */
348 if (state->current_modulation != param->u.vsb.modulation) {
349 switch(param->u.vsb.modulation) {
350 case VSB_8:
351 dprintk("%s: VSB_8 MODE\n", __func__);
352
353 /* Select VSB mode */
354 top_ctrl_cfg[1] = 0x03;
355
356 /* Select ANT connector if supported by card */
357 if (state->config->pll_rf_set)
358 state->config->pll_rf_set(fe, 1);
359
360 if (state->config->demod_chip == LGDT3303) {
361 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
362 sizeof(lgdt3303_8vsb_44_data));
363 }
364 break;
365
366 case QAM_64:
367 dprintk("%s: QAM_64 MODE\n", __func__);
368
369 /* Select QAM_64 mode */
370 top_ctrl_cfg[1] = 0x00;
371
372 /* Select CABLE connector if supported by card */
373 if (state->config->pll_rf_set)
374 state->config->pll_rf_set(fe, 0);
375
376 if (state->config->demod_chip == LGDT3303) {
377 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
378 sizeof(lgdt3303_qam_data));
379 }
380 break;
381
382 case QAM_256:
383 dprintk("%s: QAM_256 MODE\n", __func__);
384
385 /* Select QAM_256 mode */
386 top_ctrl_cfg[1] = 0x01;
387
388 /* Select CABLE connector if supported by card */
389 if (state->config->pll_rf_set)
390 state->config->pll_rf_set(fe, 0);
391
392 if (state->config->demod_chip == LGDT3303) {
393 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
394 sizeof(lgdt3303_qam_data));
395 }
396 break;
397 default:
398 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __func__, param->u.vsb.modulation);
399 return -1;
400 }
401 /*
402 * select serial or parallel MPEG harware interface
403 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
404 * Parallel: 0x00
405 */
406 top_ctrl_cfg[1] |= state->config->serial_mpeg;
407
408 /* Select the requested mode */
409 i2c_write_demod_bytes(state, top_ctrl_cfg,
410 sizeof(top_ctrl_cfg));
411 if (state->config->set_ts_params)
412 state->config->set_ts_params(fe, 0);
413 state->current_modulation = param->u.vsb.modulation;
414 }
415
416 /* Tune to the specified frequency */
417 if (fe->ops.tuner_ops.set_params) {
418 fe->ops.tuner_ops.set_params(fe, param);
419 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
420 }
421
422 /* Keep track of the new frequency */
423 /* FIXME this is the wrong way to do this... */
424 /* The tuner is shared with the video4linux analog API */
425 state->current_frequency = param->frequency;
426
427 lgdt330x_SwReset(state);
428 return 0;
429 }
430
431 static int lgdt330x_get_frontend(struct dvb_frontend* fe,
432 struct dvb_frontend_parameters* param)
433 {
434 struct lgdt330x_state *state = fe->demodulator_priv;
435 param->frequency = state->current_frequency;
436 return 0;
437 }
438
439 static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
440 {
441 struct lgdt330x_state* state = fe->demodulator_priv;
442 u8 buf[3];
443
444 *status = 0; /* Reset status result */
445
446 /* AGC status register */
447 i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
448 dprintk("%s: AGC_STATUS = 0x%02x\n", __func__, buf[0]);
449 if ((buf[0] & 0x0c) == 0x8){
450 /* Test signal does not exist flag */
451 /* as well as the AGC lock flag. */
452 *status |= FE_HAS_SIGNAL;
453 }
454
455 /*
456 * You must set the Mask bits to 1 in the IRQ_MASK in order
457 * to see that status bit in the IRQ_STATUS register.
458 * This is done in SwReset();
459 */
460 /* signal status */
461 i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
462 dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __func__, buf[0], buf[1], buf[2]);
463
464
465 /* sync status */
466 if ((buf[2] & 0x03) == 0x01) {
467 *status |= FE_HAS_SYNC;
468 }
469
470 /* FEC error status */
471 if ((buf[2] & 0x0c) == 0x08) {
472 *status |= FE_HAS_LOCK;
473 *status |= FE_HAS_VITERBI;
474 }
475
476 /* Carrier Recovery Lock Status Register */
477 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
478 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __func__, buf[0]);
479 switch (state->current_modulation) {
480 case QAM_256:
481 case QAM_64:
482 /* Need to undestand why there are 3 lock levels here */
483 if ((buf[0] & 0x07) == 0x07)
484 *status |= FE_HAS_CARRIER;
485 break;
486 case VSB_8:
487 if ((buf[0] & 0x80) == 0x80)
488 *status |= FE_HAS_CARRIER;
489 break;
490 default:
491 printk(KERN_WARNING "lgdt330x: %s: Modulation set to unsupported value\n", __func__);
492 }
493
494 return 0;
495 }
496
497 static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
498 {
499 struct lgdt330x_state* state = fe->demodulator_priv;
500 int err;
501 u8 buf[3];
502
503 *status = 0; /* Reset status result */
504
505 /* lgdt3303 AGC status register */
506 err = i2c_read_demod_bytes(state, 0x58, buf, 1);
507 if (err < 0)
508 return err;
509
510 dprintk("%s: AGC_STATUS = 0x%02x\n", __func__, buf[0]);
511 if ((buf[0] & 0x21) == 0x01){
512 /* Test input signal does not exist flag */
513 /* as well as the AGC lock flag. */
514 *status |= FE_HAS_SIGNAL;
515 }
516
517 /* Carrier Recovery Lock Status Register */
518 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
519 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __func__, buf[0]);
520 switch (state->current_modulation) {
521 case QAM_256:
522 case QAM_64:
523 /* Need to undestand why there are 3 lock levels here */
524 if ((buf[0] & 0x07) == 0x07)
525 *status |= FE_HAS_CARRIER;
526 else
527 break;
528 i2c_read_demod_bytes(state, 0x8a, buf, 1);
529 if ((buf[0] & 0x04) == 0x04)
530 *status |= FE_HAS_SYNC;
531 if ((buf[0] & 0x01) == 0x01)
532 *status |= FE_HAS_LOCK;
533 if ((buf[0] & 0x08) == 0x08)
534 *status |= FE_HAS_VITERBI;
535 break;
536 case VSB_8:
537 if ((buf[0] & 0x80) == 0x80)
538 *status |= FE_HAS_CARRIER;
539 else
540 break;
541 i2c_read_demod_bytes(state, 0x38, buf, 1);
542 if ((buf[0] & 0x02) == 0x00)
543 *status |= FE_HAS_SYNC;
544 if ((buf[0] & 0x01) == 0x01) {
545 *status |= FE_HAS_LOCK;
546 *status |= FE_HAS_VITERBI;
547 }
548 break;
549 default:
550 printk(KERN_WARNING "lgdt330x: %s: Modulation set to unsupported value\n", __func__);
551 }
552 return 0;
553 }
554
555 /* Calculate SNR estimation (scaled by 2^24)
556
557 8-VSB SNR equations from LGDT3302 and LGDT3303 datasheets, QAM
558 equations from LGDT3303 datasheet. VSB is the same between the '02
559 and '03, so maybe QAM is too? Perhaps someone with a newer datasheet
560 that has QAM information could verify?
561
562 For 8-VSB: (two ways, take your pick)
563 LGDT3302:
564 SNR_EQ = 10 * log10(25 * 24^2 / EQ_MSE)
565 LGDT3303:
566 SNR_EQ = 10 * log10(25 * 32^2 / EQ_MSE)
567 LGDT3302 & LGDT3303:
568 SNR_PT = 10 * log10(25 * 32^2 / PT_MSE) (we use this one)
569 For 64-QAM:
570 SNR = 10 * log10( 688128 / MSEQAM)
571 For 256-QAM:
572 SNR = 10 * log10( 696320 / MSEQAM)
573
574 We re-write the snr equation as:
575 SNR * 2^24 = 10*(c - intlog10(MSE))
576 Where for 256-QAM, c = log10(696320) * 2^24, and so on. */
577
578 static u32 calculate_snr(u32 mse, u32 c)
579 {
580 if (mse == 0) /* No signal */
581 return 0;
582
583 mse = intlog10(mse);
584 if (mse > c) {
585 /* Negative SNR, which is possible, but realisticly the
586 demod will lose lock before the signal gets this bad. The
587 API only allows for unsigned values, so just return 0 */
588 return 0;
589 }
590 return 10*(c - mse);
591 }
592
593 static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
594 {
595 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
596 u8 buf[5]; /* read data buffer */
597 u32 noise; /* noise value */
598 u32 c; /* per-modulation SNR calculation constant */
599
600 switch(state->current_modulation) {
601 case VSB_8:
602 i2c_read_demod_bytes(state, LGDT3302_EQPH_ERR0, buf, 5);
603 #ifdef USE_EQMSE
604 /* Use Equalizer Mean-Square Error Register */
605 /* SNR for ranges from -15.61 to +41.58 */
606 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
607 c = 69765745; /* log10(25*24^2)*2^24 */
608 #else
609 /* Use Phase Tracker Mean-Square Error Register */
610 /* SNR for ranges from -13.11 to +44.08 */
611 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
612 c = 73957994; /* log10(25*32^2)*2^24 */
613 #endif
614 break;
615 case QAM_64:
616 case QAM_256:
617 i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2);
618 noise = ((buf[0] & 3) << 8) | buf[1];
619 c = state->current_modulation == QAM_64 ? 97939837 : 98026066;
620 /* log10(688128)*2^24 and log10(696320)*2^24 */
621 break;
622 default:
623 printk(KERN_ERR "lgdt330x: %s: Modulation set to unsupported value\n",
624 __func__);
625 return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */
626 }
627
628 state->snr = calculate_snr(noise, c);
629 *snr = (state->snr) >> 16; /* Convert from 8.24 fixed-point to 8.8 */
630
631 dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise,
632 state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16);
633
634 return 0;
635 }
636
637 static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
638 {
639 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
640 u8 buf[5]; /* read data buffer */
641 u32 noise; /* noise value */
642 u32 c; /* per-modulation SNR calculation constant */
643
644 switch(state->current_modulation) {
645 case VSB_8:
646 i2c_read_demod_bytes(state, LGDT3303_EQPH_ERR0, buf, 5);
647 #ifdef USE_EQMSE
648 /* Use Equalizer Mean-Square Error Register */
649 /* SNR for ranges from -16.12 to +44.08 */
650 noise = ((buf[0] & 0x78) << 13) | (buf[1] << 8) | buf[2];
651 c = 73957994; /* log10(25*32^2)*2^24 */
652 #else
653 /* Use Phase Tracker Mean-Square Error Register */
654 /* SNR for ranges from -13.11 to +44.08 */
655 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
656 c = 73957994; /* log10(25*32^2)*2^24 */
657 #endif
658 break;
659 case QAM_64:
660 case QAM_256:
661 i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2);
662 noise = (buf[0] << 8) | buf[1];
663 c = state->current_modulation == QAM_64 ? 97939837 : 98026066;
664 /* log10(688128)*2^24 and log10(696320)*2^24 */
665 break;
666 default:
667 printk(KERN_ERR "lgdt330x: %s: Modulation set to unsupported value\n",
668 __func__);
669 return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */
670 }
671
672 state->snr = calculate_snr(noise, c);
673 *snr = (state->snr) >> 16; /* Convert from 8.24 fixed-point to 8.8 */
674
675 dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise,
676 state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16);
677
678 return 0;
679 }
680
681 static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
682 {
683 /* Calculate Strength from SNR up to 35dB */
684 /* Even though the SNR can go higher than 35dB, there is some comfort */
685 /* factor in having a range of strong signals that can show at 100% */
686 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
687 u16 snr;
688 int ret;
689
690 ret = fe->ops.read_snr(fe, &snr);
691 if (ret != 0)
692 return ret;
693 /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
694 /* scale the range 0 - 35*2^24 into 0 - 65535 */
695 if (state->snr >= 8960 * 0x10000)
696 *strength = 0xffff;
697 else
698 *strength = state->snr / 8960;
699
700 return 0;
701 }
702
703 static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
704 {
705 /* I have no idea about this - it may not be needed */
706 fe_tune_settings->min_delay_ms = 500;
707 fe_tune_settings->step_size = 0;
708 fe_tune_settings->max_drift = 0;
709 return 0;
710 }
711
712 static void lgdt330x_release(struct dvb_frontend* fe)
713 {
714 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
715 kfree(state);
716 }
717
718 static struct dvb_frontend_ops lgdt3302_ops;
719 static struct dvb_frontend_ops lgdt3303_ops;
720
721 struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
722 struct i2c_adapter* i2c)
723 {
724 struct lgdt330x_state* state = NULL;
725 u8 buf[1];
726
727 /* Allocate memory for the internal state */
728 state = kzalloc(sizeof(struct lgdt330x_state), GFP_KERNEL);
729 if (state == NULL)
730 goto error;
731
732 /* Setup the state */
733 state->config = config;
734 state->i2c = i2c;
735
736 /* Create dvb_frontend */
737 switch (config->demod_chip) {
738 case LGDT3302:
739 memcpy(&state->frontend.ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
740 break;
741 case LGDT3303:
742 memcpy(&state->frontend.ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
743 break;
744 default:
745 goto error;
746 }
747 state->frontend.demodulator_priv = state;
748
749 /* Verify communication with demod chip */
750 if (i2c_read_demod_bytes(state, 2, buf, 1))
751 goto error;
752
753 state->current_frequency = -1;
754 state->current_modulation = -1;
755
756 return &state->frontend;
757
758 error:
759 kfree(state);
760 dprintk("%s: ERROR\n",__func__);
761 return NULL;
762 }
763
764 static struct dvb_frontend_ops lgdt3302_ops = {
765 .info = {
766 .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
767 .type = FE_ATSC,
768 .frequency_min= 54000000,
769 .frequency_max= 858000000,
770 .frequency_stepsize= 62500,
771 .symbol_rate_min = 5056941, /* QAM 64 */
772 .symbol_rate_max = 10762000, /* VSB 8 */
773 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
774 },
775 .init = lgdt330x_init,
776 .set_frontend = lgdt330x_set_parameters,
777 .get_frontend = lgdt330x_get_frontend,
778 .get_tune_settings = lgdt330x_get_tune_settings,
779 .read_status = lgdt3302_read_status,
780 .read_ber = lgdt330x_read_ber,
781 .read_signal_strength = lgdt330x_read_signal_strength,
782 .read_snr = lgdt3302_read_snr,
783 .read_ucblocks = lgdt330x_read_ucblocks,
784 .release = lgdt330x_release,
785 };
786
787 static struct dvb_frontend_ops lgdt3303_ops = {
788 .info = {
789 .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
790 .type = FE_ATSC,
791 .frequency_min= 54000000,
792 .frequency_max= 858000000,
793 .frequency_stepsize= 62500,
794 .symbol_rate_min = 5056941, /* QAM 64 */
795 .symbol_rate_max = 10762000, /* VSB 8 */
796 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
797 },
798 .init = lgdt330x_init,
799 .set_frontend = lgdt330x_set_parameters,
800 .get_frontend = lgdt330x_get_frontend,
801 .get_tune_settings = lgdt330x_get_tune_settings,
802 .read_status = lgdt3303_read_status,
803 .read_ber = lgdt330x_read_ber,
804 .read_signal_strength = lgdt330x_read_signal_strength,
805 .read_snr = lgdt3303_read_snr,
806 .read_ucblocks = lgdt330x_read_ucblocks,
807 .release = lgdt330x_release,
808 };
809
810 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
811 MODULE_AUTHOR("Wilson Michaels");
812 MODULE_LICENSE("GPL");
813
814 EXPORT_SYMBOL(lgdt330x_attach);
815
816 /*
817 * Local variables:
818 * c-basic-offset: 8
819 * End:
820 */
Nao low-level kernelspace/userspace library that runs on our robots, Nao-Team HTWK