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added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / drivers / media / dvb / dm1105 / dm1105.c
blobf48f73aff195ae7d60a918288d15027983a62a8a
1 /*
2 * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
3 *
4 * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
22 #include <linux/i2c.h>
23 #include <linux/init.h>
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/proc_fs.h>
27 #include <linux/pci.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/input.h>
30 #include <media/ir-common.h>
31
32 #include "demux.h"
33 #include "dmxdev.h"
34 #include "dvb_demux.h"
35 #include "dvb_frontend.h"
36 #include "dvb_net.h"
37 #include "dvbdev.h"
38 #include "dvb-pll.h"
39
40 #include "stv0299.h"
41 #include "stv0288.h"
42 #include "stb6000.h"
43 #include "si21xx.h"
44 #include "cx24116.h"
45 #include "z0194a.h"
46
47 /* ----------------------------------------------- */
48 /*
49 * PCI ID's
50 */
51 #ifndef PCI_VENDOR_ID_TRIGEM
52 #define PCI_VENDOR_ID_TRIGEM 0x109f
53 #endif
54 #ifndef PCI_DEVICE_ID_DM1105
55 #define PCI_DEVICE_ID_DM1105 0x036f
56 #endif
57 #ifndef PCI_DEVICE_ID_DW2002
58 #define PCI_DEVICE_ID_DW2002 0x2002
59 #endif
60 #ifndef PCI_DEVICE_ID_DW2004
61 #define PCI_DEVICE_ID_DW2004 0x2004
62 #endif
63 /* ----------------------------------------------- */
64 /* sdmc dm1105 registers */
65
66 /* TS Control */
67 #define DM1105_TSCTR 0x00
68 #define DM1105_DTALENTH 0x04
69
70 /* GPIO Interface */
71 #define DM1105_GPIOVAL 0x08
72 #define DM1105_GPIOCTR 0x0c
73
74 /* PID serial number */
75 #define DM1105_PIDN 0x10
76
77 /* Odd-even secret key select */
78 #define DM1105_CWSEL 0x14
79
80 /* Host Command Interface */
81 #define DM1105_HOST_CTR 0x18
82 #define DM1105_HOST_AD 0x1c
83
84 /* PCI Interface */
85 #define DM1105_CR 0x30
86 #define DM1105_RST 0x34
87 #define DM1105_STADR 0x38
88 #define DM1105_RLEN 0x3c
89 #define DM1105_WRP 0x40
90 #define DM1105_INTCNT 0x44
91 #define DM1105_INTMAK 0x48
92 #define DM1105_INTSTS 0x4c
93
94 /* CW Value */
95 #define DM1105_ODD 0x50
96 #define DM1105_EVEN 0x58
97
98 /* PID Value */
99 #define DM1105_PID 0x60
100
101 /* IR Control */
102 #define DM1105_IRCTR 0x64
103 #define DM1105_IRMODE 0x68
104 #define DM1105_SYSTEMCODE 0x6c
105 #define DM1105_IRCODE 0x70
106
107 /* Unknown Values */
108 #define DM1105_ENCRYPT 0x74
109 #define DM1105_VER 0x7c
110
111 /* I2C Interface */
112 #define DM1105_I2CCTR 0x80
113 #define DM1105_I2CSTS 0x81
114 #define DM1105_I2CDAT 0x82
115 #define DM1105_I2C_RA 0x83
116 /* ----------------------------------------------- */
117 /* Interrupt Mask Bits */
118
119 #define INTMAK_TSIRQM 0x01
120 #define INTMAK_HIRQM 0x04
121 #define INTMAK_IRM 0x08
122 #define INTMAK_ALLMASK (INTMAK_TSIRQM | \
123 INTMAK_HIRQM | \
124 INTMAK_IRM)
125 #define INTMAK_NONEMASK 0x00
126
127 /* Interrupt Status Bits */
128 #define INTSTS_TSIRQ 0x01
129 #define INTSTS_HIRQ 0x04
130 #define INTSTS_IR 0x08
131
132 /* IR Control Bits */
133 #define DM1105_IR_EN 0x01
134 #define DM1105_SYS_CHK 0x02
135 #define DM1105_REP_FLG 0x08
136
137 /* EEPROM addr */
138 #define IIC_24C01_addr 0xa0
139 /* Max board count */
140 #define DM1105_MAX 0x04
141
142 #define DRIVER_NAME "dm1105"
143
144 #define DM1105_DMA_PACKETS 47
145 #define DM1105_DMA_PACKET_LENGTH (128*4)
146 #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
147
148 /* GPIO's for LNB power control */
149 #define DM1105_LNB_MASK 0x00000000
150 #define DM1105_LNB_13V 0x00010100
151 #define DM1105_LNB_18V 0x00000100
152
153 static int ir_debug;
154 module_param(ir_debug, int, 0644);
155 MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
156
157 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
158
159 static u16 ir_codes_dm1105_nec[128] = {
160 [0x0a] = KEY_Q, /*power*/
161 [0x0c] = KEY_M, /*mute*/
162 [0x11] = KEY_1,
163 [0x12] = KEY_2,
164 [0x13] = KEY_3,
165 [0x14] = KEY_4,
166 [0x15] = KEY_5,
167 [0x16] = KEY_6,
168 [0x17] = KEY_7,
169 [0x18] = KEY_8,
170 [0x19] = KEY_9,
171 [0x10] = KEY_0,
172 [0x1c] = KEY_PAGEUP, /*ch+*/
173 [0x0f] = KEY_PAGEDOWN, /*ch-*/
174 [0x1a] = KEY_O, /*vol+*/
175 [0x0e] = KEY_Z, /*vol-*/
176 [0x04] = KEY_R, /*rec*/
177 [0x09] = KEY_D, /*fav*/
178 [0x08] = KEY_BACKSPACE, /*rewind*/
179 [0x07] = KEY_A, /*fast*/
180 [0x0b] = KEY_P, /*pause*/
181 [0x02] = KEY_ESC, /*cancel*/
182 [0x03] = KEY_G, /*tab*/
183 [0x00] = KEY_UP, /*up*/
184 [0x1f] = KEY_ENTER, /*ok*/
185 [0x01] = KEY_DOWN, /*down*/
186 [0x05] = KEY_C, /*cap*/
187 [0x06] = KEY_S, /*stop*/
188 [0x40] = KEY_F, /*full*/
189 [0x1e] = KEY_W, /*tvmode*/
190 [0x1b] = KEY_B, /*recall*/
191 };
192
193 /* infrared remote control */
194 struct infrared {
195 u16 key_map[128];
196 struct input_dev *input_dev;
197 char input_phys[32];
198 struct tasklet_struct ir_tasklet;
199 u32 ir_command;
200 };
201
202 struct dm1105dvb {
203 /* pci */
204 struct pci_dev *pdev;
205 u8 __iomem *io_mem;
206
207 /* ir */
208 struct infrared ir;
209
210 /* dvb */
211 struct dmx_frontend hw_frontend;
212 struct dmx_frontend mem_frontend;
213 struct dmxdev dmxdev;
214 struct dvb_adapter dvb_adapter;
215 struct dvb_demux demux;
216 struct dvb_frontend *fe;
217 struct dvb_net dvbnet;
218 unsigned int full_ts_users;
219
220 /* i2c */
221 struct i2c_adapter i2c_adap;
222
223 /* dma */
224 dma_addr_t dma_addr;
225 unsigned char *ts_buf;
226 u32 wrp;
227 u32 buffer_size;
228 unsigned int PacketErrorCount;
229 unsigned int dmarst;
230 spinlock_t lock;
231
232 };
233
234 #define dm_io_mem(reg) ((unsigned long)(&dm1105dvb->io_mem[reg]))
235
236 static struct dm1105dvb *dm1105dvb_local;
237
238 static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
239 struct i2c_msg *msgs, int num)
240 {
241 struct dm1105dvb *dm1105dvb ;
242
243 int addr, rc, i, j, k, len, byte, data;
244 u8 status;
245
246 dm1105dvb = i2c_adap->algo_data;
247 for (i = 0; i < num; i++) {
248 outb(0x00, dm_io_mem(DM1105_I2CCTR));
249 if (msgs[i].flags & I2C_M_RD) {
250 /* read bytes */
251 addr = msgs[i].addr << 1;
252 addr |= 1;
253 outb(addr, dm_io_mem(DM1105_I2CDAT));
254 for (byte = 0; byte < msgs[i].len; byte++)
255 outb(0, dm_io_mem(DM1105_I2CDAT + byte + 1));
256
257 outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR));
258 for (j = 0; j < 55; j++) {
259 mdelay(10);
260 status = inb(dm_io_mem(DM1105_I2CSTS));
261 if ((status & 0xc0) == 0x40)
262 break;
263 }
264 if (j >= 55)
265 return -1;
266
267 for (byte = 0; byte < msgs[i].len; byte++) {
268 rc = inb(dm_io_mem(DM1105_I2CDAT + byte + 1));
269 if (rc < 0)
270 goto err;
271 msgs[i].buf[byte] = rc;
272 }
273 } else {
274 if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
275 /* prepaired for cx24116 firmware */
276 /* Write in small blocks */
277 len = msgs[i].len - 1;
278 k = 1;
279 do {
280 outb(msgs[i].addr << 1, dm_io_mem(DM1105_I2CDAT));
281 outb(0xf7, dm_io_mem(DM1105_I2CDAT + 1));
282 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
283 data = msgs[i].buf[k+byte];
284 outb(data, dm_io_mem(DM1105_I2CDAT + byte + 2));
285 }
286 outb(0x82 + (len > 48 ? 48 : len), dm_io_mem(DM1105_I2CCTR));
287 for (j = 0; j < 25; j++) {
288 mdelay(10);
289 status = inb(dm_io_mem(DM1105_I2CSTS));
290 if ((status & 0xc0) == 0x40)
291 break;
292 }
293
294 if (j >= 25)
295 return -1;
296
297 k += 48;
298 len -= 48;
299 } while (len > 0);
300 } else {
301 /* write bytes */
302 outb(msgs[i].addr<<1, dm_io_mem(DM1105_I2CDAT));
303 for (byte = 0; byte < msgs[i].len; byte++) {
304 data = msgs[i].buf[byte];
305 outb(data, dm_io_mem(DM1105_I2CDAT + byte + 1));
306 }
307 outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR));
308 for (j = 0; j < 25; j++) {
309 mdelay(10);
310 status = inb(dm_io_mem(DM1105_I2CSTS));
311 if ((status & 0xc0) == 0x40)
312 break;
313 }
314
315 if (j >= 25)
316 return -1;
317 }
318 }
319 }
320 return num;
321 err:
322 return rc;
323 }
324
325 static u32 functionality(struct i2c_adapter *adap)
326 {
327 return I2C_FUNC_I2C;
328 }
329
330 static struct i2c_algorithm dm1105_algo = {
331 .master_xfer = dm1105_i2c_xfer,
332 .functionality = functionality,
333 };
334
335 static inline struct dm1105dvb *feed_to_dm1105dvb(struct dvb_demux_feed *feed)
336 {
337 return container_of(feed->demux, struct dm1105dvb, demux);
338 }
339
340 static inline struct dm1105dvb *frontend_to_dm1105dvb(struct dvb_frontend *fe)
341 {
342 return container_of(fe->dvb, struct dm1105dvb, dvb_adapter);
343 }
344
345 static int dm1105dvb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
346 {
347 struct dm1105dvb *dm1105dvb = frontend_to_dm1105dvb(fe);
348
349 if (voltage == SEC_VOLTAGE_18) {
350 outl(DM1105_LNB_MASK, dm_io_mem(DM1105_GPIOCTR));
351 outl(DM1105_LNB_18V, dm_io_mem(DM1105_GPIOVAL));
352 } else {
353 /*LNB ON-13V by default!*/
354 outl(DM1105_LNB_MASK, dm_io_mem(DM1105_GPIOCTR));
355 outl(DM1105_LNB_13V, dm_io_mem(DM1105_GPIOVAL));
356 }
357
358 return 0;
359 }
360
361 static void dm1105dvb_set_dma_addr(struct dm1105dvb *dm1105dvb)
362 {
363 outl(cpu_to_le32(dm1105dvb->dma_addr), dm_io_mem(DM1105_STADR));
364 }
365
366 static int __devinit dm1105dvb_dma_map(struct dm1105dvb *dm1105dvb)
367 {
368 dm1105dvb->ts_buf = pci_alloc_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, &dm1105dvb->dma_addr);
369
370 return !dm1105dvb->ts_buf;
371 }
372
373 static void dm1105dvb_dma_unmap(struct dm1105dvb *dm1105dvb)
374 {
375 pci_free_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, dm1105dvb->ts_buf, dm1105dvb->dma_addr);
376 }
377
378 static void dm1105dvb_enable_irqs(struct dm1105dvb *dm1105dvb)
379 {
380 outb(INTMAK_ALLMASK, dm_io_mem(DM1105_INTMAK));
381 outb(1, dm_io_mem(DM1105_CR));
382 }
383
384 static void dm1105dvb_disable_irqs(struct dm1105dvb *dm1105dvb)
385 {
386 outb(INTMAK_IRM, dm_io_mem(DM1105_INTMAK));
387 outb(0, dm_io_mem(DM1105_CR));
388 }
389
390 static int dm1105dvb_start_feed(struct dvb_demux_feed *f)
391 {
392 struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f);
393
394 if (dm1105dvb->full_ts_users++ == 0)
395 dm1105dvb_enable_irqs(dm1105dvb);
396
397 return 0;
398 }
399
400 static int dm1105dvb_stop_feed(struct dvb_demux_feed *f)
401 {
402 struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f);
403
404 if (--dm1105dvb->full_ts_users == 0)
405 dm1105dvb_disable_irqs(dm1105dvb);
406
407 return 0;
408 }
409
410 /* ir tasklet */
411 static void dm1105_emit_key(unsigned long parm)
412 {
413 struct infrared *ir = (struct infrared *) parm;
414 u32 ircom = ir->ir_command;
415 u8 data;
416 u16 keycode;
417
418 data = (ircom >> 8) & 0x7f;
419
420 input_event(ir->input_dev, EV_MSC, MSC_RAW, (0x0000f8 << 16) | data);
421 input_event(ir->input_dev, EV_MSC, MSC_SCAN, data);
422 keycode = ir->key_map[data];
423
424 if (!keycode)
425 return;
426
427 input_event(ir->input_dev, EV_KEY, keycode, 1);
428 input_sync(ir->input_dev);
429 input_event(ir->input_dev, EV_KEY, keycode, 0);
430 input_sync(ir->input_dev);
431
432 }
433
434 static irqreturn_t dm1105dvb_irq(int irq, void *dev_id)
435 {
436 struct dm1105dvb *dm1105dvb = dev_id;
437 unsigned int piece;
438 unsigned int nbpackets;
439 u32 command;
440 u32 nextwrp;
441 u32 oldwrp;
442
443 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
444 unsigned int intsts = inb(dm_io_mem(DM1105_INTSTS));
445 outb(intsts, dm_io_mem(DM1105_INTSTS));
446
447 switch (intsts) {
448 case INTSTS_TSIRQ:
449 case (INTSTS_TSIRQ | INTSTS_IR):
450 nextwrp = inl(dm_io_mem(DM1105_WRP)) -
451 inl(dm_io_mem(DM1105_STADR)) ;
452 oldwrp = dm1105dvb->wrp;
453 spin_lock(&dm1105dvb->lock);
454 if (!((dm1105dvb->ts_buf[oldwrp] == 0x47) &&
455 (dm1105dvb->ts_buf[oldwrp + 188] == 0x47) &&
456 (dm1105dvb->ts_buf[oldwrp + 188 * 2] == 0x47))) {
457 dm1105dvb->PacketErrorCount++;
458 /* bad packet found */
459 if ((dm1105dvb->PacketErrorCount >= 2) &&
460 (dm1105dvb->dmarst == 0)) {
461 outb(1, dm_io_mem(DM1105_RST));
462 dm1105dvb->wrp = 0;
463 dm1105dvb->PacketErrorCount = 0;
464 dm1105dvb->dmarst = 0;
465 spin_unlock(&dm1105dvb->lock);
466 return IRQ_HANDLED;
467 }
468 }
469 if (nextwrp < oldwrp) {
470 piece = dm1105dvb->buffer_size - oldwrp;
471 memcpy(dm1105dvb->ts_buf + dm1105dvb->buffer_size, dm1105dvb->ts_buf, nextwrp);
472 nbpackets = (piece + nextwrp)/188;
473 } else {
474 nbpackets = (nextwrp - oldwrp)/188;
475 }
476 dvb_dmx_swfilter_packets(&dm1105dvb->demux, &dm1105dvb->ts_buf[oldwrp], nbpackets);
477 dm1105dvb->wrp = nextwrp;
478 spin_unlock(&dm1105dvb->lock);
479 break;
480 case INTSTS_IR:
481 command = inl(dm_io_mem(DM1105_IRCODE));
482 if (ir_debug)
483 printk("dm1105: received byte 0x%04x\n", command);
484
485 dm1105dvb->ir.ir_command = command;
486 tasklet_schedule(&dm1105dvb->ir.ir_tasklet);
487 break;
488 }
489 return IRQ_HANDLED;
490
491
492 }
493
494 /* register with input layer */
495 static void input_register_keys(struct infrared *ir)
496 {
497 int i;
498
499 memset(ir->input_dev->keybit, 0, sizeof(ir->input_dev->keybit));
500
501 for (i = 0; i < ARRAY_SIZE(ir->key_map); i++)
502 set_bit(ir->key_map[i], ir->input_dev->keybit);
503
504 ir->input_dev->keycode = ir->key_map;
505 ir->input_dev->keycodesize = sizeof(ir->key_map[0]);
506 ir->input_dev->keycodemax = ARRAY_SIZE(ir->key_map);
507 }
508
509 int __devinit dm1105_ir_init(struct dm1105dvb *dm1105)
510 {
511 struct input_dev *input_dev;
512 int err;
513
514 dm1105dvb_local = dm1105;
515
516 input_dev = input_allocate_device();
517 if (!input_dev)
518 return -ENOMEM;
519
520 dm1105->ir.input_dev = input_dev;
521 snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
522 "pci-%s/ir0", pci_name(dm1105->pdev));
523
524 input_dev->evbit[0] = BIT(EV_KEY);
525 input_dev->name = "DVB on-card IR receiver";
526
527 input_dev->phys = dm1105->ir.input_phys;
528 input_dev->id.bustype = BUS_PCI;
529 input_dev->id.version = 2;
530 if (dm1105->pdev->subsystem_vendor) {
531 input_dev->id.vendor = dm1105->pdev->subsystem_vendor;
532 input_dev->id.product = dm1105->pdev->subsystem_device;
533 } else {
534 input_dev->id.vendor = dm1105->pdev->vendor;
535 input_dev->id.product = dm1105->pdev->device;
536 }
537 input_dev->dev.parent = &dm1105->pdev->dev;
538 /* initial keymap */
539 memcpy(dm1105->ir.key_map, ir_codes_dm1105_nec, sizeof dm1105->ir.key_map);
540 input_register_keys(&dm1105->ir);
541 err = input_register_device(input_dev);
542 if (err) {
543 input_free_device(input_dev);
544 return err;
545 }
546
547 tasklet_init(&dm1105->ir.ir_tasklet, dm1105_emit_key, (unsigned long) &dm1105->ir);
548
549 return 0;
550 }
551
552
553 void __devexit dm1105_ir_exit(struct dm1105dvb *dm1105)
554 {
555 tasklet_kill(&dm1105->ir.ir_tasklet);
556 input_unregister_device(dm1105->ir.input_dev);
557
558 }
559
560 static int __devinit dm1105dvb_hw_init(struct dm1105dvb *dm1105dvb)
561 {
562 dm1105dvb_disable_irqs(dm1105dvb);
563
564 outb(0, dm_io_mem(DM1105_HOST_CTR));
565
566 /*DATALEN 188,*/
567 outb(188, dm_io_mem(DM1105_DTALENTH));
568 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
569 outw(0xc10a, dm_io_mem(DM1105_TSCTR));
570
571 /* map DMA and set address */
572 dm1105dvb_dma_map(dm1105dvb);
573 dm1105dvb_set_dma_addr(dm1105dvb);
574 /* big buffer */
575 outl(5*DM1105_DMA_BYTES, dm_io_mem(DM1105_RLEN));
576 outb(47, dm_io_mem(DM1105_INTCNT));
577
578 /* IR NEC mode enable */
579 outb((DM1105_IR_EN | DM1105_SYS_CHK), dm_io_mem(DM1105_IRCTR));
580 outb(0, dm_io_mem(DM1105_IRMODE));
581 outw(0, dm_io_mem(DM1105_SYSTEMCODE));
582
583 return 0;
584 }
585
586 static void dm1105dvb_hw_exit(struct dm1105dvb *dm1105dvb)
587 {
588 dm1105dvb_disable_irqs(dm1105dvb);
589
590 /* IR disable */
591 outb(0, dm_io_mem(DM1105_IRCTR));
592 outb(INTMAK_NONEMASK, dm_io_mem(DM1105_INTMAK));
593
594 dm1105dvb_dma_unmap(dm1105dvb);
595 }
596
597 static struct stv0299_config sharp_z0194a_config = {
598 .demod_address = 0x68,
599 .inittab = sharp_z0194a_inittab,
600 .mclk = 88000000UL,
601 .invert = 1,
602 .skip_reinit = 0,
603 .lock_output = STV0299_LOCKOUTPUT_1,
604 .volt13_op0_op1 = STV0299_VOLT13_OP1,
605 .min_delay_ms = 100,
606 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
607 };
608
609 static struct stv0288_config earda_config = {
610 .demod_address = 0x68,
611 .min_delay_ms = 100,
612 };
613
614 static struct si21xx_config serit_config = {
615 .demod_address = 0x68,
616 .min_delay_ms = 100,
617
618 };
619
620 static struct cx24116_config serit_sp2633_config = {
621 .demod_address = 0x55,
622 };
623
624 static int __devinit frontend_init(struct dm1105dvb *dm1105dvb)
625 {
626 int ret;
627
628 switch (dm1105dvb->pdev->subsystem_device) {
629 case PCI_DEVICE_ID_DW2002:
630 dm1105dvb->fe = dvb_attach(
631 stv0299_attach, &sharp_z0194a_config,
632 &dm1105dvb->i2c_adap);
633
634 if (dm1105dvb->fe) {
635 dm1105dvb->fe->ops.set_voltage =
636 dm1105dvb_set_voltage;
637 dvb_attach(dvb_pll_attach, dm1105dvb->fe, 0x60,
638 &dm1105dvb->i2c_adap, DVB_PLL_OPERA1);
639 }
640
641 if (!dm1105dvb->fe) {
642 dm1105dvb->fe = dvb_attach(
643 stv0288_attach, &earda_config,
644 &dm1105dvb->i2c_adap);
645 if (dm1105dvb->fe) {
646 dm1105dvb->fe->ops.set_voltage =
647 dm1105dvb_set_voltage;
648 dvb_attach(stb6000_attach, dm1105dvb->fe, 0x61,
649 &dm1105dvb->i2c_adap);
650 }
651 }
652
653 if (!dm1105dvb->fe) {
654 dm1105dvb->fe = dvb_attach(
655 si21xx_attach, &serit_config,
656 &dm1105dvb->i2c_adap);
657 if (dm1105dvb->fe)
658 dm1105dvb->fe->ops.set_voltage =
659 dm1105dvb_set_voltage;
660 }
661 break;
662 case PCI_DEVICE_ID_DW2004:
663 dm1105dvb->fe = dvb_attach(
664 cx24116_attach, &serit_sp2633_config,
665 &dm1105dvb->i2c_adap);
666 if (dm1105dvb->fe)
667 dm1105dvb->fe->ops.set_voltage = dm1105dvb_set_voltage;
668 break;
669 }
670
671 if (!dm1105dvb->fe) {
672 dev_err(&dm1105dvb->pdev->dev, "could not attach frontend\n");
673 return -ENODEV;
674 }
675
676 ret = dvb_register_frontend(&dm1105dvb->dvb_adapter, dm1105dvb->fe);
677 if (ret < 0) {
678 if (dm1105dvb->fe->ops.release)
679 dm1105dvb->fe->ops.release(dm1105dvb->fe);
680 dm1105dvb->fe = NULL;
681 return ret;
682 }
683
684 return 0;
685 }
686
687 static void __devinit dm1105dvb_read_mac(struct dm1105dvb *dm1105dvb, u8 *mac)
688 {
689 static u8 command[1] = { 0x28 };
690
691 struct i2c_msg msg[] = {
692 { .addr = IIC_24C01_addr >> 1, .flags = 0,
693 .buf = command, .len = 1 },
694 { .addr = IIC_24C01_addr >> 1, .flags = I2C_M_RD,
695 .buf = mac, .len = 6 },
696 };
697
698 dm1105_i2c_xfer(&dm1105dvb->i2c_adap, msg , 2);
699 dev_info(&dm1105dvb->pdev->dev, "MAC %pM\n", mac);
700 }
701
702 static int __devinit dm1105_probe(struct pci_dev *pdev,
703 const struct pci_device_id *ent)
704 {
705 struct dm1105dvb *dm1105dvb;
706 struct dvb_adapter *dvb_adapter;
707 struct dvb_demux *dvbdemux;
708 struct dmx_demux *dmx;
709 int ret = -ENOMEM;
710
711 dm1105dvb = kzalloc(sizeof(struct dm1105dvb), GFP_KERNEL);
712 if (!dm1105dvb)
713 goto out;
714
715 dm1105dvb->pdev = pdev;
716 dm1105dvb->buffer_size = 5 * DM1105_DMA_BYTES;
717 dm1105dvb->PacketErrorCount = 0;
718 dm1105dvb->dmarst = 0;
719
720 ret = pci_enable_device(pdev);
721 if (ret < 0)
722 goto err_kfree;
723
724 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
725 if (ret < 0)
726 goto err_pci_disable_device;
727
728 pci_set_master(pdev);
729
730 ret = pci_request_regions(pdev, DRIVER_NAME);
731 if (ret < 0)
732 goto err_pci_disable_device;
733
734 dm1105dvb->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
735 if (!dm1105dvb->io_mem) {
736 ret = -EIO;
737 goto err_pci_release_regions;
738 }
739
740 spin_lock_init(&dm1105dvb->lock);
741 pci_set_drvdata(pdev, dm1105dvb);
742
743 ret = request_irq(pdev->irq, dm1105dvb_irq, IRQF_SHARED, DRIVER_NAME, dm1105dvb);
744 if (ret < 0)
745 goto err_pci_iounmap;
746
747 ret = dm1105dvb_hw_init(dm1105dvb);
748 if (ret < 0)
749 goto err_free_irq;
750
751 /* i2c */
752 i2c_set_adapdata(&dm1105dvb->i2c_adap, dm1105dvb);
753 strcpy(dm1105dvb->i2c_adap.name, DRIVER_NAME);
754 dm1105dvb->i2c_adap.owner = THIS_MODULE;
755 dm1105dvb->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
756 dm1105dvb->i2c_adap.dev.parent = &pdev->dev;
757 dm1105dvb->i2c_adap.algo = &dm1105_algo;
758 dm1105dvb->i2c_adap.algo_data = dm1105dvb;
759 ret = i2c_add_adapter(&dm1105dvb->i2c_adap);
760
761 if (ret < 0)
762 goto err_dm1105dvb_hw_exit;
763
764 /* dvb */
765 ret = dvb_register_adapter(&dm1105dvb->dvb_adapter, DRIVER_NAME,
766 THIS_MODULE, &pdev->dev, adapter_nr);
767 if (ret < 0)
768 goto err_i2c_del_adapter;
769
770 dvb_adapter = &dm1105dvb->dvb_adapter;
771
772 dm1105dvb_read_mac(dm1105dvb, dvb_adapter->proposed_mac);
773
774 dvbdemux = &dm1105dvb->demux;
775 dvbdemux->filternum = 256;
776 dvbdemux->feednum = 256;
777 dvbdemux->start_feed = dm1105dvb_start_feed;
778 dvbdemux->stop_feed = dm1105dvb_stop_feed;
779 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
780 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
781 ret = dvb_dmx_init(dvbdemux);
782 if (ret < 0)
783 goto err_dvb_unregister_adapter;
784
785 dmx = &dvbdemux->dmx;
786 dm1105dvb->dmxdev.filternum = 256;
787 dm1105dvb->dmxdev.demux = dmx;
788 dm1105dvb->dmxdev.capabilities = 0;
789
790 ret = dvb_dmxdev_init(&dm1105dvb->dmxdev, dvb_adapter);
791 if (ret < 0)
792 goto err_dvb_dmx_release;
793
794 dm1105dvb->hw_frontend.source = DMX_FRONTEND_0;
795
796 ret = dmx->add_frontend(dmx, &dm1105dvb->hw_frontend);
797 if (ret < 0)
798 goto err_dvb_dmxdev_release;
799
800 dm1105dvb->mem_frontend.source = DMX_MEMORY_FE;
801
802 ret = dmx->add_frontend(dmx, &dm1105dvb->mem_frontend);
803 if (ret < 0)
804 goto err_remove_hw_frontend;
805
806 ret = dmx->connect_frontend(dmx, &dm1105dvb->hw_frontend);
807 if (ret < 0)
808 goto err_remove_mem_frontend;
809
810 ret = frontend_init(dm1105dvb);
811 if (ret < 0)
812 goto err_disconnect_frontend;
813
814 dvb_net_init(dvb_adapter, &dm1105dvb->dvbnet, dmx);
815 dm1105_ir_init(dm1105dvb);
816 out:
817 return ret;
818
819 err_disconnect_frontend:
820 dmx->disconnect_frontend(dmx);
821 err_remove_mem_frontend:
822 dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend);
823 err_remove_hw_frontend:
824 dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend);
825 err_dvb_dmxdev_release:
826 dvb_dmxdev_release(&dm1105dvb->dmxdev);
827 err_dvb_dmx_release:
828 dvb_dmx_release(dvbdemux);
829 err_dvb_unregister_adapter:
830 dvb_unregister_adapter(dvb_adapter);
831 err_i2c_del_adapter:
832 i2c_del_adapter(&dm1105dvb->i2c_adap);
833 err_dm1105dvb_hw_exit:
834 dm1105dvb_hw_exit(dm1105dvb);
835 err_free_irq:
836 free_irq(pdev->irq, dm1105dvb);
837 err_pci_iounmap:
838 pci_iounmap(pdev, dm1105dvb->io_mem);
839 err_pci_release_regions:
840 pci_release_regions(pdev);
841 err_pci_disable_device:
842 pci_disable_device(pdev);
843 err_kfree:
844 pci_set_drvdata(pdev, NULL);
845 kfree(dm1105dvb);
846 goto out;
847 }
848
849 static void __devexit dm1105_remove(struct pci_dev *pdev)
850 {
851 struct dm1105dvb *dm1105dvb = pci_get_drvdata(pdev);
852 struct dvb_adapter *dvb_adapter = &dm1105dvb->dvb_adapter;
853 struct dvb_demux *dvbdemux = &dm1105dvb->demux;
854 struct dmx_demux *dmx = &dvbdemux->dmx;
855
856 dm1105_ir_exit(dm1105dvb);
857 dmx->close(dmx);
858 dvb_net_release(&dm1105dvb->dvbnet);
859 if (dm1105dvb->fe)
860 dvb_unregister_frontend(dm1105dvb->fe);
861
862 dmx->disconnect_frontend(dmx);
863 dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend);
864 dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend);
865 dvb_dmxdev_release(&dm1105dvb->dmxdev);
866 dvb_dmx_release(dvbdemux);
867 dvb_unregister_adapter(dvb_adapter);
868 if (&dm1105dvb->i2c_adap)
869 i2c_del_adapter(&dm1105dvb->i2c_adap);
870
871 dm1105dvb_hw_exit(dm1105dvb);
872 synchronize_irq(pdev->irq);
873 free_irq(pdev->irq, dm1105dvb);
874 pci_iounmap(pdev, dm1105dvb->io_mem);
875 pci_release_regions(pdev);
876 pci_disable_device(pdev);
877 pci_set_drvdata(pdev, NULL);
878 kfree(dm1105dvb);
879 }
880
881 static struct pci_device_id dm1105_id_table[] __devinitdata = {
882 {
883 .vendor = PCI_VENDOR_ID_TRIGEM,
884 .device = PCI_DEVICE_ID_DM1105,
885 .subvendor = PCI_ANY_ID,
886 .subdevice = PCI_DEVICE_ID_DW2002,
887 }, {
888 .vendor = PCI_VENDOR_ID_TRIGEM,
889 .device = PCI_DEVICE_ID_DM1105,
890 .subvendor = PCI_ANY_ID,
891 .subdevice = PCI_DEVICE_ID_DW2004,
892 }, {
893 /* empty */
894 },
895 };
896
897 MODULE_DEVICE_TABLE(pci, dm1105_id_table);
898
899 static struct pci_driver dm1105_driver = {
900 .name = DRIVER_NAME,
901 .id_table = dm1105_id_table,
902 .probe = dm1105_probe,
903 .remove = __devexit_p(dm1105_remove),
904 };
905
906 static int __init dm1105_init(void)
907 {
908 return pci_register_driver(&dm1105_driver);
909 }
910
911 static void __exit dm1105_exit(void)
912 {
913 pci_unregister_driver(&dm1105_driver);
914 }
915
916 module_init(dm1105_init);
917 module_exit(dm1105_exit);
918
919 MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
920 MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
921 MODULE_LICENSE("GPL");
Nao low-level kernelspace/userspace library that runs on our robots, Nao-Team HTWK