kernel/2.6.29.6-aldebaran-rt/drivers/infiniband/hw/cxgb3/iwch_mem.c

   1 /*
   2  * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 #include <asm/byteorder.h>
  33
  34 #include <rdma/iw_cm.h>
  35 #include <rdma/ib_verbs.h>
  36
  37 #include "cxio_hal.h"
  38 #include "cxio_resource.h"
  39 #include "iwch.h"
  40 #include "iwch_provider.h"
  41
  42 static void iwch_finish_mem_reg(struct iwch_mr *mhp, u32 stag)
  43 {
  44         u32 mmid;
  45
  46         mhp->attr.state = 1;
  47         mhp->attr.stag = stag;
  48         mmid = stag >> 8;
  49         mhp->ibmr.rkey = mhp->ibmr.lkey = stag;
  50         insert_handle(mhp->rhp, &mhp->rhp->mmidr, mhp, mmid);
  51         PDBG("%s mmid 0x%x mhp %p\n", __func__, mmid, mhp);
  52 }
  53
  54 int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
  55                       struct iwch_mr *mhp, int shift)
  56 {
  57         u32 stag;
  58
  59         if (cxio_register_phys_mem(&rhp->rdev,
  60                                    &stag, mhp->attr.pdid,
  61                                    mhp->attr.perms,
  62                                    mhp->attr.zbva,
  63                                    mhp->attr.va_fbo,
  64                                    mhp->attr.len,
  65                                    shift - 12,
  66                                    mhp->attr.pbl_size, mhp->attr.pbl_addr))
  67                 return -ENOMEM;
  68
  69         iwch_finish_mem_reg(mhp, stag);
  70
  71         return 0;
  72 }
  73
  74 int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,
  75                                         struct iwch_mr *mhp,
  76                                         int shift,
  77                                         int npages)
  78 {
  79         u32 stag;
  80
  81         /* We could support this... */
  82         if (npages > mhp->attr.pbl_size)
  83                 return -ENOMEM;
  84
  85         stag = mhp->attr.stag;
  86         if (cxio_reregister_phys_mem(&rhp->rdev,
  87                                    &stag, mhp->attr.pdid,
  88                                    mhp->attr.perms,
  89                                    mhp->attr.zbva,
  90                                    mhp->attr.va_fbo,
  91                                    mhp->attr.len,
  92                                    shift - 12,
  93                                    mhp->attr.pbl_size, mhp->attr.pbl_addr))
  94                 return -ENOMEM;
  95
  96         iwch_finish_mem_reg(mhp, stag);
  97
  98         return 0;
  99 }
 100
 101 int iwch_alloc_pbl(struct iwch_mr *mhp, int npages)
 102 {
 103         mhp->attr.pbl_addr = cxio_hal_pblpool_alloc(&mhp->rhp->rdev,
 104                                                     npages << 3);
 105
 106         if (!mhp->attr.pbl_addr)
 107                 return -ENOMEM;
 108
 109         mhp->attr.pbl_size = npages;
 110
 111         return 0;
 112 }
 113
 114 void iwch_free_pbl(struct iwch_mr *mhp)
 115 {
 116         cxio_hal_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr,
 117                               mhp->attr.pbl_size << 3);
 118 }
 119
 120 int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset)
 121 {
 122         return cxio_write_pbl(&mhp->rhp->rdev, pages,
 123                               mhp->attr.pbl_addr + (offset << 3), npages);
 124 }
 125
 126 int build_phys_page_list(struct ib_phys_buf *buffer_list,
 127                                         int num_phys_buf,
 128                                         u64 *iova_start,
 129                                         u64 *total_size,
 130                                         int *npages,
 131                                         int *shift,
 132                                         __be64 **page_list)
 133 {
 134         u64 mask;
 135         int i, j, n;
 136
 137         mask = 0;
 138         *total_size = 0;
 139         for (i = 0; i < num_phys_buf; ++i) {
 140                 if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
 141                         return -EINVAL;
 142                 if (i != 0 && i != num_phys_buf - 1 &&
 143                     (buffer_list[i].size & ~PAGE_MASK))
 144                         return -EINVAL;
 145                 *total_size += buffer_list[i].size;
 146                 if (i > 0)
 147                         mask |= buffer_list[i].addr;
 148                 else
 149                         mask |= buffer_list[i].addr & PAGE_MASK;
 150                 if (i != num_phys_buf - 1)
 151                         mask |= buffer_list[i].addr + buffer_list[i].size;
 152                 else
 153                         mask |= (buffer_list[i].addr + buffer_list[i].size +
 154                                 PAGE_SIZE - 1) & PAGE_MASK;
 155         }
 156
 157         if (*total_size > 0xFFFFFFFFULL)
 158                 return -ENOMEM;
 159
 160         /* Find largest page shift we can use to cover buffers */
 161         for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift))
 162                 if ((1ULL << *shift) & mask)
 163                         break;
 164
 165         buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1);
 166         buffer_list[0].addr &= ~0ull << *shift;
 167
 168         *npages = 0;
 169         for (i = 0; i < num_phys_buf; ++i)
 170                 *npages += (buffer_list[i].size +
 171                         (1ULL << *shift) - 1) >> *shift;
 172
 173         if (!*npages)
 174                 return -EINVAL;
 175
 176         *page_list = kmalloc(sizeof(u64) * *npages, GFP_KERNEL);
 177         if (!*page_list)
 178                 return -ENOMEM;
 179
 180         n = 0;
 181         for (i = 0; i < num_phys_buf; ++i)
 182                 for (j = 0;
 183                      j < (buffer_list[i].size + (1ULL << *shift) - 1) >> *shift;
 184                      ++j)
 185                         (*page_list)[n++] = cpu_to_be64(buffer_list[i].addr +
 186                             ((u64) j << *shift));
 187
 188         PDBG("%s va 0x%llx mask 0x%llx shift %d len %lld pbl_size %d\n",
 189              __func__, (unsigned long long) *iova_start,
 190              (unsigned long long) mask, *shift, (unsigned long long) *total_size,
 191              *npages);
 192
 193         return 0;
 194
 195 }