kernel/2.6.29.6-aldebaran-rt/arch/x86/include/asm/olpc.h

   1 /* OLPC machine specific definitions */
   2
   3 #ifndef _ASM_X86_OLPC_H
   4 #define _ASM_X86_OLPC_H
   5
   6 #include <asm/geode.h>
   7
   8 struct olpc_platform_t {
   9         int flags;
  10         uint32_t boardrev;
  11         int ecver;
  12 };
  13
  14 #define OLPC_F_PRESENT          0x01
  15 #define OLPC_F_DCON             0x02
  16 #define OLPC_F_VSA              0x04
  17
  18 #ifdef CONFIG_OLPC
  19
  20 extern struct olpc_platform_t olpc_platform_info;
  21
  22 /*
  23  * OLPC board IDs contain the major build number within the mask 0x0ff0,
  24  * and the minor build number withing 0x000f.  Pre-builds have a minor
  25  * number less than 8, and normal builds start at 8.  For example, 0x0B10
  26  * is a PreB1, and 0x0C18 is a C1.
  27  */
  28
  29 static inline uint32_t olpc_board(uint8_t id)
  30 {
  31         return (id << 4) | 0x8;
  32 }
  33
  34 static inline uint32_t olpc_board_pre(uint8_t id)
  35 {
  36         return id << 4;
  37 }
  38
  39 static inline int machine_is_olpc(void)
  40 {
  41         return (olpc_platform_info.flags & OLPC_F_PRESENT) ? 1 : 0;
  42 }
  43
  44 /*
  45  * The DCON is OLPC's Display Controller.  It has a number of unique
  46  * features that we might want to take advantage of..
  47  */
  48 static inline int olpc_has_dcon(void)
  49 {
  50         return (olpc_platform_info.flags & OLPC_F_DCON) ? 1 : 0;
  51 }
  52
  53 /*
  54  * The VSA is software from AMD that typical Geode bioses will include.
  55  * It is used to emulate the PCI bus, VGA, etc.  OLPC's Open Firmware does
  56  * not include the VSA; instead, PCI is emulated by the kernel.
  57  *
  58  * The VSA is described further in arch/x86/pci/olpc.c.
  59  */
  60 static inline int olpc_has_vsa(void)
  61 {
  62         return (olpc_platform_info.flags & OLPC_F_VSA) ? 1 : 0;
  63 }
  64
  65 /*
  66  * The "Mass Production" version of OLPC's XO is identified as being model
  67  * C2.  During the prototype phase, the following models (in chronological
  68  * order) were created: A1, B1, B2, B3, B4, C1.  The A1 through B2 models
  69  * were based on Geode GX CPUs, and models after that were based upon
  70  * Geode LX CPUs.  There were also some hand-assembled models floating
  71  * around, referred to as PreB1, PreB2, etc.
  72  */
  73 static inline int olpc_board_at_least(uint32_t rev)
  74 {
  75         return olpc_platform_info.boardrev >= rev;
  76 }
  77
  78 #else
  79
  80 static inline int machine_is_olpc(void)
  81 {
  82         return 0;
  83 }
  84
  85 static inline int olpc_has_dcon(void)
  86 {
  87         return 0;
  88 }
  89
  90 static inline int olpc_has_vsa(void)
  91 {
  92         return 0;
  93 }
  94
  95 #endif
  96
  97 /* EC related functions */
  98
  99 extern int olpc_ec_cmd(unsigned char cmd, unsigned char *inbuf, size_t inlen,
 100                 unsigned char *outbuf, size_t outlen);
 101
 102 extern int olpc_ec_mask_set(uint8_t bits);
 103 extern int olpc_ec_mask_unset(uint8_t bits);
 104
 105 /* EC commands */
 106
 107 #define EC_FIRMWARE_REV         0x08
 108
 109 /* SCI source values */
 110
 111 #define EC_SCI_SRC_EMPTY        0x00
 112 #define EC_SCI_SRC_GAME         0x01
 113 #define EC_SCI_SRC_BATTERY      0x02
 114 #define EC_SCI_SRC_BATSOC       0x04
 115 #define EC_SCI_SRC_BATERR       0x08
 116 #define EC_SCI_SRC_EBOOK        0x10
 117 #define EC_SCI_SRC_WLAN         0x20
 118 #define EC_SCI_SRC_ACPWR        0x40
 119 #define EC_SCI_SRC_ALL          0x7F
 120
 121 /* GPIO assignments */
 122
 123 #define OLPC_GPIO_MIC_AC        geode_gpio(1)
 124 #define OLPC_GPIO_DCON_IRQ      geode_gpio(7)
 125 #define OLPC_GPIO_THRM_ALRM     geode_gpio(10)
 126 #define OLPC_GPIO_SMB_CLK       geode_gpio(14)
 127 #define OLPC_GPIO_SMB_DATA      geode_gpio(15)
 128 #define OLPC_GPIO_WORKAUX       geode_gpio(24)
 129 #define OLPC_GPIO_LID           geode_gpio(26)
 130 #define OLPC_GPIO_ECSCI         geode_gpio(27)
 131
 132 #endif /* _ASM_X86_OLPC_H */