kernel/2.6.29.6-aldebaran-rt/arch/sh/include/cpu-sh4/cpu/cacheflush.h

   1 /*
   2  * include/asm-sh/cpu-sh4/cacheflush.h
   3  *
   4  * Copyright (C) 1999 Niibe Yutaka
   5  * Copyright (C) 2003 Paul Mundt
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11 #ifndef __ASM_CPU_SH4_CACHEFLUSH_H
  12 #define __ASM_CPU_SH4_CACHEFLUSH_H
  13
  14 /*
  15  *  Caches are broken on SH-4 (unless we use write-through
  16  *  caching; in which case they're only semi-broken),
  17  *  so we need them.
  18  */
  19 void flush_cache_all(void);
  20 void flush_dcache_all(void);
  21 void flush_cache_mm(struct mm_struct *mm);
  22 #define flush_cache_dup_mm(mm) flush_cache_mm(mm)
  23 void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
  24                        unsigned long end);
  25 void flush_cache_page(struct vm_area_struct *vma, unsigned long addr,
  26                       unsigned long pfn);
  27 void flush_dcache_page(struct page *pg);
  28
  29 #define flush_dcache_mmap_lock(mapping)         do { } while (0)
  30 #define flush_dcache_mmap_unlock(mapping)       do { } while (0)
  31
  32 void flush_icache_range(unsigned long start, unsigned long end);
  33 void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
  34                              unsigned long addr, int len);
  35
  36 #define flush_icache_page(vma,pg)               do { } while (0)
  37
  38 /* Initialization of P3 area for copy_user_page */
  39 void p3_cache_init(void);
  40
  41 #define PG_mapped       PG_arch_1
  42
  43 #endif /* __ASM_CPU_SH4_CACHEFLUSH_H */