added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / arch / powerpc / kernel / paca.c
blobc744b327bcabc866230198eda4dce37169ad0151
1 /*
2 * c 2001 PPC 64 Team, IBM Corp
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
10 #include <linux/threads.h>
11 #include <linux/module.h>
13 #include <asm/lppaca.h>
14 #include <asm/paca.h>
15 #include <asm/sections.h>
17 /* This symbol is provided by the linker - let it fill in the paca
18 * field correctly */
19 extern unsigned long __toc_start;
22 * The structure which the hypervisor knows about - this structure
23 * should not cross a page boundary. The vpa_init/register_vpa call
24 * is now known to fail if the lppaca structure crosses a page
25 * boundary. The lppaca is also used on legacy iSeries and POWER5
26 * pSeries boxes. The lppaca is 640 bytes long, and cannot readily
27 * change since the hypervisor knows its layout, so a 1kB alignment
28 * will suffice to ensure that it doesn't cross a page boundary.
30 struct lppaca lppaca[] = {
31 [0 ... (NR_CPUS-1)] = {
32 .desc = 0xd397d781, /* "LpPa" */
33 .size = sizeof(struct lppaca),
34 .dyn_proc_status = 2,
35 .decr_val = 0x00ff0000,
36 .fpregs_in_use = 1,
37 .end_of_quantum = 0xfffffffffffffffful,
38 .slb_count = 64,
39 .vmxregs_in_use = 0,
40 .page_ins = 0,
45 * 3 persistent SLBs are registered here. The buffer will be zero
46 * initially, hence will all be invaild until we actually write them.
48 struct slb_shadow slb_shadow[] __cacheline_aligned = {
49 [0 ... (NR_CPUS-1)] = {
50 .persistent = SLB_NUM_BOLTED,
51 .buffer_length = sizeof(struct slb_shadow),
55 /* The Paca is an array with one entry per processor. Each contains an
56 * lppaca, which contains the information shared between the
57 * hypervisor and Linux.
58 * On systems with hardware multi-threading, there are two threads
59 * per processor. The Paca array must contain an entry for each thread.
60 * The VPD Areas will give a max logical processors = 2 * max physical
61 * processors. The processor VPD array needs one entry per physical
62 * processor (not thread).
64 struct paca_struct paca[NR_CPUS];
65 EXPORT_SYMBOL(paca);
67 void __init initialise_pacas(void)
69 int cpu;
71 /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB
72 * of the TOC can be addressed using a single machine instruction.
74 unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL;
76 /* Can't use for_each_*_cpu, as they aren't functional yet */
77 for (cpu = 0; cpu < NR_CPUS; cpu++) {
78 struct paca_struct *new_paca = &paca[cpu];
80 new_paca->lppaca_ptr = &lppaca[cpu];
81 new_paca->lock_token = 0x8000;
82 new_paca->paca_index = cpu;
83 new_paca->kernel_toc = kernel_toc;
84 new_paca->kernelbase = (unsigned long) _stext;
85 new_paca->kernel_msr = MSR_KERNEL;
86 new_paca->hw_cpu_id = 0xffff;
87 new_paca->slb_shadow_ptr = &slb_shadow[cpu];
88 new_paca->__current = &init_task;