added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / arch / mips / txx9 / jmr3927 / setup.c
blob25e50a7be3877692d1ffb8ec40c5f23aa17813fa
1 /*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License as published by the
4 * Free Software Foundation; either version 2 of the License, or (at your
5 * option) any later version.
7 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
8 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
9 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
10 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
11 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
12 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
13 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
14 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
15 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
16 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 675 Mass Ave, Cambridge, MA 02139, USA.
22 * Copyright 2001 MontaVista Software Inc.
23 * Author: MontaVista Software, Inc.
24 * ahennessy@mvista.com
26 * Copyright (C) 2000-2001 Toshiba Corporation
27 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
30 #include <linux/init.h>
31 #include <linux/kernel.h>
32 #include <linux/types.h>
33 #include <linux/ioport.h>
34 #include <linux/delay.h>
35 #include <linux/platform_device.h>
36 #include <linux/gpio.h>
37 #include <asm/reboot.h>
38 #include <asm/txx9pio.h>
39 #include <asm/txx9/generic.h>
40 #include <asm/txx9/pci.h>
41 #include <asm/txx9/jmr3927.h>
42 #include <asm/mipsregs.h>
44 static void jmr3927_machine_restart(char *command)
46 local_irq_disable();
47 #if 1 /* Resetting PCI bus */
48 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
49 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, JMR3927_IOC_RESET_ADDR);
50 (void)jmr3927_ioc_reg_in(JMR3927_IOC_RESET_ADDR); /* flush WB */
51 mdelay(1);
52 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
53 #endif
54 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_CPU, JMR3927_IOC_RESET_ADDR);
55 /* fallback */
56 (*_machine_halt)();
59 static void __init jmr3927_time_init(void)
61 tx3927_time_init(0, 1);
64 #define DO_WRITE_THROUGH
66 static void jmr3927_board_init(void);
68 static void __init jmr3927_mem_setup(void)
70 char *argptr;
72 set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
74 _machine_restart = jmr3927_machine_restart;
76 /* cache setup */
78 unsigned int conf;
79 #ifdef DO_WRITE_THROUGH
80 int mips_config_cwfon = 0;
81 int mips_config_wbon = 0;
82 #else
83 int mips_config_cwfon = 1;
84 int mips_config_wbon = 1;
85 #endif
87 conf = read_c0_conf();
88 conf &= ~(TX39_CONF_WBON | TX39_CONF_CWFON);
89 conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
90 conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;
92 write_c0_conf(conf);
93 write_c0_cache(0);
96 /* initialize board */
97 jmr3927_board_init();
99 tx3927_sio_init(0, 1 << 1); /* ch1: noCTS */
100 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
101 argptr = prom_getcmdline();
102 if (!strstr(argptr, "console="))
103 strcat(argptr, " console=ttyS1,115200");
104 #endif
107 static void __init jmr3927_pci_setup(void)
109 #ifdef CONFIG_PCI
110 int extarb = !(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB);
111 struct pci_controller *c;
113 c = txx9_alloc_pci_controller(&txx9_primary_pcic,
114 JMR3927_PCIMEM, JMR3927_PCIMEM_SIZE,
115 JMR3927_PCIIO, JMR3927_PCIIO_SIZE);
116 register_pci_controller(c);
117 if (!extarb) {
118 /* Reset PCI Bus */
119 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
120 udelay(100);
121 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
122 JMR3927_IOC_RESET_ADDR);
123 udelay(100);
124 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
126 tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb);
127 tx3927_setup_pcierr_irq();
128 #endif /* CONFIG_PCI */
131 static void __init jmr3927_board_init(void)
133 txx9_cpu_clock = JMR3927_CORECLK;
134 /* SDRAMC are configured by PROM */
136 /* ROMC */
137 tx3927_romcptr->cr[1] = JMR3927_ROMCE1 | 0x00030048;
138 tx3927_romcptr->cr[2] = JMR3927_ROMCE2 | 0x000064c8;
139 tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698;
140 tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218;
142 /* Pin selection */
143 tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL;
144 tx3927_ccfgptr->pcfg |=
145 TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL |
146 (TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1));
148 tx3927_setup();
150 /* PIO[15:12] connected to LEDs */
151 __raw_writel(0x0000f000, &tx3927_pioptr->dir);
152 gpio_request(11, "dipsw1");
153 gpio_request(10, "dipsw2");
155 jmr3927_pci_setup();
157 /* SIO0 DTR on */
158 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
160 jmr3927_led_set(0);
162 printk(KERN_INFO
163 "JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
164 jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
165 jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
166 jmr3927_dipsw1(), jmr3927_dipsw2(),
167 jmr3927_dipsw3(), jmr3927_dipsw4());
170 /* This trick makes rtc-ds1742 driver usable as is. */
171 static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
173 if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
174 return port;
175 port = (port & 0xffff0000) | (port & 0x7fff << 1);
176 #ifdef __BIG_ENDIAN
177 return port;
178 #else
179 return port | 1;
180 #endif
183 static void __init jmr3927_rtc_init(void)
185 static struct resource __initdata res = {
186 .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
187 .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
188 .flags = IORESOURCE_MEM,
190 platform_device_register_simple("rtc-ds1742", -1, &res, 1);
193 static void __init jmr3927_mtd_init(void)
195 int i;
197 for (i = 0; i < 2; i++)
198 tx3927_mtd_init(i);
201 static void __init jmr3927_device_init(void)
203 unsigned long iocled_base = JMR3927_IOC_LED_ADDR - IO_BASE;
204 #ifdef __LITTLE_ENDIAN
205 iocled_base |= 1;
206 #endif
207 __swizzle_addr_b = jmr3927_swizzle_addr_b;
208 jmr3927_rtc_init();
209 tx3927_wdt_init();
210 jmr3927_mtd_init();
211 txx9_iocled_init(iocled_base, -1, 8, 1, "green", NULL);
214 struct txx9_board_vec jmr3927_vec __initdata = {
215 .system = "Toshiba JMR_TX3927",
216 .prom_init = jmr3927_prom_init,
217 .mem_setup = jmr3927_mem_setup,
218 .irq_setup = jmr3927_irq_setup,
219 .time_init = jmr3927_time_init,
220 .device_init = jmr3927_device_init,
221 #ifdef CONFIG_PCI
222 .pci_map_irq = jmr3927_pci_map_irq,
223 #endif