kernel/2.6.29.6-aldebaran-rt/arch/mips/alchemy/devboards/pb1100/board_setup.c

   1 /*
   2  * Copyright 2002, 2008 MontaVista Software Inc.
   3  * Author: MontaVista Software, Inc. <source@mvista.com>
   4  *
   5  *  This program is free software; you can redistribute  it and/or modify it
   6  *  under  the terms of  the GNU General  Public License as published by the
   7  *  Free Software Foundation;  either version 2 of the  License, or (at your
   8  *  option) any later version.
   9  *
  10  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  11  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  12  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  13  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  14  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  16  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  18  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  19  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20  *
  21  *  You should have received a copy of the  GNU General Public License along
  22  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  23  *  675 Mass Ave, Cambridge, MA 02139, USA.
  24  */
  25
  26 #include <linux/init.h>
  27 #include <linux/delay.h>
  28 #include <linux/interrupt.h>
  29
  30 #include <asm/mach-au1x00/au1000.h>
  31 #include <asm/mach-pb1x00/pb1100.h>
  32
  33 #include <prom.h>
  34
  35
  36 struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
  37         { AU1000_GPIO_9,  IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card Fully_Inserted# */
  38         { AU1000_GPIO_10, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card STSCHG# */
  39         { AU1000_GPIO_11, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card IRQ# */
  40         { AU1000_GPIO_13, IRQF_TRIGGER_LOW, 0 }, /* DC_IRQ# */
  41 };
  42
  43
  44 const char *get_system_type(void)
  45 {
  46         return "Alchemy Pb1100";
  47 }
  48
  49 void board_reset(void)
  50 {
  51         /* Hit BCSR.RST_VDDI[SOFT_RESET] */
  52         au_writel(0x00000000, PB1100_RST_VDDI);
  53 }
  54
  55 void __init board_init_irq(void)
  56 {
  57         au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
  58 }
  59
  60 void __init board_setup(void)
  61 {
  62         volatile void __iomem *base = (volatile void __iomem *)0xac000000UL;
  63         char *argptr;
  64
  65         argptr = prom_getcmdline();
  66 #ifdef CONFIG_SERIAL_8250_CONSOLE
  67         argptr = strstr(argptr, "console=");
  68         if (argptr == NULL) {
  69                 argptr = prom_getcmdline();
  70                 strcat(argptr, " console=ttyS0,115200");
  71         }
  72 #endif
  73
  74 #ifdef CONFIG_FB_AU1100
  75         argptr = strstr(argptr, "video=");
  76         if (argptr == NULL) {
  77                 argptr = prom_getcmdline();
  78                 /* default panel */
  79                 /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
  80         }
  81 #endif
  82
  83 #if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
  84         /* au1000 does not support vra, au1500 and au1100 do */
  85         strcat(argptr, " au1000_audio=vra");
  86         argptr = prom_getcmdline();
  87 #endif
  88
  89         /* Set AUX clock to 12 MHz * 8 = 96 MHz */
  90         au_writel(8, SYS_AUXPLL);
  91         au_writel(0, SYS_PININPUTEN);
  92         udelay(100);
  93
  94 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  95         {
  96                 u32 pin_func, sys_freqctrl, sys_clksrc;
  97
  98                 /* Configure pins GPIO[14:9] as GPIO */
  99                 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
 100
 101                 /* Zero and disable FREQ2 */
 102                 sys_freqctrl = au_readl(SYS_FREQCTRL0);
 103                 sys_freqctrl &= ~0xFFF00000;
 104                 au_writel(sys_freqctrl, SYS_FREQCTRL0);
 105
 106                 /* Zero and disable USBH/USBD/IrDA clock */
 107                 sys_clksrc = au_readl(SYS_CLKSRC);
 108                 sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
 109                 au_writel(sys_clksrc, SYS_CLKSRC);
 110
 111                 sys_freqctrl = au_readl(SYS_FREQCTRL0);
 112                 sys_freqctrl &= ~0xFFF00000;
 113
 114                 sys_clksrc = au_readl(SYS_CLKSRC);
 115                 sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
 116
 117                 /* FREQ2 = aux / 2 = 48 MHz */
 118                 sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |
 119                                 SYS_FC_FE2 | SYS_FC_FS2;
 120                 au_writel(sys_freqctrl, SYS_FREQCTRL0);
 121
 122                 /*
 123                  * Route 48 MHz FREQ2 into USBH/USBD/IrDA
 124                  */
 125                 sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MIR_BIT;
 126                 au_writel(sys_clksrc, SYS_CLKSRC);
 127
 128                 /* Setup the static bus controller */
 129                 au_writel(0x00000002, MEM_STCFG3);  /* type = PCMCIA */
 130                 au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
 131                 au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
 132
 133                 /*
 134                  * Get USB Functionality pin state (device vs host drive pins).
 135                  */
 136                 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
 137                 /* 2nd USB port is USB host. */
 138                 pin_func |= SYS_PF_USB;
 139                 au_writel(pin_func, SYS_PINFUNC);
 140         }
 141 #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
 142
 143         /* Enable sys bus clock divider when IDLE state or no bus activity. */
 144         au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
 145
 146         /* Enable the RTC if not already enabled. */
 147         if (!(readb(base + 0x28) & 0x20)) {
 148                 writeb(readb(base + 0x28) | 0x20, base + 0x28);
 149                 au_sync();
 150         }
 151         /* Put the clock in BCD mode. */
 152         if (readb(base + 0x2C) & 0x4) { /* reg B */
 153                 writeb(readb(base + 0x2c) & ~0x4, base + 0x2c);
 154                 au_sync();
 155         }
 156 }