added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / arch / blackfin / mach-bf527 / include / mach / bf527.h
blob3832aab11e9a743ff33d01eb2463ff8d451108da
1 /*
2 * File: include/asm-blackfin/mach-bf527/bf527.h
3 * Based on: include/asm-blackfin/mach-bf537/bf537.h
4 * Author: Michael Hennerich (michael.hennerich@analog.com)
6 * Created:
7 * Description: SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF527
9 * Modified:
10 * Copyright 2004-2007 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 #ifndef __MACH_BF527_H__
31 #define __MACH_BF527_H__
33 #define OFFSET_(x) ((x) & 0x0000FFFF)
35 /*some misc defines*/
36 #define IMASK_IVG15 0x8000
37 #define IMASK_IVG14 0x4000
38 #define IMASK_IVG13 0x2000
39 #define IMASK_IVG12 0x1000
41 #define IMASK_IVG11 0x0800
42 #define IMASK_IVG10 0x0400
43 #define IMASK_IVG9 0x0200
44 #define IMASK_IVG8 0x0100
46 #define IMASK_IVG7 0x0080
47 #define IMASK_IVGTMR 0x0040
48 #define IMASK_IVGHW 0x0020
50 /***************************/
52 #define BFIN_DSUBBANKS 4
53 #define BFIN_DWAYS 2
54 #define BFIN_DLINES 64
55 #define BFIN_ISUBBANKS 4
56 #define BFIN_IWAYS 4
57 #define BFIN_ILINES 32
59 #define WAY0_L 0x1
60 #define WAY1_L 0x2
61 #define WAY01_L 0x3
62 #define WAY2_L 0x4
63 #define WAY02_L 0x5
64 #define WAY12_L 0x6
65 #define WAY012_L 0x7
67 #define WAY3_L 0x8
68 #define WAY03_L 0x9
69 #define WAY13_L 0xA
70 #define WAY013_L 0xB
72 #define WAY32_L 0xC
73 #define WAY320_L 0xD
74 #define WAY321_L 0xE
75 #define WAYALL_L 0xF
77 #define DMC_ENABLE (2<<2) /*yes, 2, not 1 */
79 /********************************* EBIU Settings ************************************/
80 #define AMBCTL0VAL ((CONFIG_BANK_1 << 16) | CONFIG_BANK_0)
81 #define AMBCTL1VAL ((CONFIG_BANK_3 << 16) | CONFIG_BANK_2)
83 #ifdef CONFIG_C_AMBEN_ALL
84 #define V_AMBEN AMBEN_ALL
85 #endif
86 #ifdef CONFIG_C_AMBEN
87 #define V_AMBEN 0x0
88 #endif
89 #ifdef CONFIG_C_AMBEN_B0
90 #define V_AMBEN AMBEN_B0
91 #endif
92 #ifdef CONFIG_C_AMBEN_B0_B1
93 #define V_AMBEN AMBEN_B0_B1
94 #endif
95 #ifdef CONFIG_C_AMBEN_B0_B1_B2
96 #define V_AMBEN AMBEN_B0_B1_B2
97 #endif
98 #ifdef CONFIG_C_AMCKEN
99 #define V_AMCKEN AMCKEN
100 #else
101 #define V_AMCKEN 0x0
102 #endif
103 #ifdef CONFIG_C_CDPRIO
104 #define V_CDPRIO 0x100
105 #else
106 #define V_CDPRIO 0x0
107 #endif
109 #define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO)
111 #ifdef CONFIG_BF527
112 #define CPU "BF527"
113 #define CPUID 0x27e0
114 #endif
115 #ifdef CONFIG_BF526
116 #define CPU "BF526"
117 #define CPUID 0x27e4
118 #endif
119 #ifdef CONFIG_BF525
120 #define CPU "BF525"
121 #define CPUID 0x27e0
122 #endif
123 #ifdef CONFIG_BF524
124 #define CPU "BF524"
125 #define CPUID 0x27e4
126 #endif
127 #ifdef CONFIG_BF523
128 #define CPU "BF523"
129 #define CPUID 0x27e0
130 #endif
131 #ifdef CONFIG_BF522
132 #define CPU "BF522"
133 #define CPUID 0x27e4
134 #endif
136 #ifndef CPU
137 #error "Unknown CPU type - This kernel doesn't seem to be configured properly"
138 #endif
140 #endif /* __MACH_BF527_H__ */